root / include / hw / ppc / spapr.h @ e68cb8b4
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#if !defined(__HW_SPAPR_H__)
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#define __HW_SPAPR_H__
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#include "sysemu/dma.h" |
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#include "hw/ppc/xics.h" |
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struct VIOsPAPRBus;
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struct sPAPRPHBState;
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struct sPAPRNVRAM;
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struct icp_state;
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#define HPTE64_V_HPTE_DIRTY 0x0000000000000040ULL |
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typedef struct sPAPREnvironment { |
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struct VIOsPAPRBus *vio_bus;
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QLIST_HEAD(, sPAPRPHBState) phbs; |
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struct sPAPRNVRAM *nvram;
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struct icp_state *icp;
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hwaddr ram_limit; |
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void *htab;
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uint32_t htab_shift; |
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hwaddr rma_size; |
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int vrma_adjust;
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hwaddr fdt_addr, rtas_addr; |
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long rtas_size;
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void *fdt_skel;
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target_ulong entry_point; |
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uint32_t next_irq; |
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uint64_t rtc_offset; |
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char *cpu_model;
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bool has_graphics;
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uint32_t epow_irq; |
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Notifier epow_notifier; |
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/* Migration state */
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int htab_save_index;
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bool htab_first_pass;
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int htab_fd;
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} sPAPREnvironment; |
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#define H_SUCCESS 0 |
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#define H_BUSY 1 /* Hardware busy -- retry later */ |
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#define H_CLOSED 2 /* Resource closed */ |
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#define H_NOT_AVAILABLE 3 |
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#define H_CONSTRAINED 4 /* Resource request constrained to max allowed */ |
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#define H_PARTIAL 5 |
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#define H_IN_PROGRESS 14 /* Kind of like busy */ |
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#define H_PAGE_REGISTERED 15 |
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#define H_PARTIAL_STORE 16 |
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#define H_PENDING 17 /* returned from H_POLL_PENDING */ |
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#define H_CONTINUE 18 /* Returned from H_Join on success */ |
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#define H_LONG_BUSY_START_RANGE 9900 /* Start of long busy range */ |
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#define H_LONG_BUSY_ORDER_1_MSEC 9900 /* Long busy, hint that 1msec \ |
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is a good time to retry */
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#define H_LONG_BUSY_ORDER_10_MSEC 9901 /* Long busy, hint that 10msec \ |
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is a good time to retry */
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#define H_LONG_BUSY_ORDER_100_MSEC 9902 /* Long busy, hint that 100msec \ |
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is a good time to retry */
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#define H_LONG_BUSY_ORDER_1_SEC 9903 /* Long busy, hint that 1sec \ |
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is a good time to retry */
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#define H_LONG_BUSY_ORDER_10_SEC 9904 /* Long busy, hint that 10sec \ |
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is a good time to retry */
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#define H_LONG_BUSY_ORDER_100_SEC 9905 /* Long busy, hint that 100sec \ |
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is a good time to retry */
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#define H_LONG_BUSY_END_RANGE 9905 /* End of long busy range */ |
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#define H_HARDWARE -1 /* Hardware error */ |
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#define H_FUNCTION -2 /* Function not supported */ |
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#define H_PRIVILEGE -3 /* Caller not privileged */ |
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#define H_PARAMETER -4 /* Parameter invalid, out-of-range or conflicting */ |
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#define H_BAD_MODE -5 /* Illegal msr value */ |
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#define H_PTEG_FULL -6 /* PTEG is full */ |
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#define H_NOT_FOUND -7 /* PTE was not found" */ |
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#define H_RESERVED_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */ |
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#define H_NO_MEM -9 |
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#define H_AUTHORITY -10 |
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#define H_PERMISSION -11 |
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#define H_DROPPED -12 |
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#define H_SOURCE_PARM -13 |
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#define H_DEST_PARM -14 |
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#define H_REMOTE_PARM -15 |
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#define H_RESOURCE -16 |
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#define H_ADAPTER_PARM -17 |
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#define H_RH_PARM -18 |
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#define H_RCQ_PARM -19 |
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#define H_SCQ_PARM -20 |
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#define H_EQ_PARM -21 |
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#define H_RT_PARM -22 |
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#define H_ST_PARM -23 |
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#define H_SIGT_PARM -24 |
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#define H_TOKEN_PARM -25 |
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#define H_MLENGTH_PARM -27 |
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#define H_MEM_PARM -28 |
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#define H_MEM_ACCESS_PARM -29 |
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#define H_ATTR_PARM -30 |
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#define H_PORT_PARM -31 |
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#define H_MCG_PARM -32 |
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#define H_VL_PARM -33 |
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#define H_TSIZE_PARM -34 |
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#define H_TRACE_PARM -35 |
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#define H_MASK_PARM -37 |
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#define H_MCG_FULL -38 |
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#define H_ALIAS_EXIST -39 |
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#define H_P_COUNTER -40 |
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#define H_TABLE_FULL -41 |
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#define H_ALT_TABLE -42 |
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#define H_MR_CONDITION -43 |
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#define H_NOT_ENOUGH_RESOURCES -44 |
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#define H_R_STATE -45 |
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#define H_RESCINDEND -46 |
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#define H_MULTI_THREADS_ACTIVE -9005 |
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/* Long Busy is a condition that can be returned by the firmware
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* when a call cannot be completed now, but the identical call
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* should be retried later. This prevents calls blocking in the
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* firmware for long periods of time. Annoyingly the firmware can return
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* a range of return codes, hinting at how long we should wait before
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* retrying. If you don't care for the hint, the macro below is a good
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* way to check for the long_busy return codes
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*/
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#define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \
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&& (x <= H_LONG_BUSY_END_RANGE)) |
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/* Flags */
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#define H_LARGE_PAGE (1ULL<<(63-16)) |
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#define H_EXACT (1ULL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */ |
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#define H_R_XLATE (1ULL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */ |
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#define H_READ_4 (1ULL<<(63-26)) /* Return 4 PTEs */ |
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#define H_PAGE_STATE_CHANGE (1ULL<<(63-28)) |
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#define H_PAGE_UNUSED ((1ULL<<(63-29)) | (1ULL<<(63-30))) |
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#define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED)
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#define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1ULL<<(63-31))) |
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#define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE
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#define H_AVPN (1ULL<<(63-32)) /* An avpn is provided as a sanity test */ |
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#define H_ANDCOND (1ULL<<(63-33)) |
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#define H_ICACHE_INVALIDATE (1ULL<<(63-40)) /* icbi, etc. (ignored for IO pages) */ |
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#define H_ICACHE_SYNCHRONIZE (1ULL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */ |
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#define H_ZERO_PAGE (1ULL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */ |
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#define H_COPY_PAGE (1ULL<<(63-49)) |
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#define H_N (1ULL<<(63-61)) |
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#define H_PP1 (1ULL<<(63-62)) |
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#define H_PP2 (1ULL<<(63-63)) |
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/* VASI States */
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#define H_VASI_INVALID 0 |
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#define H_VASI_ENABLED 1 |
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#define H_VASI_ABORTED 2 |
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#define H_VASI_SUSPENDING 3 |
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#define H_VASI_SUSPENDED 4 |
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#define H_VASI_RESUMED 5 |
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#define H_VASI_COMPLETED 6 |
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/* DABRX flags */
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#define H_DABRX_HYPERVISOR (1ULL<<(63-61)) |
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#define H_DABRX_KERNEL (1ULL<<(63-62)) |
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#define H_DABRX_USER (1ULL<<(63-63)) |
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/* Each control block has to be on a 4K boundary */
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#define H_CB_ALIGNMENT 4096 |
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/* pSeries hypervisor opcodes */
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#define H_REMOVE 0x04 |
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#define H_ENTER 0x08 |
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#define H_READ 0x0c |
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#define H_CLEAR_MOD 0x10 |
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#define H_CLEAR_REF 0x14 |
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#define H_PROTECT 0x18 |
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#define H_GET_TCE 0x1c |
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#define H_PUT_TCE 0x20 |
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#define H_SET_SPRG0 0x24 |
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#define H_SET_DABR 0x28 |
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#define H_PAGE_INIT 0x2c |
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#define H_SET_ASR 0x30 |
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#define H_ASR_ON 0x34 |
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#define H_ASR_OFF 0x38 |
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#define H_LOGICAL_CI_LOAD 0x3c |
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#define H_LOGICAL_CI_STORE 0x40 |
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#define H_LOGICAL_CACHE_LOAD 0x44 |
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#define H_LOGICAL_CACHE_STORE 0x48 |
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#define H_LOGICAL_ICBI 0x4c |
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#define H_LOGICAL_DCBF 0x50 |
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#define H_GET_TERM_CHAR 0x54 |
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#define H_PUT_TERM_CHAR 0x58 |
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#define H_REAL_TO_LOGICAL 0x5c |
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#define H_HYPERVISOR_DATA 0x60 |
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#define H_EOI 0x64 |
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#define H_CPPR 0x68 |
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#define H_IPI 0x6c |
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#define H_IPOLL 0x70 |
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#define H_XIRR 0x74 |
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#define H_PERFMON 0x7c |
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#define H_MIGRATE_DMA 0x78 |
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#define H_REGISTER_VPA 0xDC |
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#define H_CEDE 0xE0 |
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#define H_CONFER 0xE4 |
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#define H_PROD 0xE8 |
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#define H_GET_PPP 0xEC |
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#define H_SET_PPP 0xF0 |
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#define H_PURR 0xF4 |
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#define H_PIC 0xF8 |
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#define H_REG_CRQ 0xFC |
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#define H_FREE_CRQ 0x100 |
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#define H_VIO_SIGNAL 0x104 |
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#define H_SEND_CRQ 0x108 |
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#define H_COPY_RDMA 0x110 |
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#define H_REGISTER_LOGICAL_LAN 0x114 |
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#define H_FREE_LOGICAL_LAN 0x118 |
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#define H_ADD_LOGICAL_LAN_BUFFER 0x11C |
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#define H_SEND_LOGICAL_LAN 0x120 |
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#define H_BULK_REMOVE 0x124 |
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#define H_MULTICAST_CTRL 0x130 |
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#define H_SET_XDABR 0x134 |
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#define H_STUFF_TCE 0x138 |
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#define H_PUT_TCE_INDIRECT 0x13C |
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#define H_CHANGE_LOGICAL_LAN_MAC 0x14C |
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#define H_VTERM_PARTNER_INFO 0x150 |
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#define H_REGISTER_VTERM 0x154 |
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#define H_FREE_VTERM 0x158 |
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#define H_RESET_EVENTS 0x15C |
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#define H_ALLOC_RESOURCE 0x160 |
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#define H_FREE_RESOURCE 0x164 |
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#define H_MODIFY_QP 0x168 |
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#define H_QUERY_QP 0x16C |
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#define H_REREGISTER_PMR 0x170 |
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#define H_REGISTER_SMR 0x174 |
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#define H_QUERY_MR 0x178 |
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#define H_QUERY_MW 0x17C |
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#define H_QUERY_HCA 0x180 |
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#define H_QUERY_PORT 0x184 |
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#define H_MODIFY_PORT 0x188 |
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#define H_DEFINE_AQP1 0x18C |
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#define H_GET_TRACE_BUFFER 0x190 |
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#define H_DEFINE_AQP0 0x194 |
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#define H_RESIZE_MR 0x198 |
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#define H_ATTACH_MCQP 0x19C |
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#define H_DETACH_MCQP 0x1A0 |
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#define H_CREATE_RPT 0x1A4 |
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#define H_REMOVE_RPT 0x1A8 |
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#define H_REGISTER_RPAGES 0x1AC |
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#define H_DISABLE_AND_GETC 0x1B0 |
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#define H_ERROR_DATA 0x1B4 |
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#define H_GET_HCA_INFO 0x1B8 |
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#define H_GET_PERF_COUNT 0x1BC |
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#define H_MANAGE_TRACE 0x1C0 |
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#define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 |
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#define H_QUERY_INT_STATE 0x1E4 |
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#define H_POLL_PENDING 0x1D8 |
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#define H_ILLAN_ATTRIBUTES 0x244 |
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#define H_MODIFY_HEA_QP 0x250 |
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#define H_QUERY_HEA_QP 0x254 |
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#define H_QUERY_HEA 0x258 |
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#define H_QUERY_HEA_PORT 0x25C |
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#define H_MODIFY_HEA_PORT 0x260 |
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#define H_REG_BCMC 0x264 |
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#define H_DEREG_BCMC 0x268 |
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#define H_REGISTER_HEA_RPAGES 0x26C |
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#define H_DISABLE_AND_GET_HEA 0x270 |
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#define H_GET_HEA_INFO 0x274 |
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#define H_ALLOC_HEA_RESOURCE 0x278 |
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#define H_ADD_CONN 0x284 |
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#define H_DEL_CONN 0x288 |
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#define H_JOIN 0x298 |
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#define H_VASI_STATE 0x2A4 |
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#define H_ENABLE_CRQ 0x2B0 |
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#define H_GET_EM_PARMS 0x2B8 |
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#define H_SET_MPP 0x2D0 |
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#define H_GET_MPP 0x2D4 |
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#define MAX_HCALL_OPCODE H_GET_MPP
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/* The hcalls above are standardized in PAPR and implemented by pHyp
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* as well.
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*
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* We also need some hcalls which are specific to qemu / KVM-on-POWER.
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* So far we just need one for H_RTAS, but in future we'll need more
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* for extensions like virtio. We put those into the 0xf000-0xfffc
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* range which is reserved by PAPR for "platform-specific" hcalls.
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*/
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#define KVMPPC_HCALL_BASE 0xf000 |
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#define KVMPPC_H_RTAS (KVMPPC_HCALL_BASE + 0x0) |
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#define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1) |
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#define KVMPPC_HCALL_MAX KVMPPC_H_LOGICAL_MEMOP
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extern sPAPREnvironment *spapr;
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/*#define DEBUG_SPAPR_HCALLS*/
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#ifdef DEBUG_SPAPR_HCALLS
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#define hcall_dprintf(fmt, ...) \
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do { fprintf(stderr, "%s: " fmt, __func__, ## __VA_ARGS__); } while (0) |
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#else
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#define hcall_dprintf(fmt, ...) \
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do { } while (0) |
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#endif
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typedef target_ulong (*spapr_hcall_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr,
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target_ulong opcode, |
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target_ulong *args); |
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void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
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target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode, |
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target_ulong *args); |
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int spapr_allocate_irq(int hint, bool lsi); |
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int spapr_allocate_irq_block(int num, bool lsi); |
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static inline int spapr_allocate_msi(int hint) |
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{ |
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return spapr_allocate_irq(hint, false); |
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} |
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static inline int spapr_allocate_lsi(int hint) |
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{ |
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return spapr_allocate_irq(hint, true); |
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} |
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static inline uint32_t rtas_ld(target_ulong phys, int n) |
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{ |
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return ldl_be_phys(phys + 4*n); |
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} |
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static inline void rtas_st(target_ulong phys, int n, uint32_t val) |
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{ |
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stl_be_phys(phys + 4*n, val);
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} |
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typedef void (*spapr_rtas_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
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uint32_t token, |
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uint32_t nargs, target_ulong args, |
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uint32_t nret, target_ulong rets); |
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int spapr_rtas_register(const char *name, spapr_rtas_fn fn); |
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target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
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uint32_t token, uint32_t nargs, target_ulong args, |
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uint32_t nret, target_ulong rets); |
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int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr, |
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hwaddr rtas_size); |
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|
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#define SPAPR_TCE_PAGE_SHIFT 12 |
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#define SPAPR_TCE_PAGE_SIZE (1ULL << SPAPR_TCE_PAGE_SHIFT) |
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#define SPAPR_TCE_PAGE_MASK (SPAPR_TCE_PAGE_SIZE - 1) |
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#define SPAPR_VIO_BASE_LIOBN 0x00000000 |
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#define SPAPR_PCI_BASE_LIOBN 0x80000000 |
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#define RTAS_ERROR_LOG_MAX 2048 |
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typedef struct sPAPRTCETable sPAPRTCETable; |
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#define TYPE_SPAPR_TCE_TABLE "spapr-tce-table" |
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#define SPAPR_TCE_TABLE(obj) \
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OBJECT_CHECK(sPAPRTCETable, (obj), TYPE_SPAPR_TCE_TABLE) |
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struct sPAPRTCETable {
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DeviceState parent; |
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uint32_t liobn; |
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uint32_t window_size; |
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uint32_t nb_table; |
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uint64_t *table; |
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bool bypass;
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int fd;
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MemoryRegion iommu; |
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QLIST_ENTRY(sPAPRTCETable) list; |
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}; |
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void spapr_events_init(sPAPREnvironment *spapr);
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void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq); |
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sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn, |
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size_t window_size); |
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MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet); |
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void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass); |
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int spapr_dma_dt(void *fdt, int node_off, const char *propname, |
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uint32_t liobn, uint64_t window, uint32_t size); |
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int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname, |
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sPAPRTCETable *tcet); |
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|
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#endif /* !defined (__HW_SPAPR_H__) */ |