Revision e6a7830a
| b/hw/ide/pci.c | ||
|---|---|---|
| 413 | 413 |
pci_conf[0x51] |= 0x08; /* enable IDE1 */ |
| 414 | 414 |
} |
| 415 | 415 |
|
| 416 |
pci_register_bar((PCIDevice *)d, 0, 0x8, |
|
| 417 |
PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 418 |
pci_register_bar((PCIDevice *)d, 1, 0x4, |
|
| 419 |
PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 420 |
pci_register_bar((PCIDevice *)d, 2, 0x8, |
|
| 421 |
PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 422 |
pci_register_bar((PCIDevice *)d, 3, 0x4, |
|
| 423 |
PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 424 |
pci_register_bar((PCIDevice *)d, 4, 0x10, |
|
| 425 |
PCI_ADDRESS_SPACE_IO, bmdma_map); |
|
| 416 |
pci_register_bar(dev, 0, 0x8, PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 417 |
pci_register_bar(dev, 1, 0x4, PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 418 |
pci_register_bar(dev, 2, 0x8, PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 419 |
pci_register_bar(dev, 3, 0x4, PCI_ADDRESS_SPACE_IO, ide_map); |
|
| 420 |
pci_register_bar(dev, 4, 0x10, PCI_ADDRESS_SPACE_IO, bmdma_map); |
|
| 426 | 421 |
|
| 427 | 422 |
pci_conf[0x3d] = 0x01; // interrupt on pin 1 |
| 428 | 423 |
|
| ... | ... | |
| 477 | 472 |
qemu_register_reset(piix3_reset, d); |
| 478 | 473 |
piix3_reset(d); |
| 479 | 474 |
|
| 480 |
pci_register_bar((PCIDevice *)d, 4, 0x10, |
|
| 481 |
PCI_ADDRESS_SPACE_IO, bmdma_map); |
|
| 475 |
pci_register_bar(&d->dev, 4, 0x10, PCI_ADDRESS_SPACE_IO, bmdma_map); |
|
| 482 | 476 |
|
| 483 | 477 |
register_savevm("ide", 0, 3, pci_ide_save, pci_ide_load, d);
|
| 484 | 478 |
|
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