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1 | 610626af | aliguori | /*
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2 | 610626af | aliguori | * ioapic.c IOAPIC emulation logic
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3 | 610626af | aliguori | *
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4 | 610626af | aliguori | * Copyright (c) 2004-2005 Fabrice Bellard
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5 | 610626af | aliguori | *
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6 | 610626af | aliguori | * Split the ioapic logic from apic.c
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7 | 610626af | aliguori | * Xiantao Zhang <xiantao.zhang@intel.com>
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8 | 610626af | aliguori | *
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9 | 610626af | aliguori | * This library is free software; you can redistribute it and/or
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10 | 610626af | aliguori | * modify it under the terms of the GNU Lesser General Public
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11 | 610626af | aliguori | * License as published by the Free Software Foundation; either
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12 | 610626af | aliguori | * version 2 of the License, or (at your option) any later version.
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13 | 610626af | aliguori | *
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14 | 610626af | aliguori | * This library is distributed in the hope that it will be useful,
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15 | 610626af | aliguori | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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16 | 610626af | aliguori | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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17 | 610626af | aliguori | * Lesser General Public License for more details.
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18 | 610626af | aliguori | *
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19 | 610626af | aliguori | * You should have received a copy of the GNU Lesser General Public
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20 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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21 | 610626af | aliguori | */
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22 | 610626af | aliguori | |
23 | 610626af | aliguori | #include "hw.h" |
24 | 610626af | aliguori | #include "pc.h" |
25 | aa28b9bf | Blue Swirl | #include "apic.h" |
26 | 610626af | aliguori | #include "qemu-timer.h" |
27 | 610626af | aliguori | #include "host-utils.h" |
28 | 96051119 | Blue Swirl | #include "sysbus.h" |
29 | 610626af | aliguori | |
30 | 610626af | aliguori | //#define DEBUG_IOAPIC
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31 | 610626af | aliguori | |
32 | 9af9b330 | Blue Swirl | #ifdef DEBUG_IOAPIC
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33 | 9af9b330 | Blue Swirl | #define DPRINTF(fmt, ...) \
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34 | 9af9b330 | Blue Swirl | do { printf("ioapic: " fmt , ## __VA_ARGS__); } while (0) |
35 | 9af9b330 | Blue Swirl | #else
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36 | 9af9b330 | Blue Swirl | #define DPRINTF(fmt, ...)
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37 | 9af9b330 | Blue Swirl | #endif
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38 | 9af9b330 | Blue Swirl | |
39 | 610626af | aliguori | #define IOAPIC_LVT_MASKED (1<<16) |
40 | 610626af | aliguori | |
41 | 610626af | aliguori | #define IOAPIC_TRIGGER_EDGE 0 |
42 | 610626af | aliguori | #define IOAPIC_TRIGGER_LEVEL 1 |
43 | 610626af | aliguori | |
44 | 610626af | aliguori | /*io{apic,sapic} delivery mode*/
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45 | 610626af | aliguori | #define IOAPIC_DM_FIXED 0x0 |
46 | 610626af | aliguori | #define IOAPIC_DM_LOWEST_PRIORITY 0x1 |
47 | 610626af | aliguori | #define IOAPIC_DM_PMI 0x2 |
48 | 610626af | aliguori | #define IOAPIC_DM_NMI 0x4 |
49 | 610626af | aliguori | #define IOAPIC_DM_INIT 0x5 |
50 | 610626af | aliguori | #define IOAPIC_DM_SIPI 0x5 |
51 | 610626af | aliguori | #define IOAPIC_DM_EXTINT 0x7 |
52 | 610626af | aliguori | |
53 | 96051119 | Blue Swirl | typedef struct IOAPICState IOAPICState; |
54 | 96051119 | Blue Swirl | |
55 | 610626af | aliguori | struct IOAPICState {
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56 | 96051119 | Blue Swirl | SysBusDevice busdev; |
57 | 610626af | aliguori | uint8_t id; |
58 | 610626af | aliguori | uint8_t ioregsel; |
59 | 610626af | aliguori | |
60 | 610626af | aliguori | uint32_t irr; |
61 | 610626af | aliguori | uint64_t ioredtbl[IOAPIC_NUM_PINS]; |
62 | 610626af | aliguori | }; |
63 | 610626af | aliguori | |
64 | 610626af | aliguori | static void ioapic_service(IOAPICState *s) |
65 | 610626af | aliguori | { |
66 | 610626af | aliguori | uint8_t i; |
67 | 610626af | aliguori | uint8_t trig_mode; |
68 | 610626af | aliguori | uint8_t vector; |
69 | 610626af | aliguori | uint8_t delivery_mode; |
70 | 610626af | aliguori | uint32_t mask; |
71 | 610626af | aliguori | uint64_t entry; |
72 | 610626af | aliguori | uint8_t dest; |
73 | 610626af | aliguori | uint8_t dest_mode; |
74 | 610626af | aliguori | uint8_t polarity; |
75 | 610626af | aliguori | |
76 | 610626af | aliguori | for (i = 0; i < IOAPIC_NUM_PINS; i++) { |
77 | 610626af | aliguori | mask = 1 << i;
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78 | 610626af | aliguori | if (s->irr & mask) {
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79 | 610626af | aliguori | entry = s->ioredtbl[i]; |
80 | 610626af | aliguori | if (!(entry & IOAPIC_LVT_MASKED)) {
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81 | 610626af | aliguori | trig_mode = ((entry >> 15) & 1); |
82 | 610626af | aliguori | dest = entry >> 56;
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83 | 610626af | aliguori | dest_mode = (entry >> 11) & 1; |
84 | 610626af | aliguori | delivery_mode = (entry >> 8) & 7; |
85 | 610626af | aliguori | polarity = (entry >> 13) & 1; |
86 | 610626af | aliguori | if (trig_mode == IOAPIC_TRIGGER_EDGE)
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87 | 610626af | aliguori | s->irr &= ~mask; |
88 | 610626af | aliguori | if (delivery_mode == IOAPIC_DM_EXTINT)
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89 | 610626af | aliguori | vector = pic_read_irq(isa_pic); |
90 | 610626af | aliguori | else
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91 | 610626af | aliguori | vector = entry & 0xff;
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92 | 610626af | aliguori | |
93 | 610626af | aliguori | apic_deliver_irq(dest, dest_mode, delivery_mode, |
94 | 610626af | aliguori | vector, polarity, trig_mode); |
95 | 610626af | aliguori | } |
96 | 610626af | aliguori | } |
97 | 610626af | aliguori | } |
98 | 610626af | aliguori | } |
99 | 610626af | aliguori | |
100 | 7d0500c4 | Blue Swirl | static void ioapic_set_irq(void *opaque, int vector, int level) |
101 | 610626af | aliguori | { |
102 | 610626af | aliguori | IOAPICState *s = opaque; |
103 | 610626af | aliguori | |
104 | 610626af | aliguori | /* ISA IRQs map to GSI 1-1 except for IRQ0 which maps
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105 | 610626af | aliguori | * to GSI 2. GSI maps to ioapic 1-1. This is not
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106 | 610626af | aliguori | * the cleanest way of doing it but it should work. */
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107 | 610626af | aliguori | |
108 | 9af9b330 | Blue Swirl | DPRINTF("%s: %s vec %x\n", __func__, level? "raise" : "lower", vector); |
109 | 610626af | aliguori | if (vector == 0) |
110 | 610626af | aliguori | vector = 2;
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111 | 610626af | aliguori | |
112 | 610626af | aliguori | if (vector >= 0 && vector < IOAPIC_NUM_PINS) { |
113 | 610626af | aliguori | uint32_t mask = 1 << vector;
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114 | 610626af | aliguori | uint64_t entry = s->ioredtbl[vector]; |
115 | 610626af | aliguori | |
116 | 610626af | aliguori | if ((entry >> 15) & 1) { |
117 | 610626af | aliguori | /* level triggered */
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118 | 610626af | aliguori | if (level) {
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119 | 610626af | aliguori | s->irr |= mask; |
120 | 610626af | aliguori | ioapic_service(s); |
121 | 610626af | aliguori | } else {
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122 | 610626af | aliguori | s->irr &= ~mask; |
123 | 610626af | aliguori | } |
124 | 610626af | aliguori | } else {
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125 | 610626af | aliguori | /* edge triggered */
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126 | 610626af | aliguori | if (level) {
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127 | 610626af | aliguori | s->irr |= mask; |
128 | 610626af | aliguori | ioapic_service(s); |
129 | 610626af | aliguori | } |
130 | 610626af | aliguori | } |
131 | 610626af | aliguori | } |
132 | 610626af | aliguori | } |
133 | 610626af | aliguori | |
134 | c227f099 | Anthony Liguori | static uint32_t ioapic_mem_readl(void *opaque, target_phys_addr_t addr) |
135 | 610626af | aliguori | { |
136 | 610626af | aliguori | IOAPICState *s = opaque; |
137 | 610626af | aliguori | int index;
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138 | 610626af | aliguori | uint32_t val = 0;
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139 | 610626af | aliguori | |
140 | 610626af | aliguori | addr &= 0xff;
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141 | 610626af | aliguori | if (addr == 0x00) { |
142 | 610626af | aliguori | val = s->ioregsel; |
143 | 610626af | aliguori | } else if (addr == 0x10) { |
144 | 610626af | aliguori | switch (s->ioregsel) {
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145 | 610626af | aliguori | case 0x00: |
146 | 610626af | aliguori | val = s->id << 24;
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147 | 610626af | aliguori | break;
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148 | 610626af | aliguori | case 0x01: |
149 | 610626af | aliguori | val = 0x11 | ((IOAPIC_NUM_PINS - 1) << 16); /* version 0x11 */ |
150 | 610626af | aliguori | break;
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151 | 610626af | aliguori | case 0x02: |
152 | 610626af | aliguori | val = 0;
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153 | 610626af | aliguori | break;
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154 | 610626af | aliguori | default:
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155 | 610626af | aliguori | index = (s->ioregsel - 0x10) >> 1; |
156 | 610626af | aliguori | if (index >= 0 && index < IOAPIC_NUM_PINS) { |
157 | 610626af | aliguori | if (s->ioregsel & 1) |
158 | 610626af | aliguori | val = s->ioredtbl[index] >> 32;
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159 | 610626af | aliguori | else
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160 | 610626af | aliguori | val = s->ioredtbl[index] & 0xffffffff;
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161 | 610626af | aliguori | } |
162 | 610626af | aliguori | } |
163 | 9af9b330 | Blue Swirl | DPRINTF("read: %08x = %08x\n", s->ioregsel, val);
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164 | 610626af | aliguori | } |
165 | 610626af | aliguori | return val;
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166 | 610626af | aliguori | } |
167 | 610626af | aliguori | |
168 | c227f099 | Anthony Liguori | static void ioapic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) |
169 | 610626af | aliguori | { |
170 | 610626af | aliguori | IOAPICState *s = opaque; |
171 | 610626af | aliguori | int index;
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172 | 610626af | aliguori | |
173 | 610626af | aliguori | addr &= 0xff;
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174 | 610626af | aliguori | if (addr == 0x00) { |
175 | 610626af | aliguori | s->ioregsel = val; |
176 | 610626af | aliguori | return;
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177 | 610626af | aliguori | } else if (addr == 0x10) { |
178 | 9af9b330 | Blue Swirl | DPRINTF("write: %08x = %08x\n", s->ioregsel, val);
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179 | 610626af | aliguori | switch (s->ioregsel) {
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180 | 610626af | aliguori | case 0x00: |
181 | 610626af | aliguori | s->id = (val >> 24) & 0xff; |
182 | 610626af | aliguori | return;
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183 | 610626af | aliguori | case 0x01: |
184 | 610626af | aliguori | case 0x02: |
185 | 610626af | aliguori | return;
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186 | 610626af | aliguori | default:
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187 | 610626af | aliguori | index = (s->ioregsel - 0x10) >> 1; |
188 | 610626af | aliguori | if (index >= 0 && index < IOAPIC_NUM_PINS) { |
189 | 610626af | aliguori | if (s->ioregsel & 1) { |
190 | 610626af | aliguori | s->ioredtbl[index] &= 0xffffffff;
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191 | 610626af | aliguori | s->ioredtbl[index] |= (uint64_t)val << 32;
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192 | 610626af | aliguori | } else {
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193 | 610626af | aliguori | s->ioredtbl[index] &= ~0xffffffffULL;
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194 | 610626af | aliguori | s->ioredtbl[index] |= val; |
195 | 610626af | aliguori | } |
196 | 610626af | aliguori | ioapic_service(s); |
197 | 610626af | aliguori | } |
198 | 610626af | aliguori | } |
199 | 610626af | aliguori | } |
200 | 610626af | aliguori | } |
201 | 610626af | aliguori | |
202 | 3e9e9888 | Juan Quintela | static const VMStateDescription vmstate_ioapic = { |
203 | 3e9e9888 | Juan Quintela | .name = "ioapic",
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204 | 3e9e9888 | Juan Quintela | .version_id = 1,
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205 | 3e9e9888 | Juan Quintela | .minimum_version_id = 1,
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206 | 3e9e9888 | Juan Quintela | .minimum_version_id_old = 1,
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207 | 3e9e9888 | Juan Quintela | .fields = (VMStateField []) { |
208 | 3e9e9888 | Juan Quintela | VMSTATE_UINT8(id, IOAPICState), |
209 | 3e9e9888 | Juan Quintela | VMSTATE_UINT8(ioregsel, IOAPICState), |
210 | 3e9e9888 | Juan Quintela | VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS), |
211 | 3e9e9888 | Juan Quintela | VMSTATE_END_OF_LIST() |
212 | 610626af | aliguori | } |
213 | 3e9e9888 | Juan Quintela | }; |
214 | 610626af | aliguori | |
215 | 96051119 | Blue Swirl | static void ioapic_reset(DeviceState *d) |
216 | 610626af | aliguori | { |
217 | 96051119 | Blue Swirl | IOAPICState *s = DO_UPCAST(IOAPICState, busdev.qdev, d); |
218 | 610626af | aliguori | int i;
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219 | 610626af | aliguori | |
220 | 96051119 | Blue Swirl | s->id = 0;
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221 | 96051119 | Blue Swirl | s->ioregsel = 0;
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222 | 96051119 | Blue Swirl | s->irr = 0;
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223 | 610626af | aliguori | for(i = 0; i < IOAPIC_NUM_PINS; i++) |
224 | 610626af | aliguori | s->ioredtbl[i] = 1 << 16; /* mask LVT */ |
225 | 610626af | aliguori | } |
226 | 610626af | aliguori | |
227 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const ioapic_mem_read[3] = { |
228 | 610626af | aliguori | ioapic_mem_readl, |
229 | 610626af | aliguori | ioapic_mem_readl, |
230 | 610626af | aliguori | ioapic_mem_readl, |
231 | 610626af | aliguori | }; |
232 | 610626af | aliguori | |
233 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const ioapic_mem_write[3] = { |
234 | 610626af | aliguori | ioapic_mem_writel, |
235 | 610626af | aliguori | ioapic_mem_writel, |
236 | 610626af | aliguori | ioapic_mem_writel, |
237 | 610626af | aliguori | }; |
238 | 610626af | aliguori | |
239 | 96051119 | Blue Swirl | static int ioapic_init1(SysBusDevice *dev) |
240 | 610626af | aliguori | { |
241 | 96051119 | Blue Swirl | IOAPICState *s = FROM_SYSBUS(IOAPICState, dev); |
242 | 610626af | aliguori | int io_memory;
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243 | 610626af | aliguori | |
244 | 1eed09cb | Avi Kivity | io_memory = cpu_register_io_memory(ioapic_mem_read, |
245 | 610626af | aliguori | ioapic_mem_write, s); |
246 | 96051119 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, io_memory);
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247 | 610626af | aliguori | |
248 | 96051119 | Blue Swirl | qdev_init_gpio_in(&dev->qdev, ioapic_set_irq, IOAPIC_NUM_PINS); |
249 | 610626af | aliguori | |
250 | 96051119 | Blue Swirl | return 0; |
251 | 610626af | aliguori | } |
252 | 96051119 | Blue Swirl | |
253 | 96051119 | Blue Swirl | static SysBusDeviceInfo ioapic_info = {
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254 | 96051119 | Blue Swirl | .init = ioapic_init1, |
255 | 96051119 | Blue Swirl | .qdev.name = "ioapic",
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256 | 96051119 | Blue Swirl | .qdev.size = sizeof(IOAPICState),
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257 | 96051119 | Blue Swirl | .qdev.vmsd = &vmstate_ioapic, |
258 | 96051119 | Blue Swirl | .qdev.reset = ioapic_reset, |
259 | 96051119 | Blue Swirl | .qdev.no_user = 1,
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260 | 96051119 | Blue Swirl | }; |
261 | 96051119 | Blue Swirl | |
262 | 96051119 | Blue Swirl | static void ioapic_register_devices(void) |
263 | 96051119 | Blue Swirl | { |
264 | 96051119 | Blue Swirl | sysbus_register_withprop(&ioapic_info); |
265 | 96051119 | Blue Swirl | } |
266 | 96051119 | Blue Swirl | |
267 | 96051119 | Blue Swirl | device_init(ioapic_register_devices) |