root / hw / milkymist-tmu2.c @ e72d5c9d
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/*
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* QEMU model of the Milkymist texture mapping unit.
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*
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* Copyright (c) 2010 Michael Walle <michael@walle.cc>
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* Copyright (c) 2010 Sebastien Bourdeauducq
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* <sebastien.bourdeauducq@lekernel.net>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*
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*
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* Specification available at:
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* http://www.milkymist.org/socdoc/tmu2.pdf
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*
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*/
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#include "hw.h" |
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#include "sysbus.h" |
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#include "trace.h" |
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#include "qemu-error.h" |
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#include <X11/Xlib.h> |
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#include <GL/gl.h> |
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#include <GL/glx.h> |
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enum {
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R_CTL = 0,
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R_HMESHLAST, |
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R_VMESHLAST, |
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R_BRIGHTNESS, |
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R_CHROMAKEY, |
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R_VERTICESADDR, |
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R_TEXFBUF, |
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R_TEXHRES, |
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R_TEXVRES, |
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R_TEXHMASK, |
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R_TEXVMASK, |
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R_DSTFBUF, |
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R_DSTHRES, |
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R_DSTVRES, |
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R_DSTHOFFSET, |
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R_DSTVOFFSET, |
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R_DSTSQUAREW, |
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R_DSTSQUAREH, |
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R_ALPHA, |
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R_MAX |
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}; |
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|
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enum {
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CTL_START_BUSY = (1<<0), |
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CTL_CHROMAKEY = (1<<1), |
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}; |
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|
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enum {
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MAX_BRIGHTNESS = 63,
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MAX_ALPHA = 63,
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}; |
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|
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enum {
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MESH_MAXSIZE = 128,
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}; |
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struct vertex {
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int x;
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int y;
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} __attribute__((packed)); |
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|
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struct MilkymistTMU2State {
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SysBusDevice busdev; |
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CharDriverState *chr; |
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qemu_irq irq; |
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|
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uint32_t regs[R_MAX]; |
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|
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Display *dpy; |
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GLXFBConfig glx_fb_config; |
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GLXContext glx_context; |
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}; |
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typedef struct MilkymistTMU2State MilkymistTMU2State; |
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|
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static const int glx_fbconfig_attr[] = { |
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GLX_GREEN_SIZE, 5,
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GLX_GREEN_SIZE, 6,
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GLX_BLUE_SIZE, 5,
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None |
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}; |
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|
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static int tmu2_glx_init(MilkymistTMU2State *s) |
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{
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GLXFBConfig *configs; |
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int nelements;
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|
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s->dpy = XOpenDisplay(NULL); /* FIXME: call XCloseDisplay() */ |
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if (s->dpy == NULL) { |
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return 1; |
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} |
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configs = glXChooseFBConfig(s->dpy, 0, glx_fbconfig_attr, &nelements);
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if (configs == NULL) { |
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return 1; |
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} |
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|
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s->glx_fb_config = *configs; |
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XFree(configs); |
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|
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/* FIXME: call glXDestroyContext() */
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s->glx_context = glXCreateNewContext(s->dpy, s->glx_fb_config, |
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GLX_RGBA_TYPE, NULL, 1); |
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if (s->glx_context == NULL) { |
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return 1; |
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} |
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return 0; |
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} |
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static void tmu2_gl_map(struct vertex *mesh, int texhres, int texvres, |
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int hmeshlast, int vmeshlast, int ho, int vo, int sw, int sh) |
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{
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int x, y;
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int x0, y0, x1, y1;
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int u0, v0, u1, v1, u2, v2, u3, v3;
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double xscale = 1.0 / ((double)(64 * texhres)); |
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double yscale = 1.0 / ((double)(64 * texvres)); |
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glLoadIdentity(); |
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glTranslatef(ho, vo, 0);
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glEnable(GL_TEXTURE_2D); |
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glBegin(GL_QUADS); |
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for (y = 0; y < vmeshlast; y++) { |
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y0 = y * sh; |
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y1 = y0 + sh; |
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for (x = 0; x < hmeshlast; x++) { |
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x0 = x * sw; |
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x1 = x0 + sw; |
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u0 = be32_to_cpu(mesh[MESH_MAXSIZE * y + x].x); |
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v0 = be32_to_cpu(mesh[MESH_MAXSIZE * y + x].y); |
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u1 = be32_to_cpu(mesh[MESH_MAXSIZE * y + x + 1].x);
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v1 = be32_to_cpu(mesh[MESH_MAXSIZE * y + x + 1].y);
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u2 = be32_to_cpu(mesh[MESH_MAXSIZE * (y + 1) + x + 1].x); |
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v2 = be32_to_cpu(mesh[MESH_MAXSIZE * (y + 1) + x + 1].y); |
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u3 = be32_to_cpu(mesh[MESH_MAXSIZE * (y + 1) + x].x);
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v3 = be32_to_cpu(mesh[MESH_MAXSIZE * (y + 1) + x].y);
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glTexCoord2d(((double)u0) * xscale, ((double)v0) * yscale); |
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glVertex3i(x0, y0, 0);
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glTexCoord2d(((double)u1) * xscale, ((double)v1) * yscale); |
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glVertex3i(x1, y0, 0);
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glTexCoord2d(((double)u2) * xscale, ((double)v2) * yscale); |
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glVertex3i(x1, y1, 0);
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glTexCoord2d(((double)u3) * xscale, ((double)v3) * yscale); |
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glVertex3i(x0, y1, 0);
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} |
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} |
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glEnd(); |
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} |
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static void tmu2_start(MilkymistTMU2State *s) |
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{
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int pbuffer_attrib[6] = { |
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GLX_PBUFFER_WIDTH, |
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0,
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GLX_PBUFFER_HEIGHT, |
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0,
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GLX_PRESERVED_CONTENTS, |
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True |
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}; |
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|
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GLXPbuffer pbuffer; |
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GLuint texture; |
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void *fb;
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target_phys_addr_t fb_len; |
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void *mesh;
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target_phys_addr_t mesh_len; |
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float m;
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trace_milkymist_tmu2_start(); |
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/* Create and set up a suitable OpenGL context */
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pbuffer_attrib[1] = s->regs[R_DSTHRES];
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pbuffer_attrib[3] = s->regs[R_DSTVRES];
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pbuffer = glXCreatePbuffer(s->dpy, s->glx_fb_config, pbuffer_attrib); |
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glXMakeContextCurrent(s->dpy, pbuffer, pbuffer, s->glx_context); |
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/* Fixup endianness. TODO: would it work on BE hosts? */
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glPixelStorei(GL_UNPACK_SWAP_BYTES, 1);
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glPixelStorei(GL_PACK_SWAP_BYTES, 1);
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/* Row alignment */
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glPixelStorei(GL_UNPACK_ALIGNMENT, 2);
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glPixelStorei(GL_PACK_ALIGNMENT, 2);
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/* Read the QEMU source framebuffer into an OpenGL texture */
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glGenTextures(1, &texture);
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glBindTexture(GL_TEXTURE_2D, texture); |
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fb_len = 2*s->regs[R_TEXHRES]*s->regs[R_TEXVRES];
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fb = cpu_physical_memory_map(s->regs[R_TEXFBUF], &fb_len, 0);
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if (fb == NULL) { |
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glDeleteTextures(1, &texture);
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glXMakeContextCurrent(s->dpy, None, None, NULL);
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glXDestroyPbuffer(s->dpy, pbuffer); |
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return;
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} |
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glTexImage2D(GL_TEXTURE_2D, 0, 3, s->regs[R_TEXHRES], s->regs[R_TEXVRES], |
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0, GL_RGB, GL_UNSIGNED_SHORT_5_6_5, fb);
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cpu_physical_memory_unmap(fb, fb_len, 0, fb_len);
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/* Set up texturing options */
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/* WARNING:
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* Many cases of TMU2 masking are not supported by OpenGL.
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* We only implement the most common ones:
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* - full bilinear filtering vs. nearest texel
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* - texture clamping vs. texture wrapping
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*/
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if ((s->regs[R_TEXHMASK] & 0x3f) > 0x20) { |
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR); |
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR); |
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} else {
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST); |
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_NEAREST); |
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} |
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if ((s->regs[R_TEXHMASK] >> 6) & s->regs[R_TEXHRES]) { |
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP); |
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} else {
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_REPEAT); |
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} |
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if ((s->regs[R_TEXVMASK] >> 6) & s->regs[R_TEXVRES]) { |
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_CLAMP); |
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} else {
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glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_REPEAT); |
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} |
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|
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/* Translucency and decay */
|
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glEnable(GL_BLEND); |
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glBlendFunc(GL_SRC_ALPHA, GL_ONE_MINUS_SRC_ALPHA); |
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m = (float)(s->regs[R_BRIGHTNESS] + 1) / 64.0f; |
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glColor4f(m, m, m, (float)(s->regs[R_ALPHA] + 1) / 64.0f); |
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|
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/* Read the QEMU dest. framebuffer into the OpenGL framebuffer */
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fb_len = 2 * s->regs[R_DSTHRES] * s->regs[R_DSTVRES];
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fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 0);
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if (fb == NULL) { |
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glDeleteTextures(1, &texture);
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glXMakeContextCurrent(s->dpy, None, None, NULL);
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glXDestroyPbuffer(s->dpy, pbuffer); |
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return;
|
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} |
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|
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glDrawPixels(s->regs[R_DSTHRES], s->regs[R_DSTVRES], GL_RGB, |
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GL_UNSIGNED_SHORT_5_6_5, fb); |
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cpu_physical_memory_unmap(fb, fb_len, 0, fb_len);
|
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glViewport(0, 0, s->regs[R_DSTHRES], s->regs[R_DSTVRES]); |
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glMatrixMode(GL_PROJECTION); |
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glLoadIdentity(); |
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glOrtho(0.0, s->regs[R_DSTHRES], 0.0, s->regs[R_DSTVRES], -1.0, 1.0); |
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glMatrixMode(GL_MODELVIEW); |
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|
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/* Map the texture */
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mesh_len = MESH_MAXSIZE*MESH_MAXSIZE*sizeof(struct vertex); |
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mesh = cpu_physical_memory_map(s->regs[R_VERTICESADDR], &mesh_len, 0);
|
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if (mesh == NULL) { |
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glDeleteTextures(1, &texture);
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glXMakeContextCurrent(s->dpy, None, None, NULL);
|
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glXDestroyPbuffer(s->dpy, pbuffer); |
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return;
|
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} |
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|
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tmu2_gl_map((struct vertex *)mesh,
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s->regs[R_TEXHRES], s->regs[R_TEXVRES], |
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s->regs[R_HMESHLAST], s->regs[R_VMESHLAST], |
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s->regs[R_DSTHOFFSET], s->regs[R_DSTVOFFSET], |
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s->regs[R_DSTSQUAREW], s->regs[R_DSTSQUAREH]); |
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cpu_physical_memory_unmap(mesh, mesh_len, 0, mesh_len);
|
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|
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/* Write back the OpenGL framebuffer to the QEMU framebuffer */
|
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fb_len = 2 * s->regs[R_DSTHRES] * s->regs[R_DSTVRES];
|
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fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 1);
|
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if (fb == NULL) { |
| 291 |
glDeleteTextures(1, &texture);
|
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glXMakeContextCurrent(s->dpy, None, None, NULL);
|
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glXDestroyPbuffer(s->dpy, pbuffer); |
| 294 |
return;
|
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} |
| 296 |
|
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glReadPixels(0, 0, s->regs[R_DSTHRES], s->regs[R_DSTVRES], GL_RGB, |
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GL_UNSIGNED_SHORT_5_6_5, fb); |
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cpu_physical_memory_unmap(fb, fb_len, 1, fb_len);
|
| 300 |
|
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/* Free OpenGL allocs */
|
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glDeleteTextures(1, &texture);
|
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glXMakeContextCurrent(s->dpy, None, None, NULL);
|
| 304 |
glXDestroyPbuffer(s->dpy, pbuffer); |
| 305 |
|
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s->regs[R_CTL] &= ~CTL_START_BUSY; |
| 307 |
|
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trace_milkymist_tmu2_pulse_irq(); |
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qemu_irq_pulse(s->irq); |
| 310 |
} |
| 311 |
|
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static uint32_t tmu2_read(void *opaque, target_phys_addr_t addr) |
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{
|
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MilkymistTMU2State *s = opaque; |
| 315 |
uint32_t r = 0;
|
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|
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addr >>= 2;
|
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switch (addr) {
|
| 319 |
case R_CTL:
|
| 320 |
case R_HMESHLAST:
|
| 321 |
case R_VMESHLAST:
|
| 322 |
case R_BRIGHTNESS:
|
| 323 |
case R_CHROMAKEY:
|
| 324 |
case R_VERTICESADDR:
|
| 325 |
case R_TEXFBUF:
|
| 326 |
case R_TEXHRES:
|
| 327 |
case R_TEXVRES:
|
| 328 |
case R_TEXHMASK:
|
| 329 |
case R_TEXVMASK:
|
| 330 |
case R_DSTFBUF:
|
| 331 |
case R_DSTHRES:
|
| 332 |
case R_DSTVRES:
|
| 333 |
case R_DSTHOFFSET:
|
| 334 |
case R_DSTVOFFSET:
|
| 335 |
case R_DSTSQUAREW:
|
| 336 |
case R_DSTSQUAREH:
|
| 337 |
case R_ALPHA:
|
| 338 |
r = s->regs[addr]; |
| 339 |
break;
|
| 340 |
|
| 341 |
default:
|
| 342 |
error_report("milkymist_tmu2: read access to unknown register 0x"
|
| 343 |
TARGET_FMT_plx, addr << 2);
|
| 344 |
break;
|
| 345 |
} |
| 346 |
|
| 347 |
trace_milkymist_tmu2_memory_read(addr << 2, r);
|
| 348 |
|
| 349 |
return r;
|
| 350 |
} |
| 351 |
|
| 352 |
static void tmu2_check_registers(MilkymistTMU2State *s) |
| 353 |
{
|
| 354 |
if (s->regs[R_BRIGHTNESS] > MAX_BRIGHTNESS) {
|
| 355 |
error_report("milkymist_tmu2: max brightness is %d\n", MAX_BRIGHTNESS);
|
| 356 |
} |
| 357 |
|
| 358 |
if (s->regs[R_ALPHA] > MAX_ALPHA) {
|
| 359 |
error_report("milkymist_tmu2: max alpha is %d\n", MAX_ALPHA);
|
| 360 |
} |
| 361 |
|
| 362 |
if (s->regs[R_VERTICESADDR] & 0x07) { |
| 363 |
error_report("milkymist_tmu2: vertex mesh address has to be 64-bit "
|
| 364 |
"aligned\n");
|
| 365 |
} |
| 366 |
|
| 367 |
if (s->regs[R_TEXFBUF] & 0x01) { |
| 368 |
error_report("milkymist_tmu2: texture buffer address has to be "
|
| 369 |
"16-bit aligned\n");
|
| 370 |
} |
| 371 |
} |
| 372 |
|
| 373 |
static void tmu2_write(void *opaque, target_phys_addr_t addr, uint32_t value) |
| 374 |
{
|
| 375 |
MilkymistTMU2State *s = opaque; |
| 376 |
|
| 377 |
trace_milkymist_tmu2_memory_write(addr, value); |
| 378 |
|
| 379 |
addr >>= 2;
|
| 380 |
switch (addr) {
|
| 381 |
case R_CTL:
|
| 382 |
s->regs[addr] = value; |
| 383 |
if (value & CTL_START_BUSY) {
|
| 384 |
tmu2_start(s); |
| 385 |
} |
| 386 |
break;
|
| 387 |
case R_BRIGHTNESS:
|
| 388 |
case R_HMESHLAST:
|
| 389 |
case R_VMESHLAST:
|
| 390 |
case R_CHROMAKEY:
|
| 391 |
case R_VERTICESADDR:
|
| 392 |
case R_TEXFBUF:
|
| 393 |
case R_TEXHRES:
|
| 394 |
case R_TEXVRES:
|
| 395 |
case R_TEXHMASK:
|
| 396 |
case R_TEXVMASK:
|
| 397 |
case R_DSTFBUF:
|
| 398 |
case R_DSTHRES:
|
| 399 |
case R_DSTVRES:
|
| 400 |
case R_DSTHOFFSET:
|
| 401 |
case R_DSTVOFFSET:
|
| 402 |
case R_DSTSQUAREW:
|
| 403 |
case R_DSTSQUAREH:
|
| 404 |
case R_ALPHA:
|
| 405 |
s->regs[addr] = value; |
| 406 |
break;
|
| 407 |
|
| 408 |
default:
|
| 409 |
error_report("milkymist_tmu2: write access to unknown register 0x"
|
| 410 |
TARGET_FMT_plx, addr << 2);
|
| 411 |
break;
|
| 412 |
} |
| 413 |
|
| 414 |
tmu2_check_registers(s); |
| 415 |
} |
| 416 |
|
| 417 |
static CPUReadMemoryFunc * const tmu2_read_fn[] = { |
| 418 |
NULL,
|
| 419 |
NULL,
|
| 420 |
&tmu2_read, |
| 421 |
}; |
| 422 |
|
| 423 |
static CPUWriteMemoryFunc * const tmu2_write_fn[] = { |
| 424 |
NULL,
|
| 425 |
NULL,
|
| 426 |
&tmu2_write, |
| 427 |
}; |
| 428 |
|
| 429 |
static void milkymist_tmu2_reset(DeviceState *d) |
| 430 |
{
|
| 431 |
MilkymistTMU2State *s = container_of(d, MilkymistTMU2State, busdev.qdev); |
| 432 |
int i;
|
| 433 |
|
| 434 |
for (i = 0; i < R_MAX; i++) { |
| 435 |
s->regs[i] = 0;
|
| 436 |
} |
| 437 |
} |
| 438 |
|
| 439 |
static int milkymist_tmu2_init(SysBusDevice *dev) |
| 440 |
{
|
| 441 |
MilkymistTMU2State *s = FROM_SYSBUS(typeof(*s), dev); |
| 442 |
int tmu2_regs;
|
| 443 |
|
| 444 |
if (tmu2_glx_init(s)) {
|
| 445 |
return 1; |
| 446 |
} |
| 447 |
|
| 448 |
sysbus_init_irq(dev, &s->irq); |
| 449 |
|
| 450 |
tmu2_regs = cpu_register_io_memory(tmu2_read_fn, tmu2_write_fn, s, |
| 451 |
DEVICE_NATIVE_ENDIAN); |
| 452 |
sysbus_init_mmio(dev, R_MAX * 4, tmu2_regs);
|
| 453 |
|
| 454 |
return 0; |
| 455 |
} |
| 456 |
|
| 457 |
static const VMStateDescription vmstate_milkymist_tmu2 = { |
| 458 |
.name = "milkymist-tmu2",
|
| 459 |
.version_id = 1,
|
| 460 |
.minimum_version_id = 1,
|
| 461 |
.minimum_version_id_old = 1,
|
| 462 |
.fields = (VMStateField[]) {
|
| 463 |
VMSTATE_UINT32_ARRAY(regs, MilkymistTMU2State, R_MAX), |
| 464 |
VMSTATE_END_OF_LIST() |
| 465 |
} |
| 466 |
}; |
| 467 |
|
| 468 |
static SysBusDeviceInfo milkymist_tmu2_info = {
|
| 469 |
.init = milkymist_tmu2_init, |
| 470 |
.qdev.name = "milkymist-tmu2",
|
| 471 |
.qdev.size = sizeof(MilkymistTMU2State),
|
| 472 |
.qdev.vmsd = &vmstate_milkymist_tmu2, |
| 473 |
.qdev.reset = milkymist_tmu2_reset, |
| 474 |
}; |
| 475 |
|
| 476 |
static void milkymist_tmu2_register(void) |
| 477 |
{
|
| 478 |
sysbus_register_withprop(&milkymist_tmu2_info); |
| 479 |
} |
| 480 |
|
| 481 |
device_init(milkymist_tmu2_register) |