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1 | 8977f3c1 | bellard | /*
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2 | 890fa6be | bellard | * QEMU Floppy disk emulator (Intel 82078)
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3 | 8977f3c1 | bellard | *
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4 | 8977f3c1 | bellard | * Copyright (c) 2003 Jocelyn Mayer
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5 | 8977f3c1 | bellard | *
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6 | 8977f3c1 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 8977f3c1 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 8977f3c1 | bellard | * in the Software without restriction, including without limitation the rights
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9 | 8977f3c1 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 8977f3c1 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 8977f3c1 | bellard | * furnished to do so, subject to the following conditions:
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12 | 8977f3c1 | bellard | *
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13 | 8977f3c1 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 8977f3c1 | bellard | * all copies or substantial portions of the Software.
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15 | 8977f3c1 | bellard | *
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16 | 8977f3c1 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 8977f3c1 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 8977f3c1 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 8977f3c1 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 8977f3c1 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 8977f3c1 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 8977f3c1 | bellard | * THE SOFTWARE.
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23 | 8977f3c1 | bellard | */
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24 | e80cfcfc | bellard | /*
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25 | e80cfcfc | bellard | * The controller is used in Sun4m systems in a slightly different
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26 | e80cfcfc | bellard | * way. There are changes in DOR register and DMA is not available.
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27 | e80cfcfc | bellard | */
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28 | 8977f3c1 | bellard | #include "vl.h" |
29 | 8977f3c1 | bellard | |
30 | 8977f3c1 | bellard | /********************************************************/
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31 | 8977f3c1 | bellard | /* debug Floppy devices */
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32 | 8977f3c1 | bellard | //#define DEBUG_FLOPPY
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33 | 8977f3c1 | bellard | |
34 | 8977f3c1 | bellard | #ifdef DEBUG_FLOPPY
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35 | 8977f3c1 | bellard | #define FLOPPY_DPRINTF(fmt, args...) \
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36 | 8977f3c1 | bellard | do { printf("FLOPPY: " fmt , ##args); } while (0) |
37 | 8977f3c1 | bellard | #else
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38 | 8977f3c1 | bellard | #define FLOPPY_DPRINTF(fmt, args...)
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39 | 8977f3c1 | bellard | #endif
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40 | 8977f3c1 | bellard | |
41 | 8977f3c1 | bellard | #define FLOPPY_ERROR(fmt, args...) \
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42 | 8977f3c1 | bellard | do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ##args); } while (0) |
43 | 8977f3c1 | bellard | |
44 | 8977f3c1 | bellard | /********************************************************/
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45 | 8977f3c1 | bellard | /* Floppy drive emulation */
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46 | 8977f3c1 | bellard | |
47 | 8977f3c1 | bellard | /* Will always be a fixed parameter for us */
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48 | 8977f3c1 | bellard | #define FD_SECTOR_LEN 512 |
49 | 8977f3c1 | bellard | #define FD_SECTOR_SC 2 /* Sector size code */ |
50 | 8977f3c1 | bellard | |
51 | 8977f3c1 | bellard | /* Floppy disk drive emulation */
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52 | 8977f3c1 | bellard | typedef enum fdisk_type_t { |
53 | 8977f3c1 | bellard | FDRIVE_DISK_288 = 0x01, /* 2.88 MB disk */ |
54 | 8977f3c1 | bellard | FDRIVE_DISK_144 = 0x02, /* 1.44 MB disk */ |
55 | 8977f3c1 | bellard | FDRIVE_DISK_720 = 0x03, /* 720 kB disk */ |
56 | baca51fa | bellard | FDRIVE_DISK_USER = 0x04, /* User defined geometry */ |
57 | baca51fa | bellard | FDRIVE_DISK_NONE = 0x05, /* No disk */ |
58 | 8977f3c1 | bellard | } fdisk_type_t; |
59 | 8977f3c1 | bellard | |
60 | 8977f3c1 | bellard | typedef enum fdrive_type_t { |
61 | 8977f3c1 | bellard | FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */ |
62 | 8977f3c1 | bellard | FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */ |
63 | 8977f3c1 | bellard | FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */ |
64 | 8977f3c1 | bellard | FDRIVE_DRV_NONE = 0x03, /* No drive connected */ |
65 | 8977f3c1 | bellard | } fdrive_type_t; |
66 | 8977f3c1 | bellard | |
67 | baca51fa | bellard | typedef enum fdrive_flags_t { |
68 | baca51fa | bellard | FDRIVE_MOTOR_ON = 0x01, /* motor on/off */ |
69 | baca51fa | bellard | FDRIVE_REVALIDATE = 0x02, /* Revalidated */ |
70 | baca51fa | bellard | } fdrive_flags_t; |
71 | baca51fa | bellard | |
72 | baca51fa | bellard | typedef enum fdisk_flags_t { |
73 | baca51fa | bellard | FDISK_DBL_SIDES = 0x01,
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74 | baca51fa | bellard | } fdisk_flags_t; |
75 | baca51fa | bellard | |
76 | 8977f3c1 | bellard | typedef struct fdrive_t { |
77 | 8977f3c1 | bellard | BlockDriverState *bs; |
78 | 8977f3c1 | bellard | /* Drive status */
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79 | 8977f3c1 | bellard | fdrive_type_t drive; |
80 | baca51fa | bellard | fdrive_flags_t drflags; |
81 | 8977f3c1 | bellard | uint8_t perpendicular; /* 2.88 MB access mode */
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82 | 8977f3c1 | bellard | /* Position */
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83 | 8977f3c1 | bellard | uint8_t head; |
84 | 8977f3c1 | bellard | uint8_t track; |
85 | 8977f3c1 | bellard | uint8_t sect; |
86 | 8977f3c1 | bellard | /* Last operation status */
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87 | 8977f3c1 | bellard | uint8_t dir; /* Direction */
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88 | 8977f3c1 | bellard | uint8_t rw; /* Read/write */
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89 | 8977f3c1 | bellard | /* Media */
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90 | baca51fa | bellard | fdisk_flags_t flags; |
91 | 8977f3c1 | bellard | uint8_t last_sect; /* Nb sector per track */
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92 | 8977f3c1 | bellard | uint8_t max_track; /* Nb of tracks */
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93 | baca51fa | bellard | uint16_t bps; /* Bytes per sector */
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94 | 8977f3c1 | bellard | uint8_t ro; /* Is read-only */
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95 | 8977f3c1 | bellard | } fdrive_t; |
96 | 8977f3c1 | bellard | |
97 | e80cfcfc | bellard | #ifdef TARGET_SPARC
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98 | e80cfcfc | bellard | #define DMA_read_memory(a,b,c,d)
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99 | e80cfcfc | bellard | #define DMA_write_memory(a,b,c,d)
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100 | e80cfcfc | bellard | #define DMA_register_channel(a,b,c)
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101 | e80cfcfc | bellard | #define DMA_hold_DREQ(a)
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102 | e80cfcfc | bellard | #define DMA_release_DREQ(a)
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103 | e80cfcfc | bellard | #define DMA_get_channel_mode(a) (0) |
104 | e80cfcfc | bellard | #define DMA_schedule(a)
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105 | e80cfcfc | bellard | #endif
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106 | e80cfcfc | bellard | |
107 | caed8802 | bellard | static void fd_init (fdrive_t *drv, BlockDriverState *bs) |
108 | 8977f3c1 | bellard | { |
109 | 8977f3c1 | bellard | /* Drive */
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110 | caed8802 | bellard | drv->bs = bs; |
111 | b939777c | bellard | drv->drive = FDRIVE_DRV_NONE; |
112 | baca51fa | bellard | drv->drflags = 0;
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113 | 8977f3c1 | bellard | drv->perpendicular = 0;
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114 | 8977f3c1 | bellard | /* Disk */
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115 | baca51fa | bellard | drv->last_sect = 0;
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116 | 8977f3c1 | bellard | drv->max_track = 0;
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117 | 8977f3c1 | bellard | } |
118 | 8977f3c1 | bellard | |
119 | 8977f3c1 | bellard | static int _fd_sector (uint8_t head, uint8_t track, |
120 | 8977f3c1 | bellard | uint8_t sect, uint8_t last_sect) |
121 | 8977f3c1 | bellard | { |
122 | 8977f3c1 | bellard | return (((track * 2) + head) * last_sect) + sect - 1; |
123 | 8977f3c1 | bellard | } |
124 | 8977f3c1 | bellard | |
125 | 8977f3c1 | bellard | /* Returns current position, in sectors, for given drive */
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126 | 8977f3c1 | bellard | static int fd_sector (fdrive_t *drv) |
127 | 8977f3c1 | bellard | { |
128 | 8977f3c1 | bellard | return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
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129 | 8977f3c1 | bellard | } |
130 | 8977f3c1 | bellard | |
131 | 8977f3c1 | bellard | static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect, |
132 | 8977f3c1 | bellard | int enable_seek)
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133 | 8977f3c1 | bellard | { |
134 | 8977f3c1 | bellard | uint32_t sector; |
135 | baca51fa | bellard | int ret;
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136 | baca51fa | bellard | |
137 | baca51fa | bellard | if (track > drv->max_track ||
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138 | baca51fa | bellard | (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) { |
139 | ed5fd2cc | bellard | FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
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140 | ed5fd2cc | bellard | head, track, sect, 1,
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141 | ed5fd2cc | bellard | (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1, |
142 | ed5fd2cc | bellard | drv->max_track, drv->last_sect); |
143 | 8977f3c1 | bellard | return 2; |
144 | 8977f3c1 | bellard | } |
145 | 8977f3c1 | bellard | if (sect > drv->last_sect) {
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146 | ed5fd2cc | bellard | FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
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147 | ed5fd2cc | bellard | head, track, sect, 1,
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148 | ed5fd2cc | bellard | (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1, |
149 | ed5fd2cc | bellard | drv->max_track, drv->last_sect); |
150 | 8977f3c1 | bellard | return 3; |
151 | 8977f3c1 | bellard | } |
152 | 8977f3c1 | bellard | sector = _fd_sector(head, track, sect, drv->last_sect); |
153 | baca51fa | bellard | ret = 0;
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154 | 8977f3c1 | bellard | if (sector != fd_sector(drv)) {
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155 | 8977f3c1 | bellard | #if 0
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156 | 8977f3c1 | bellard | if (!enable_seek) {
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157 | 8977f3c1 | bellard | FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
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158 | 8977f3c1 | bellard | head, track, sect, 1, drv->max_track, drv->last_sect);
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159 | 8977f3c1 | bellard | return 4;
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160 | 8977f3c1 | bellard | }
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161 | 8977f3c1 | bellard | #endif
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162 | 8977f3c1 | bellard | drv->head = head; |
163 | baca51fa | bellard | if (drv->track != track)
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164 | baca51fa | bellard | ret = 1;
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165 | 8977f3c1 | bellard | drv->track = track; |
166 | 8977f3c1 | bellard | drv->sect = sect; |
167 | 8977f3c1 | bellard | } |
168 | 8977f3c1 | bellard | |
169 | baca51fa | bellard | return ret;
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170 | 8977f3c1 | bellard | } |
171 | 8977f3c1 | bellard | |
172 | 8977f3c1 | bellard | /* Set drive back to track 0 */
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173 | 8977f3c1 | bellard | static void fd_recalibrate (fdrive_t *drv) |
174 | 8977f3c1 | bellard | { |
175 | 8977f3c1 | bellard | FLOPPY_DPRINTF("recalibrate\n");
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176 | 8977f3c1 | bellard | drv->head = 0;
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177 | 8977f3c1 | bellard | drv->track = 0;
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178 | 8977f3c1 | bellard | drv->sect = 1;
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179 | 8977f3c1 | bellard | drv->dir = 1;
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180 | 8977f3c1 | bellard | drv->rw = 0;
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181 | 8977f3c1 | bellard | } |
182 | 8977f3c1 | bellard | |
183 | a541f297 | bellard | /* Recognize floppy formats */
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184 | a541f297 | bellard | typedef struct fd_format_t { |
185 | a541f297 | bellard | fdrive_type_t drive; |
186 | a541f297 | bellard | fdisk_type_t disk; |
187 | a541f297 | bellard | uint8_t last_sect; |
188 | a541f297 | bellard | uint8_t max_track; |
189 | a541f297 | bellard | uint8_t max_head; |
190 | a541f297 | bellard | const unsigned char *str; |
191 | a541f297 | bellard | } fd_format_t; |
192 | a541f297 | bellard | |
193 | a541f297 | bellard | static fd_format_t fd_formats[] = {
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194 | a541f297 | bellard | /* First entry is default format */
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195 | a541f297 | bellard | /* 1.44 MB 3"1/2 floppy disks */
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196 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", }, |
197 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1, "1.6 MB 3\"1/2", }, |
198 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", }, |
199 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", }, |
200 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", }, |
201 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", }, |
202 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", }, |
203 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", }, |
204 | a541f297 | bellard | /* 2.88 MB 3"1/2 floppy disks */
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205 | a541f297 | bellard | { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", }, |
206 | a541f297 | bellard | { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", }, |
207 | a541f297 | bellard | { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1, "3.2 MB 3\"1/2", }, |
208 | a541f297 | bellard | { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", }, |
209 | a541f297 | bellard | { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", }, |
210 | a541f297 | bellard | /* 720 kB 3"1/2 floppy disks */
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211 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 1, "720 kB 3\"1/2", }, |
212 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1, "800 kB 3\"1/2", }, |
213 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1, "820 kB 3\"1/2", }, |
214 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1, "830 kB 3\"1/2", }, |
215 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", }, |
216 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", }, |
217 | a541f297 | bellard | /* 1.2 MB 5"1/4 floppy disks */
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218 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1, "1.2 kB 5\"1/4", }, |
219 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", }, |
220 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", }, |
221 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", }, |
222 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1, "1.6 MB 5\"1/4", }, |
223 | a541f297 | bellard | /* 720 kB 5"1/4 floppy disks */
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224 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 80, 1, "720 kB 5\"1/4", }, |
225 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1, "880 kB 5\"1/4", }, |
226 | a541f297 | bellard | /* 360 kB 5"1/4 floppy disks */
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227 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 1, "360 kB 5\"1/4", }, |
228 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 0, "180 kB 5\"1/4", }, |
229 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1, "410 kB 5\"1/4", }, |
230 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1, "420 kB 5\"1/4", }, |
231 | a541f297 | bellard | /* 320 kB 5"1/4 floppy disks */
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232 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 1, "320 kB 5\"1/4", }, |
233 | a541f297 | bellard | { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 0, "160 kB 5\"1/4", }, |
234 | a541f297 | bellard | /* 360 kB must match 5"1/4 better than 3"1/2... */
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235 | a541f297 | bellard | { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 0, "360 kB 3\"1/2", }, |
236 | a541f297 | bellard | /* end */
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237 | a541f297 | bellard | { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, }, |
238 | a541f297 | bellard | }; |
239 | a541f297 | bellard | |
240 | 8977f3c1 | bellard | /* Revalidate a disk drive after a disk change */
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241 | caed8802 | bellard | static void fd_revalidate (fdrive_t *drv) |
242 | 8977f3c1 | bellard | { |
243 | a541f297 | bellard | fd_format_t *parse; |
244 | a541f297 | bellard | int64_t nb_sectors, size; |
245 | a541f297 | bellard | int i, first_match, match;
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246 | baca51fa | bellard | int nb_heads, max_track, last_sect, ro;
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247 | 8977f3c1 | bellard | |
248 | 8977f3c1 | bellard | FLOPPY_DPRINTF("revalidate\n");
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249 | baca51fa | bellard | drv->drflags &= ~FDRIVE_REVALIDATE; |
250 | a541f297 | bellard | if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) { |
251 | baca51fa | bellard | ro = bdrv_is_read_only(drv->bs); |
252 | a541f297 | bellard | bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect); |
253 | baca51fa | bellard | if (nb_heads != 0 && max_track != 0 && last_sect != 0) { |
254 | ed5fd2cc | bellard | FLOPPY_DPRINTF("User defined disk (%d %d %d)",
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255 | ed5fd2cc | bellard | nb_heads - 1, max_track, last_sect);
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256 | a541f297 | bellard | } else {
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257 | a541f297 | bellard | bdrv_get_geometry(drv->bs, &nb_sectors); |
258 | a541f297 | bellard | match = -1;
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259 | a541f297 | bellard | first_match = -1;
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260 | a541f297 | bellard | for (i = 0;; i++) { |
261 | a541f297 | bellard | parse = &fd_formats[i]; |
262 | a541f297 | bellard | if (parse->drive == FDRIVE_DRV_NONE)
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263 | a541f297 | bellard | break;
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264 | a541f297 | bellard | if (drv->drive == parse->drive ||
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265 | a541f297 | bellard | drv->drive == FDRIVE_DRV_NONE) { |
266 | a541f297 | bellard | size = (parse->max_head + 1) * parse->max_track *
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267 | a541f297 | bellard | parse->last_sect; |
268 | a541f297 | bellard | if (nb_sectors == size) {
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269 | a541f297 | bellard | match = i; |
270 | a541f297 | bellard | break;
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271 | a541f297 | bellard | } |
272 | a541f297 | bellard | if (first_match == -1) |
273 | a541f297 | bellard | first_match = i; |
274 | a541f297 | bellard | } |
275 | a541f297 | bellard | } |
276 | a541f297 | bellard | if (match == -1) { |
277 | a541f297 | bellard | if (first_match == -1) |
278 | a541f297 | bellard | match = 1;
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279 | a541f297 | bellard | else
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280 | a541f297 | bellard | match = first_match; |
281 | a541f297 | bellard | parse = &fd_formats[match]; |
282 | a541f297 | bellard | } |
283 | a541f297 | bellard | nb_heads = parse->max_head + 1;
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284 | a541f297 | bellard | max_track = parse->max_track; |
285 | a541f297 | bellard | last_sect = parse->last_sect; |
286 | a541f297 | bellard | drv->drive = parse->drive; |
287 | ed5fd2cc | bellard | FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
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288 | ed5fd2cc | bellard | nb_heads, max_track, last_sect, ro ? "ro" : "rw"); |
289 | a541f297 | bellard | } |
290 | baca51fa | bellard | if (nb_heads == 1) { |
291 | baca51fa | bellard | drv->flags &= ~FDISK_DBL_SIDES; |
292 | baca51fa | bellard | } else {
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293 | baca51fa | bellard | drv->flags |= FDISK_DBL_SIDES; |
294 | baca51fa | bellard | } |
295 | baca51fa | bellard | drv->max_track = max_track; |
296 | baca51fa | bellard | drv->last_sect = last_sect; |
297 | baca51fa | bellard | drv->ro = ro; |
298 | 8977f3c1 | bellard | } else {
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299 | ed5fd2cc | bellard | FLOPPY_DPRINTF("No disk in drive\n");
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300 | baca51fa | bellard | drv->last_sect = 0;
|
301 | baca51fa | bellard | drv->max_track = 0;
|
302 | baca51fa | bellard | drv->flags &= ~FDISK_DBL_SIDES; |
303 | 8977f3c1 | bellard | } |
304 | baca51fa | bellard | drv->drflags |= FDRIVE_REVALIDATE; |
305 | caed8802 | bellard | } |
306 | caed8802 | bellard | |
307 | 8977f3c1 | bellard | /* Motor control */
|
308 | 8977f3c1 | bellard | static void fd_start (fdrive_t *drv) |
309 | 8977f3c1 | bellard | { |
310 | baca51fa | bellard | drv->drflags |= FDRIVE_MOTOR_ON; |
311 | 8977f3c1 | bellard | } |
312 | 8977f3c1 | bellard | |
313 | 8977f3c1 | bellard | static void fd_stop (fdrive_t *drv) |
314 | 8977f3c1 | bellard | { |
315 | baca51fa | bellard | drv->drflags &= ~FDRIVE_MOTOR_ON; |
316 | 8977f3c1 | bellard | } |
317 | 8977f3c1 | bellard | |
318 | 8977f3c1 | bellard | /* Re-initialise a drives (motor off, repositioned) */
|
319 | 8977f3c1 | bellard | static void fd_reset (fdrive_t *drv) |
320 | 8977f3c1 | bellard | { |
321 | 8977f3c1 | bellard | fd_stop(drv); |
322 | 8977f3c1 | bellard | fd_recalibrate(drv); |
323 | 8977f3c1 | bellard | } |
324 | 8977f3c1 | bellard | |
325 | 8977f3c1 | bellard | /********************************************************/
|
326 | 4b19ec0c | bellard | /* Intel 82078 floppy disk controller emulation */
|
327 | 8977f3c1 | bellard | |
328 | baca51fa | bellard | static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq); |
329 | baca51fa | bellard | static void fdctrl_reset_fifo (fdctrl_t *fdctrl); |
330 | 85571bc7 | bellard | static int fdctrl_transfer_handler (void *opaque, int nchan, |
331 | 85571bc7 | bellard | int dma_pos, int dma_len); |
332 | baca51fa | bellard | static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status); |
333 | ed5fd2cc | bellard | static void fdctrl_result_timer(void *opaque); |
334 | baca51fa | bellard | |
335 | baca51fa | bellard | static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl);
|
336 | baca51fa | bellard | static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl);
|
337 | baca51fa | bellard | static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value); |
338 | baca51fa | bellard | static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl);
|
339 | baca51fa | bellard | static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value); |
340 | baca51fa | bellard | static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl);
|
341 | baca51fa | bellard | static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value); |
342 | baca51fa | bellard | static uint32_t fdctrl_read_data (fdctrl_t *fdctrl);
|
343 | baca51fa | bellard | static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value); |
344 | baca51fa | bellard | static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl);
|
345 | 8977f3c1 | bellard | |
346 | 8977f3c1 | bellard | enum {
|
347 | ed5fd2cc | bellard | FD_CTRL_ACTIVE = 0x01, /* XXX: suppress that */ |
348 | 8977f3c1 | bellard | FD_CTRL_RESET = 0x02,
|
349 | ed5fd2cc | bellard | FD_CTRL_SLEEP = 0x04, /* XXX: suppress that */ |
350 | ed5fd2cc | bellard | FD_CTRL_BUSY = 0x08, /* dma transfer in progress */ |
351 | 8977f3c1 | bellard | FD_CTRL_INTR = 0x10,
|
352 | 8977f3c1 | bellard | }; |
353 | 8977f3c1 | bellard | |
354 | 8977f3c1 | bellard | enum {
|
355 | 8977f3c1 | bellard | FD_DIR_WRITE = 0,
|
356 | 8977f3c1 | bellard | FD_DIR_READ = 1,
|
357 | 8977f3c1 | bellard | FD_DIR_SCANE = 2,
|
358 | 8977f3c1 | bellard | FD_DIR_SCANL = 3,
|
359 | 8977f3c1 | bellard | FD_DIR_SCANH = 4,
|
360 | 8977f3c1 | bellard | }; |
361 | 8977f3c1 | bellard | |
362 | 8977f3c1 | bellard | enum {
|
363 | 8977f3c1 | bellard | FD_STATE_CMD = 0x00,
|
364 | 8977f3c1 | bellard | FD_STATE_STATUS = 0x01,
|
365 | 8977f3c1 | bellard | FD_STATE_DATA = 0x02,
|
366 | 8977f3c1 | bellard | FD_STATE_STATE = 0x03,
|
367 | 8977f3c1 | bellard | FD_STATE_MULTI = 0x10,
|
368 | 8977f3c1 | bellard | FD_STATE_SEEK = 0x20,
|
369 | baca51fa | bellard | FD_STATE_FORMAT = 0x40,
|
370 | 8977f3c1 | bellard | }; |
371 | 8977f3c1 | bellard | |
372 | 8977f3c1 | bellard | #define FD_STATE(state) ((state) & FD_STATE_STATE)
|
373 | baca51fa | bellard | #define FD_SET_STATE(state, new_state) \
|
374 | baca51fa | bellard | do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0) |
375 | 8977f3c1 | bellard | #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
|
376 | 8977f3c1 | bellard | #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
|
377 | baca51fa | bellard | #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
|
378 | 8977f3c1 | bellard | |
379 | baca51fa | bellard | struct fdctrl_t {
|
380 | baca51fa | bellard | fdctrl_t *fdctrl; |
381 | 4b19ec0c | bellard | /* Controller's identification */
|
382 | 8977f3c1 | bellard | uint8_t version; |
383 | 8977f3c1 | bellard | /* HW */
|
384 | 8977f3c1 | bellard | int irq_lvl;
|
385 | 8977f3c1 | bellard | int dma_chann;
|
386 | baca51fa | bellard | uint32_t io_base; |
387 | 4b19ec0c | bellard | /* Controller state */
|
388 | ed5fd2cc | bellard | QEMUTimer *result_timer; |
389 | 8977f3c1 | bellard | uint8_t state; |
390 | 8977f3c1 | bellard | uint8_t dma_en; |
391 | 8977f3c1 | bellard | uint8_t cur_drv; |
392 | 8977f3c1 | bellard | uint8_t bootsel; |
393 | 8977f3c1 | bellard | /* Command FIFO */
|
394 | 8977f3c1 | bellard | uint8_t fifo[FD_SECTOR_LEN]; |
395 | 8977f3c1 | bellard | uint32_t data_pos; |
396 | 8977f3c1 | bellard | uint32_t data_len; |
397 | 8977f3c1 | bellard | uint8_t data_state; |
398 | 8977f3c1 | bellard | uint8_t data_dir; |
399 | 8977f3c1 | bellard | uint8_t int_status; |
400 | 890fa6be | bellard | uint8_t eot; /* last wanted sector */
|
401 | 8977f3c1 | bellard | /* States kept only to be returned back */
|
402 | 8977f3c1 | bellard | /* Timers state */
|
403 | 8977f3c1 | bellard | uint8_t timer0; |
404 | 8977f3c1 | bellard | uint8_t timer1; |
405 | 8977f3c1 | bellard | /* precompensation */
|
406 | 8977f3c1 | bellard | uint8_t precomp_trk; |
407 | 8977f3c1 | bellard | uint8_t config; |
408 | 8977f3c1 | bellard | uint8_t lock; |
409 | 8977f3c1 | bellard | /* Power down config (also with status regB access mode */
|
410 | 8977f3c1 | bellard | uint8_t pwrd; |
411 | 8977f3c1 | bellard | /* Floppy drives */
|
412 | 8977f3c1 | bellard | fdrive_t drives[2];
|
413 | baca51fa | bellard | }; |
414 | baca51fa | bellard | |
415 | baca51fa | bellard | static uint32_t fdctrl_read (void *opaque, uint32_t reg) |
416 | baca51fa | bellard | { |
417 | baca51fa | bellard | fdctrl_t *fdctrl = opaque; |
418 | baca51fa | bellard | uint32_t retval; |
419 | baca51fa | bellard | |
420 | a541f297 | bellard | switch (reg & 0x07) { |
421 | a541f297 | bellard | case 0x01: |
422 | baca51fa | bellard | retval = fdctrl_read_statusB(fdctrl); |
423 | a541f297 | bellard | break;
|
424 | a541f297 | bellard | case 0x02: |
425 | baca51fa | bellard | retval = fdctrl_read_dor(fdctrl); |
426 | a541f297 | bellard | break;
|
427 | a541f297 | bellard | case 0x03: |
428 | baca51fa | bellard | retval = fdctrl_read_tape(fdctrl); |
429 | a541f297 | bellard | break;
|
430 | a541f297 | bellard | case 0x04: |
431 | baca51fa | bellard | retval = fdctrl_read_main_status(fdctrl); |
432 | a541f297 | bellard | break;
|
433 | a541f297 | bellard | case 0x05: |
434 | baca51fa | bellard | retval = fdctrl_read_data(fdctrl); |
435 | a541f297 | bellard | break;
|
436 | a541f297 | bellard | case 0x07: |
437 | baca51fa | bellard | retval = fdctrl_read_dir(fdctrl); |
438 | a541f297 | bellard | break;
|
439 | a541f297 | bellard | default:
|
440 | baca51fa | bellard | retval = (uint32_t)(-1);
|
441 | a541f297 | bellard | break;
|
442 | a541f297 | bellard | } |
443 | ed5fd2cc | bellard | FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval); |
444 | baca51fa | bellard | |
445 | baca51fa | bellard | return retval;
|
446 | baca51fa | bellard | } |
447 | baca51fa | bellard | |
448 | baca51fa | bellard | static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value) |
449 | baca51fa | bellard | { |
450 | baca51fa | bellard | fdctrl_t *fdctrl = opaque; |
451 | baca51fa | bellard | |
452 | ed5fd2cc | bellard | FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value); |
453 | ed5fd2cc | bellard | |
454 | a541f297 | bellard | switch (reg & 0x07) { |
455 | a541f297 | bellard | case 0x02: |
456 | baca51fa | bellard | fdctrl_write_dor(fdctrl, value); |
457 | a541f297 | bellard | break;
|
458 | a541f297 | bellard | case 0x03: |
459 | baca51fa | bellard | fdctrl_write_tape(fdctrl, value); |
460 | a541f297 | bellard | break;
|
461 | a541f297 | bellard | case 0x04: |
462 | baca51fa | bellard | fdctrl_write_rate(fdctrl, value); |
463 | a541f297 | bellard | break;
|
464 | a541f297 | bellard | case 0x05: |
465 | baca51fa | bellard | fdctrl_write_data(fdctrl, value); |
466 | a541f297 | bellard | break;
|
467 | a541f297 | bellard | default:
|
468 | a541f297 | bellard | break;
|
469 | a541f297 | bellard | } |
470 | baca51fa | bellard | } |
471 | baca51fa | bellard | |
472 | e80cfcfc | bellard | static CPUReadMemoryFunc *fdctrl_mem_read[3] = { |
473 | e80cfcfc | bellard | fdctrl_read, |
474 | e80cfcfc | bellard | fdctrl_read, |
475 | e80cfcfc | bellard | fdctrl_read, |
476 | e80cfcfc | bellard | }; |
477 | e80cfcfc | bellard | |
478 | e80cfcfc | bellard | static CPUWriteMemoryFunc *fdctrl_mem_write[3] = { |
479 | e80cfcfc | bellard | fdctrl_write, |
480 | e80cfcfc | bellard | fdctrl_write, |
481 | e80cfcfc | bellard | fdctrl_write, |
482 | e80cfcfc | bellard | }; |
483 | e80cfcfc | bellard | |
484 | baca51fa | bellard | static void fd_change_cb (void *opaque) |
485 | baca51fa | bellard | { |
486 | baca51fa | bellard | fdrive_t *drv = opaque; |
487 | 8977f3c1 | bellard | |
488 | baca51fa | bellard | FLOPPY_DPRINTF("disk change\n");
|
489 | baca51fa | bellard | fd_revalidate(drv); |
490 | baca51fa | bellard | #if 0
|
491 | baca51fa | bellard | fd_recalibrate(drv);
|
492 | baca51fa | bellard | fdctrl_reset_fifo(drv->fdctrl);
|
493 | baca51fa | bellard | fdctrl_raise_irq(drv->fdctrl, 0x20);
|
494 | baca51fa | bellard | #endif
|
495 | baca51fa | bellard | } |
496 | 8977f3c1 | bellard | |
497 | baca51fa | bellard | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, |
498 | baca51fa | bellard | uint32_t io_base, |
499 | baca51fa | bellard | BlockDriverState **fds) |
500 | 8977f3c1 | bellard | { |
501 | baca51fa | bellard | fdctrl_t *fdctrl; |
502 | e80cfcfc | bellard | int io_mem;
|
503 | 8977f3c1 | bellard | int i;
|
504 | 8977f3c1 | bellard | |
505 | 4b19ec0c | bellard | FLOPPY_DPRINTF("init controller\n");
|
506 | baca51fa | bellard | fdctrl = qemu_mallocz(sizeof(fdctrl_t));
|
507 | baca51fa | bellard | if (!fdctrl)
|
508 | baca51fa | bellard | return NULL; |
509 | ed5fd2cc | bellard | fdctrl->result_timer = qemu_new_timer(vm_clock, |
510 | ed5fd2cc | bellard | fdctrl_result_timer, fdctrl); |
511 | ed5fd2cc | bellard | |
512 | 4b19ec0c | bellard | fdctrl->version = 0x90; /* Intel 82078 controller */ |
513 | baca51fa | bellard | fdctrl->irq_lvl = irq_lvl; |
514 | baca51fa | bellard | fdctrl->dma_chann = dma_chann; |
515 | baca51fa | bellard | fdctrl->io_base = io_base; |
516 | a541f297 | bellard | fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */ |
517 | baca51fa | bellard | if (fdctrl->dma_chann != -1) { |
518 | baca51fa | bellard | fdctrl->dma_en = 1;
|
519 | baca51fa | bellard | DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl); |
520 | 8977f3c1 | bellard | } else {
|
521 | baca51fa | bellard | fdctrl->dma_en = 0;
|
522 | 8977f3c1 | bellard | } |
523 | baca51fa | bellard | for (i = 0; i < 2; i++) { |
524 | baca51fa | bellard | fd_init(&fdctrl->drives[i], fds[i]); |
525 | baca51fa | bellard | if (fds[i]) {
|
526 | baca51fa | bellard | bdrv_set_change_cb(fds[i], |
527 | baca51fa | bellard | &fd_change_cb, &fdctrl->drives[i]); |
528 | baca51fa | bellard | } |
529 | caed8802 | bellard | } |
530 | baca51fa | bellard | fdctrl_reset(fdctrl, 0);
|
531 | baca51fa | bellard | fdctrl->state = FD_CTRL_ACTIVE; |
532 | 8977f3c1 | bellard | if (mem_mapped) {
|
533 | e80cfcfc | bellard | io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write, fdctrl);
|
534 | e80cfcfc | bellard | cpu_register_physical_memory(io_base, 0x08, io_mem);
|
535 | 8977f3c1 | bellard | } else {
|
536 | baca51fa | bellard | register_ioport_read(io_base + 0x01, 5, 1, &fdctrl_read, fdctrl); |
537 | baca51fa | bellard | register_ioport_read(io_base + 0x07, 1, 1, &fdctrl_read, fdctrl); |
538 | baca51fa | bellard | register_ioport_write(io_base + 0x01, 5, 1, &fdctrl_write, fdctrl); |
539 | baca51fa | bellard | register_ioport_write(io_base + 0x07, 1, 1, &fdctrl_write, fdctrl); |
540 | 8977f3c1 | bellard | } |
541 | a541f297 | bellard | for (i = 0; i < 2; i++) { |
542 | baca51fa | bellard | fd_revalidate(&fdctrl->drives[i]); |
543 | 8977f3c1 | bellard | } |
544 | a541f297 | bellard | |
545 | baca51fa | bellard | return fdctrl;
|
546 | caed8802 | bellard | } |
547 | 8977f3c1 | bellard | |
548 | baca51fa | bellard | /* XXX: may change if moved to bdrv */
|
549 | baca51fa | bellard | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num) |
550 | caed8802 | bellard | { |
551 | baca51fa | bellard | return fdctrl->drives[drive_num].drive;
|
552 | 8977f3c1 | bellard | } |
553 | 8977f3c1 | bellard | |
554 | 8977f3c1 | bellard | /* Change IRQ state */
|
555 | baca51fa | bellard | static void fdctrl_reset_irq (fdctrl_t *fdctrl) |
556 | 8977f3c1 | bellard | { |
557 | ed5fd2cc | bellard | FLOPPY_DPRINTF("Reset interrupt\n");
|
558 | ed5fd2cc | bellard | pic_set_irq(fdctrl->irq_lvl, 0);
|
559 | ed5fd2cc | bellard | fdctrl->state &= ~FD_CTRL_INTR; |
560 | 8977f3c1 | bellard | } |
561 | 8977f3c1 | bellard | |
562 | baca51fa | bellard | static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status) |
563 | 8977f3c1 | bellard | { |
564 | baca51fa | bellard | if (~(fdctrl->state & FD_CTRL_INTR)) {
|
565 | baca51fa | bellard | pic_set_irq(fdctrl->irq_lvl, 1);
|
566 | baca51fa | bellard | fdctrl->state |= FD_CTRL_INTR; |
567 | 8977f3c1 | bellard | } |
568 | 8977f3c1 | bellard | FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", status);
|
569 | baca51fa | bellard | fdctrl->int_status = status; |
570 | 8977f3c1 | bellard | } |
571 | 8977f3c1 | bellard | |
572 | 4b19ec0c | bellard | /* Reset controller */
|
573 | baca51fa | bellard | static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq) |
574 | 8977f3c1 | bellard | { |
575 | 8977f3c1 | bellard | int i;
|
576 | 8977f3c1 | bellard | |
577 | 4b19ec0c | bellard | FLOPPY_DPRINTF("reset controller\n");
|
578 | baca51fa | bellard | fdctrl_reset_irq(fdctrl); |
579 | 4b19ec0c | bellard | /* Initialise controller */
|
580 | baca51fa | bellard | fdctrl->cur_drv = 0;
|
581 | 8977f3c1 | bellard | /* FIFO state */
|
582 | baca51fa | bellard | fdctrl->data_pos = 0;
|
583 | baca51fa | bellard | fdctrl->data_len = 0;
|
584 | baca51fa | bellard | fdctrl->data_state = FD_STATE_CMD; |
585 | baca51fa | bellard | fdctrl->data_dir = FD_DIR_WRITE; |
586 | 8977f3c1 | bellard | for (i = 0; i < MAX_FD; i++) |
587 | baca51fa | bellard | fd_reset(&fdctrl->drives[i]); |
588 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
589 | 8977f3c1 | bellard | if (do_irq)
|
590 | ed5fd2cc | bellard | fdctrl_raise_irq(fdctrl, 0xc0);
|
591 | baca51fa | bellard | } |
592 | baca51fa | bellard | |
593 | baca51fa | bellard | static inline fdrive_t *drv0 (fdctrl_t *fdctrl) |
594 | baca51fa | bellard | { |
595 | baca51fa | bellard | return &fdctrl->drives[fdctrl->bootsel];
|
596 | baca51fa | bellard | } |
597 | baca51fa | bellard | |
598 | baca51fa | bellard | static inline fdrive_t *drv1 (fdctrl_t *fdctrl) |
599 | baca51fa | bellard | { |
600 | baca51fa | bellard | return &fdctrl->drives[1 - fdctrl->bootsel]; |
601 | baca51fa | bellard | } |
602 | baca51fa | bellard | |
603 | baca51fa | bellard | static fdrive_t *get_cur_drv (fdctrl_t *fdctrl)
|
604 | baca51fa | bellard | { |
605 | baca51fa | bellard | return fdctrl->cur_drv == 0 ? drv0(fdctrl) : drv1(fdctrl); |
606 | 8977f3c1 | bellard | } |
607 | 8977f3c1 | bellard | |
608 | 8977f3c1 | bellard | /* Status B register : 0x01 (read-only) */
|
609 | baca51fa | bellard | static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl)
|
610 | 8977f3c1 | bellard | { |
611 | 8977f3c1 | bellard | FLOPPY_DPRINTF("status register: 0x00\n");
|
612 | 8977f3c1 | bellard | return 0; |
613 | 8977f3c1 | bellard | } |
614 | 8977f3c1 | bellard | |
615 | 8977f3c1 | bellard | /* Digital output register : 0x02 */
|
616 | baca51fa | bellard | static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl)
|
617 | 8977f3c1 | bellard | { |
618 | 8977f3c1 | bellard | uint32_t retval = 0;
|
619 | 8977f3c1 | bellard | |
620 | 8977f3c1 | bellard | /* Drive motors state indicators */
|
621 | baca51fa | bellard | if (drv0(fdctrl)->drflags & FDRIVE_MOTOR_ON)
|
622 | baca51fa | bellard | retval |= 1 << 5; |
623 | baca51fa | bellard | if (drv1(fdctrl)->drflags & FDRIVE_MOTOR_ON)
|
624 | baca51fa | bellard | retval |= 1 << 4; |
625 | 8977f3c1 | bellard | /* DMA enable */
|
626 | baca51fa | bellard | retval |= fdctrl->dma_en << 3;
|
627 | 8977f3c1 | bellard | /* Reset indicator */
|
628 | baca51fa | bellard | retval |= (fdctrl->state & FD_CTRL_RESET) == 0 ? 0x04 : 0; |
629 | 8977f3c1 | bellard | /* Selected drive */
|
630 | baca51fa | bellard | retval |= fdctrl->cur_drv; |
631 | 8977f3c1 | bellard | FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
|
632 | 8977f3c1 | bellard | |
633 | 8977f3c1 | bellard | return retval;
|
634 | 8977f3c1 | bellard | } |
635 | 8977f3c1 | bellard | |
636 | baca51fa | bellard | static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value) |
637 | 8977f3c1 | bellard | { |
638 | 8977f3c1 | bellard | /* Reset mode */
|
639 | baca51fa | bellard | if (fdctrl->state & FD_CTRL_RESET) {
|
640 | 8977f3c1 | bellard | if (!(value & 0x04)) { |
641 | 4b19ec0c | bellard | FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
|
642 | 8977f3c1 | bellard | return;
|
643 | 8977f3c1 | bellard | } |
644 | 8977f3c1 | bellard | } |
645 | 8977f3c1 | bellard | FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
|
646 | 8977f3c1 | bellard | /* Drive motors state indicators */
|
647 | 8977f3c1 | bellard | if (value & 0x20) |
648 | baca51fa | bellard | fd_start(drv1(fdctrl)); |
649 | 8977f3c1 | bellard | else
|
650 | baca51fa | bellard | fd_stop(drv1(fdctrl)); |
651 | 8977f3c1 | bellard | if (value & 0x10) |
652 | baca51fa | bellard | fd_start(drv0(fdctrl)); |
653 | 8977f3c1 | bellard | else
|
654 | baca51fa | bellard | fd_stop(drv0(fdctrl)); |
655 | 8977f3c1 | bellard | /* DMA enable */
|
656 | 8977f3c1 | bellard | #if 0
|
657 | baca51fa | bellard | if (fdctrl->dma_chann != -1)
|
658 | baca51fa | bellard | fdctrl->dma_en = 1 - ((value >> 3) & 1);
|
659 | 8977f3c1 | bellard | #endif
|
660 | 8977f3c1 | bellard | /* Reset */
|
661 | 8977f3c1 | bellard | if (!(value & 0x04)) { |
662 | baca51fa | bellard | if (!(fdctrl->state & FD_CTRL_RESET)) {
|
663 | 4b19ec0c | bellard | FLOPPY_DPRINTF("controller enter RESET state\n");
|
664 | baca51fa | bellard | fdctrl->state |= FD_CTRL_RESET; |
665 | 8977f3c1 | bellard | } |
666 | 8977f3c1 | bellard | } else {
|
667 | baca51fa | bellard | if (fdctrl->state & FD_CTRL_RESET) {
|
668 | 4b19ec0c | bellard | FLOPPY_DPRINTF("controller out of RESET state\n");
|
669 | fb6cf1d0 | bellard | fdctrl_reset(fdctrl, 1);
|
670 | baca51fa | bellard | fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP); |
671 | 8977f3c1 | bellard | } |
672 | 8977f3c1 | bellard | } |
673 | 8977f3c1 | bellard | /* Selected drive */
|
674 | baca51fa | bellard | fdctrl->cur_drv = value & 1;
|
675 | 8977f3c1 | bellard | } |
676 | 8977f3c1 | bellard | |
677 | 8977f3c1 | bellard | /* Tape drive register : 0x03 */
|
678 | baca51fa | bellard | static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl)
|
679 | 8977f3c1 | bellard | { |
680 | 8977f3c1 | bellard | uint32_t retval = 0;
|
681 | 8977f3c1 | bellard | |
682 | 8977f3c1 | bellard | /* Disk boot selection indicator */
|
683 | baca51fa | bellard | retval |= fdctrl->bootsel << 2;
|
684 | 8977f3c1 | bellard | /* Tape indicators: never allowed */
|
685 | 8977f3c1 | bellard | FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
|
686 | 8977f3c1 | bellard | |
687 | 8977f3c1 | bellard | return retval;
|
688 | 8977f3c1 | bellard | } |
689 | 8977f3c1 | bellard | |
690 | baca51fa | bellard | static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value) |
691 | 8977f3c1 | bellard | { |
692 | 8977f3c1 | bellard | /* Reset mode */
|
693 | baca51fa | bellard | if (fdctrl->state & FD_CTRL_RESET) {
|
694 | 4b19ec0c | bellard | FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
|
695 | 8977f3c1 | bellard | return;
|
696 | 8977f3c1 | bellard | } |
697 | 8977f3c1 | bellard | FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
|
698 | 8977f3c1 | bellard | /* Disk boot selection indicator */
|
699 | baca51fa | bellard | fdctrl->bootsel = (value >> 2) & 1; |
700 | 8977f3c1 | bellard | /* Tape indicators: never allow */
|
701 | 8977f3c1 | bellard | } |
702 | 8977f3c1 | bellard | |
703 | 8977f3c1 | bellard | /* Main status register : 0x04 (read) */
|
704 | baca51fa | bellard | static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl)
|
705 | 8977f3c1 | bellard | { |
706 | 8977f3c1 | bellard | uint32_t retval = 0;
|
707 | 8977f3c1 | bellard | |
708 | baca51fa | bellard | fdctrl->state &= ~(FD_CTRL_SLEEP | FD_CTRL_RESET); |
709 | baca51fa | bellard | if (!(fdctrl->state & FD_CTRL_BUSY)) {
|
710 | 8977f3c1 | bellard | /* Data transfer allowed */
|
711 | 8977f3c1 | bellard | retval |= 0x80;
|
712 | 8977f3c1 | bellard | /* Data transfer direction indicator */
|
713 | baca51fa | bellard | if (fdctrl->data_dir == FD_DIR_READ)
|
714 | 8977f3c1 | bellard | retval |= 0x40;
|
715 | 8977f3c1 | bellard | } |
716 | 8977f3c1 | bellard | /* Should handle 0x20 for SPECIFY command */
|
717 | 8977f3c1 | bellard | /* Command busy indicator */
|
718 | baca51fa | bellard | if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA ||
|
719 | baca51fa | bellard | FD_STATE(fdctrl->data_state) == FD_STATE_STATUS) |
720 | 8977f3c1 | bellard | retval |= 0x10;
|
721 | 8977f3c1 | bellard | FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
|
722 | 8977f3c1 | bellard | |
723 | 8977f3c1 | bellard | return retval;
|
724 | 8977f3c1 | bellard | } |
725 | 8977f3c1 | bellard | |
726 | 8977f3c1 | bellard | /* Data select rate register : 0x04 (write) */
|
727 | baca51fa | bellard | static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value) |
728 | 8977f3c1 | bellard | { |
729 | 8977f3c1 | bellard | /* Reset mode */
|
730 | baca51fa | bellard | if (fdctrl->state & FD_CTRL_RESET) {
|
731 | 4b19ec0c | bellard | FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
|
732 | 8977f3c1 | bellard | return;
|
733 | 8977f3c1 | bellard | } |
734 | 8977f3c1 | bellard | FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
|
735 | 8977f3c1 | bellard | /* Reset: autoclear */
|
736 | 8977f3c1 | bellard | if (value & 0x80) { |
737 | baca51fa | bellard | fdctrl->state |= FD_CTRL_RESET; |
738 | baca51fa | bellard | fdctrl_reset(fdctrl, 1);
|
739 | baca51fa | bellard | fdctrl->state &= ~FD_CTRL_RESET; |
740 | 8977f3c1 | bellard | } |
741 | 8977f3c1 | bellard | if (value & 0x40) { |
742 | baca51fa | bellard | fdctrl->state |= FD_CTRL_SLEEP; |
743 | baca51fa | bellard | fdctrl_reset(fdctrl, 1);
|
744 | 8977f3c1 | bellard | } |
745 | 8977f3c1 | bellard | // fdctrl.precomp = (value >> 2) & 0x07;
|
746 | 8977f3c1 | bellard | } |
747 | 8977f3c1 | bellard | |
748 | 8977f3c1 | bellard | /* Digital input register : 0x07 (read-only) */
|
749 | baca51fa | bellard | static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl)
|
750 | 8977f3c1 | bellard | { |
751 | 8977f3c1 | bellard | uint32_t retval = 0;
|
752 | 8977f3c1 | bellard | |
753 | baca51fa | bellard | if (drv0(fdctrl)->drflags & FDRIVE_REVALIDATE ||
|
754 | baca51fa | bellard | drv1(fdctrl)->drflags & FDRIVE_REVALIDATE) |
755 | 8977f3c1 | bellard | retval |= 0x80;
|
756 | 8977f3c1 | bellard | if (retval != 0) |
757 | baca51fa | bellard | FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
|
758 | baca51fa | bellard | drv0(fdctrl)->drflags &= ~FDRIVE_REVALIDATE; |
759 | baca51fa | bellard | drv1(fdctrl)->drflags &= ~FDRIVE_REVALIDATE; |
760 | 8977f3c1 | bellard | |
761 | 8977f3c1 | bellard | return retval;
|
762 | 8977f3c1 | bellard | } |
763 | 8977f3c1 | bellard | |
764 | 8977f3c1 | bellard | /* FIFO state control */
|
765 | baca51fa | bellard | static void fdctrl_reset_fifo (fdctrl_t *fdctrl) |
766 | 8977f3c1 | bellard | { |
767 | baca51fa | bellard | fdctrl->data_dir = FD_DIR_WRITE; |
768 | baca51fa | bellard | fdctrl->data_pos = 0;
|
769 | baca51fa | bellard | FD_SET_STATE(fdctrl->data_state, FD_STATE_CMD); |
770 | 8977f3c1 | bellard | } |
771 | 8977f3c1 | bellard | |
772 | 8977f3c1 | bellard | /* Set FIFO status for the host to read */
|
773 | baca51fa | bellard | static void fdctrl_set_fifo (fdctrl_t *fdctrl, int fifo_len, int do_irq) |
774 | 8977f3c1 | bellard | { |
775 | baca51fa | bellard | fdctrl->data_dir = FD_DIR_READ; |
776 | baca51fa | bellard | fdctrl->data_len = fifo_len; |
777 | baca51fa | bellard | fdctrl->data_pos = 0;
|
778 | baca51fa | bellard | FD_SET_STATE(fdctrl->data_state, FD_STATE_STATUS); |
779 | 8977f3c1 | bellard | if (do_irq)
|
780 | baca51fa | bellard | fdctrl_raise_irq(fdctrl, 0x00);
|
781 | 8977f3c1 | bellard | } |
782 | 8977f3c1 | bellard | |
783 | 8977f3c1 | bellard | /* Set an error: unimplemented/unknown command */
|
784 | baca51fa | bellard | static void fdctrl_unimplemented (fdctrl_t *fdctrl) |
785 | 8977f3c1 | bellard | { |
786 | 8977f3c1 | bellard | #if 0
|
787 | baca51fa | bellard | fdrive_t *cur_drv;
|
788 | baca51fa | bellard | |
789 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl);
|
790 | 890fa6be | bellard | fdctrl->fifo[0] = 0x60 | (cur_drv->head << 2) | fdctrl->cur_drv;
|
791 | baca51fa | bellard | fdctrl->fifo[1] = 0x00;
|
792 | baca51fa | bellard | fdctrl->fifo[2] = 0x00;
|
793 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 3, 1);
|
794 | 8977f3c1 | bellard | #else
|
795 | baca51fa | bellard | // fdctrl_reset_fifo(fdctrl);
|
796 | baca51fa | bellard | fdctrl->fifo[0] = 0x80; |
797 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 0); |
798 | 8977f3c1 | bellard | #endif
|
799 | 8977f3c1 | bellard | } |
800 | 8977f3c1 | bellard | |
801 | 8977f3c1 | bellard | /* Callback for transfer end (stop or abort) */
|
802 | baca51fa | bellard | static void fdctrl_stop_transfer (fdctrl_t *fdctrl, uint8_t status0, |
803 | baca51fa | bellard | uint8_t status1, uint8_t status2) |
804 | 8977f3c1 | bellard | { |
805 | baca51fa | bellard | fdrive_t *cur_drv; |
806 | 8977f3c1 | bellard | |
807 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
808 | 8977f3c1 | bellard | FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
|
809 | 8977f3c1 | bellard | status0, status1, status2, |
810 | 890fa6be | bellard | status0 | (cur_drv->head << 2) | fdctrl->cur_drv);
|
811 | 890fa6be | bellard | fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | fdctrl->cur_drv; |
812 | baca51fa | bellard | fdctrl->fifo[1] = status1;
|
813 | baca51fa | bellard | fdctrl->fifo[2] = status2;
|
814 | baca51fa | bellard | fdctrl->fifo[3] = cur_drv->track;
|
815 | baca51fa | bellard | fdctrl->fifo[4] = cur_drv->head;
|
816 | baca51fa | bellard | fdctrl->fifo[5] = cur_drv->sect;
|
817 | baca51fa | bellard | fdctrl->fifo[6] = FD_SECTOR_SC;
|
818 | baca51fa | bellard | fdctrl->data_dir = FD_DIR_READ; |
819 | ed5fd2cc | bellard | if (fdctrl->state & FD_CTRL_BUSY) {
|
820 | baca51fa | bellard | DMA_release_DREQ(fdctrl->dma_chann); |
821 | ed5fd2cc | bellard | fdctrl->state &= ~FD_CTRL_BUSY; |
822 | ed5fd2cc | bellard | } |
823 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 7, 1); |
824 | 8977f3c1 | bellard | } |
825 | 8977f3c1 | bellard | |
826 | 8977f3c1 | bellard | /* Prepare a data transfer (either DMA or FIFO) */
|
827 | baca51fa | bellard | static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction) |
828 | 8977f3c1 | bellard | { |
829 | baca51fa | bellard | fdrive_t *cur_drv; |
830 | 8977f3c1 | bellard | uint8_t kh, kt, ks; |
831 | 8977f3c1 | bellard | int did_seek;
|
832 | 8977f3c1 | bellard | |
833 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
834 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
835 | baca51fa | bellard | kt = fdctrl->fifo[2];
|
836 | baca51fa | bellard | kh = fdctrl->fifo[3];
|
837 | baca51fa | bellard | ks = fdctrl->fifo[4];
|
838 | 4b19ec0c | bellard | FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
|
839 | baca51fa | bellard | fdctrl->cur_drv, kh, kt, ks, |
840 | 8977f3c1 | bellard | _fd_sector(kh, kt, ks, cur_drv->last_sect)); |
841 | 8977f3c1 | bellard | did_seek = 0;
|
842 | baca51fa | bellard | switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) { |
843 | 8977f3c1 | bellard | case 2: |
844 | 8977f3c1 | bellard | /* sect too big */
|
845 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00); |
846 | baca51fa | bellard | fdctrl->fifo[3] = kt;
|
847 | baca51fa | bellard | fdctrl->fifo[4] = kh;
|
848 | baca51fa | bellard | fdctrl->fifo[5] = ks;
|
849 | 8977f3c1 | bellard | return;
|
850 | 8977f3c1 | bellard | case 3: |
851 | 8977f3c1 | bellard | /* track too big */
|
852 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00); |
853 | baca51fa | bellard | fdctrl->fifo[3] = kt;
|
854 | baca51fa | bellard | fdctrl->fifo[4] = kh;
|
855 | baca51fa | bellard | fdctrl->fifo[5] = ks;
|
856 | 8977f3c1 | bellard | return;
|
857 | 8977f3c1 | bellard | case 4: |
858 | 8977f3c1 | bellard | /* No seek enabled */
|
859 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00); |
860 | baca51fa | bellard | fdctrl->fifo[3] = kt;
|
861 | baca51fa | bellard | fdctrl->fifo[4] = kh;
|
862 | baca51fa | bellard | fdctrl->fifo[5] = ks;
|
863 | 8977f3c1 | bellard | return;
|
864 | 8977f3c1 | bellard | case 1: |
865 | 8977f3c1 | bellard | did_seek = 1;
|
866 | 8977f3c1 | bellard | break;
|
867 | 8977f3c1 | bellard | default:
|
868 | 8977f3c1 | bellard | break;
|
869 | 8977f3c1 | bellard | } |
870 | 8977f3c1 | bellard | /* Set the FIFO state */
|
871 | baca51fa | bellard | fdctrl->data_dir = direction; |
872 | baca51fa | bellard | fdctrl->data_pos = 0;
|
873 | baca51fa | bellard | FD_SET_STATE(fdctrl->data_state, FD_STATE_DATA); /* FIFO ready for data */
|
874 | baca51fa | bellard | if (fdctrl->fifo[0] & 0x80) |
875 | baca51fa | bellard | fdctrl->data_state |= FD_STATE_MULTI; |
876 | baca51fa | bellard | else
|
877 | baca51fa | bellard | fdctrl->data_state &= ~FD_STATE_MULTI; |
878 | 8977f3c1 | bellard | if (did_seek)
|
879 | baca51fa | bellard | fdctrl->data_state |= FD_STATE_SEEK; |
880 | baca51fa | bellard | else
|
881 | baca51fa | bellard | fdctrl->data_state &= ~FD_STATE_SEEK; |
882 | baca51fa | bellard | if (fdctrl->fifo[5] == 00) { |
883 | baca51fa | bellard | fdctrl->data_len = fdctrl->fifo[8];
|
884 | baca51fa | bellard | } else {
|
885 | baca51fa | bellard | int tmp;
|
886 | baca51fa | bellard | fdctrl->data_len = 128 << fdctrl->fifo[5]; |
887 | baca51fa | bellard | tmp = (cur_drv->last_sect - ks + 1);
|
888 | baca51fa | bellard | if (fdctrl->fifo[0] & 0x80) |
889 | baca51fa | bellard | tmp += cur_drv->last_sect; |
890 | baca51fa | bellard | fdctrl->data_len *= tmp; |
891 | baca51fa | bellard | } |
892 | 890fa6be | bellard | fdctrl->eot = fdctrl->fifo[6];
|
893 | baca51fa | bellard | if (fdctrl->dma_en) {
|
894 | 8977f3c1 | bellard | int dma_mode;
|
895 | 8977f3c1 | bellard | /* DMA transfer are enabled. Check if DMA channel is well programmed */
|
896 | baca51fa | bellard | dma_mode = DMA_get_channel_mode(fdctrl->dma_chann); |
897 | 8977f3c1 | bellard | dma_mode = (dma_mode >> 2) & 3; |
898 | baca51fa | bellard | FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
|
899 | baca51fa | bellard | dma_mode, direction, |
900 | baca51fa | bellard | (128 << fdctrl->fifo[5]) * |
901 | baca51fa | bellard | (cur_drv->last_sect - ks + 1), fdctrl->data_len);
|
902 | 8977f3c1 | bellard | if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
|
903 | 8977f3c1 | bellard | direction == FD_DIR_SCANH) && dma_mode == 0) ||
|
904 | 8977f3c1 | bellard | (direction == FD_DIR_WRITE && dma_mode == 2) ||
|
905 | 8977f3c1 | bellard | (direction == FD_DIR_READ && dma_mode == 1)) {
|
906 | 8977f3c1 | bellard | /* No access is allowed until DMA transfer has completed */
|
907 | baca51fa | bellard | fdctrl->state |= FD_CTRL_BUSY; |
908 | 4b19ec0c | bellard | /* Now, we just have to wait for the DMA controller to
|
909 | 8977f3c1 | bellard | * recall us...
|
910 | 8977f3c1 | bellard | */
|
911 | baca51fa | bellard | DMA_hold_DREQ(fdctrl->dma_chann); |
912 | baca51fa | bellard | DMA_schedule(fdctrl->dma_chann); |
913 | 8977f3c1 | bellard | return;
|
914 | baca51fa | bellard | } else {
|
915 | baca51fa | bellard | FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
|
916 | 8977f3c1 | bellard | } |
917 | 8977f3c1 | bellard | } |
918 | 8977f3c1 | bellard | FLOPPY_DPRINTF("start non-DMA transfer\n");
|
919 | 8977f3c1 | bellard | /* IO based transfer: calculate len */
|
920 | baca51fa | bellard | fdctrl_raise_irq(fdctrl, 0x00);
|
921 | 8977f3c1 | bellard | |
922 | 8977f3c1 | bellard | return;
|
923 | 8977f3c1 | bellard | } |
924 | 8977f3c1 | bellard | |
925 | 8977f3c1 | bellard | /* Prepare a transfer of deleted data */
|
926 | baca51fa | bellard | static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction) |
927 | 8977f3c1 | bellard | { |
928 | 8977f3c1 | bellard | /* We don't handle deleted data,
|
929 | 8977f3c1 | bellard | * so we don't return *ANYTHING*
|
930 | 8977f3c1 | bellard | */
|
931 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00); |
932 | 8977f3c1 | bellard | } |
933 | 8977f3c1 | bellard | |
934 | 8977f3c1 | bellard | /* handlers for DMA transfers */
|
935 | 85571bc7 | bellard | static int fdctrl_transfer_handler (void *opaque, int nchan, |
936 | 85571bc7 | bellard | int dma_pos, int dma_len) |
937 | 8977f3c1 | bellard | { |
938 | baca51fa | bellard | fdctrl_t *fdctrl; |
939 | baca51fa | bellard | fdrive_t *cur_drv; |
940 | baca51fa | bellard | int len, start_pos, rel_pos;
|
941 | 8977f3c1 | bellard | uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00; |
942 | 8977f3c1 | bellard | |
943 | baca51fa | bellard | fdctrl = opaque; |
944 | baca51fa | bellard | if (!(fdctrl->state & FD_CTRL_BUSY)) {
|
945 | 8977f3c1 | bellard | FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
|
946 | 8977f3c1 | bellard | return 0; |
947 | 8977f3c1 | bellard | } |
948 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
949 | baca51fa | bellard | if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
|
950 | baca51fa | bellard | fdctrl->data_dir == FD_DIR_SCANH) |
951 | 8977f3c1 | bellard | status2 = 0x04;
|
952 | 85571bc7 | bellard | if (dma_len > fdctrl->data_len)
|
953 | 85571bc7 | bellard | dma_len = fdctrl->data_len; |
954 | 890fa6be | bellard | if (cur_drv->bs == NULL) { |
955 | baca51fa | bellard | if (fdctrl->data_dir == FD_DIR_WRITE)
|
956 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00); |
957 | baca51fa | bellard | else
|
958 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00); |
959 | baca51fa | bellard | len = 0;
|
960 | 890fa6be | bellard | goto transfer_error;
|
961 | 890fa6be | bellard | } |
962 | baca51fa | bellard | rel_pos = fdctrl->data_pos % FD_SECTOR_LEN; |
963 | 85571bc7 | bellard | for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
|
964 | 85571bc7 | bellard | len = dma_len - fdctrl->data_pos; |
965 | baca51fa | bellard | if (len + rel_pos > FD_SECTOR_LEN)
|
966 | baca51fa | bellard | len = FD_SECTOR_LEN - rel_pos; |
967 | baca51fa | bellard | FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x %02x "
|
968 | baca51fa | bellard | "(%d-0x%08x 0x%08x)\n", len, size, fdctrl->data_pos,
|
969 | baca51fa | bellard | fdctrl->data_len, fdctrl->cur_drv, cur_drv->head, |
970 | baca51fa | bellard | cur_drv->track, cur_drv->sect, fd_sector(cur_drv), |
971 | baca51fa | bellard | fd_sector(cur_drv) * 512, addr);
|
972 | baca51fa | bellard | if (fdctrl->data_dir != FD_DIR_WRITE ||
|
973 | baca51fa | bellard | len < FD_SECTOR_LEN || rel_pos != 0) {
|
974 | baca51fa | bellard | /* READ & SCAN commands and realign to a sector for WRITE */
|
975 | baca51fa | bellard | if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
|
976 | baca51fa | bellard | fdctrl->fifo, 1) < 0) { |
977 | 8977f3c1 | bellard | FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
|
978 | 8977f3c1 | bellard | fd_sector(cur_drv)); |
979 | 8977f3c1 | bellard | /* Sure, image size is too small... */
|
980 | baca51fa | bellard | memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
|
981 | 8977f3c1 | bellard | } |
982 | 890fa6be | bellard | } |
983 | baca51fa | bellard | switch (fdctrl->data_dir) {
|
984 | baca51fa | bellard | case FD_DIR_READ:
|
985 | baca51fa | bellard | /* READ commands */
|
986 | 85571bc7 | bellard | DMA_write_memory (nchan, fdctrl->fifo + rel_pos, |
987 | 85571bc7 | bellard | fdctrl->data_pos, len); |
988 | 85571bc7 | bellard | /* cpu_physical_memory_write(addr + fdctrl->data_pos, */
|
989 | 85571bc7 | bellard | /* fdctrl->fifo + rel_pos, len); */
|
990 | baca51fa | bellard | break;
|
991 | baca51fa | bellard | case FD_DIR_WRITE:
|
992 | baca51fa | bellard | /* WRITE commands */
|
993 | 85571bc7 | bellard | DMA_read_memory (nchan, fdctrl->fifo + rel_pos, |
994 | 85571bc7 | bellard | fdctrl->data_pos, len); |
995 | 85571bc7 | bellard | /* cpu_physical_memory_read(addr + fdctrl->data_pos, */
|
996 | 85571bc7 | bellard | /* fdctrl->fifo + rel_pos, len); */
|
997 | baca51fa | bellard | if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
|
998 | baca51fa | bellard | fdctrl->fifo, 1) < 0) { |
999 | baca51fa | bellard | FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
|
1000 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00); |
1001 | baca51fa | bellard | goto transfer_error;
|
1002 | 890fa6be | bellard | } |
1003 | baca51fa | bellard | break;
|
1004 | baca51fa | bellard | default:
|
1005 | baca51fa | bellard | /* SCAN commands */
|
1006 | baca51fa | bellard | { |
1007 | baca51fa | bellard | uint8_t tmpbuf[FD_SECTOR_LEN]; |
1008 | baca51fa | bellard | int ret;
|
1009 | 85571bc7 | bellard | DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len); |
1010 | 85571bc7 | bellard | /* cpu_physical_memory_read(addr + fdctrl->data_pos, */
|
1011 | 85571bc7 | bellard | /* tmpbuf, len); */
|
1012 | baca51fa | bellard | ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len); |
1013 | 8977f3c1 | bellard | if (ret == 0) { |
1014 | 8977f3c1 | bellard | status2 = 0x08;
|
1015 | 8977f3c1 | bellard | goto end_transfer;
|
1016 | 8977f3c1 | bellard | } |
1017 | baca51fa | bellard | if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) || |
1018 | baca51fa | bellard | (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
|
1019 | 8977f3c1 | bellard | status2 = 0x00;
|
1020 | 8977f3c1 | bellard | goto end_transfer;
|
1021 | 8977f3c1 | bellard | } |
1022 | 8977f3c1 | bellard | } |
1023 | baca51fa | bellard | break;
|
1024 | 8977f3c1 | bellard | } |
1025 | baca51fa | bellard | fdctrl->data_pos += len; |
1026 | baca51fa | bellard | rel_pos = fdctrl->data_pos % FD_SECTOR_LEN; |
1027 | baca51fa | bellard | if (rel_pos == 0) { |
1028 | 8977f3c1 | bellard | /* Seek to next sector */
|
1029 | baca51fa | bellard | FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d) (%d)\n",
|
1030 | baca51fa | bellard | cur_drv->head, cur_drv->track, cur_drv->sect, |
1031 | baca51fa | bellard | fd_sector(cur_drv), |
1032 | baca51fa | bellard | fdctrl->data_pos - size); |
1033 | 890fa6be | bellard | /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
|
1034 | 890fa6be | bellard | error in fact */
|
1035 | 890fa6be | bellard | if (cur_drv->sect >= cur_drv->last_sect ||
|
1036 | 890fa6be | bellard | cur_drv->sect == fdctrl->eot) { |
1037 | baca51fa | bellard | cur_drv->sect = 1;
|
1038 | baca51fa | bellard | if (FD_MULTI_TRACK(fdctrl->data_state)) {
|
1039 | baca51fa | bellard | if (cur_drv->head == 0 && |
1040 | baca51fa | bellard | (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
|
1041 | 890fa6be | bellard | cur_drv->head = 1;
|
1042 | 890fa6be | bellard | } else {
|
1043 | 890fa6be | bellard | cur_drv->head = 0;
|
1044 | baca51fa | bellard | cur_drv->track++; |
1045 | baca51fa | bellard | if ((cur_drv->flags & FDISK_DBL_SIDES) == 0) |
1046 | baca51fa | bellard | break;
|
1047 | 890fa6be | bellard | } |
1048 | 890fa6be | bellard | } else {
|
1049 | 890fa6be | bellard | cur_drv->track++; |
1050 | 890fa6be | bellard | break;
|
1051 | 8977f3c1 | bellard | } |
1052 | baca51fa | bellard | FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
|
1053 | baca51fa | bellard | cur_drv->head, cur_drv->track, |
1054 | baca51fa | bellard | cur_drv->sect, fd_sector(cur_drv)); |
1055 | 890fa6be | bellard | } else {
|
1056 | 890fa6be | bellard | cur_drv->sect++; |
1057 | 8977f3c1 | bellard | } |
1058 | 8977f3c1 | bellard | } |
1059 | 8977f3c1 | bellard | } |
1060 | 8977f3c1 | bellard | end_transfer:
|
1061 | baca51fa | bellard | len = fdctrl->data_pos - start_pos; |
1062 | baca51fa | bellard | FLOPPY_DPRINTF("end transfer %d %d %d\n",
|
1063 | baca51fa | bellard | fdctrl->data_pos, len, fdctrl->data_len); |
1064 | baca51fa | bellard | if (fdctrl->data_dir == FD_DIR_SCANE ||
|
1065 | baca51fa | bellard | fdctrl->data_dir == FD_DIR_SCANL || |
1066 | baca51fa | bellard | fdctrl->data_dir == FD_DIR_SCANH) |
1067 | 8977f3c1 | bellard | status2 = 0x08;
|
1068 | baca51fa | bellard | if (FD_DID_SEEK(fdctrl->data_state))
|
1069 | 8977f3c1 | bellard | status0 |= 0x20;
|
1070 | baca51fa | bellard | fdctrl->data_len -= len; |
1071 | baca51fa | bellard | // if (fdctrl->data_len == 0)
|
1072 | 890fa6be | bellard | fdctrl_stop_transfer(fdctrl, status0, status1, status2); |
1073 | 8977f3c1 | bellard | transfer_error:
|
1074 | 8977f3c1 | bellard | |
1075 | baca51fa | bellard | return len;
|
1076 | 8977f3c1 | bellard | } |
1077 | 8977f3c1 | bellard | |
1078 | 8977f3c1 | bellard | /* Data register : 0x05 */
|
1079 | baca51fa | bellard | static uint32_t fdctrl_read_data (fdctrl_t *fdctrl)
|
1080 | 8977f3c1 | bellard | { |
1081 | baca51fa | bellard | fdrive_t *cur_drv; |
1082 | 8977f3c1 | bellard | uint32_t retval = 0;
|
1083 | 8977f3c1 | bellard | int pos, len;
|
1084 | 8977f3c1 | bellard | |
1085 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1086 | baca51fa | bellard | fdctrl->state &= ~FD_CTRL_SLEEP; |
1087 | baca51fa | bellard | if (FD_STATE(fdctrl->data_state) == FD_STATE_CMD) {
|
1088 | 8977f3c1 | bellard | FLOPPY_ERROR("can't read data in CMD state\n");
|
1089 | 8977f3c1 | bellard | return 0; |
1090 | 8977f3c1 | bellard | } |
1091 | baca51fa | bellard | pos = fdctrl->data_pos; |
1092 | baca51fa | bellard | if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
|
1093 | 8977f3c1 | bellard | pos %= FD_SECTOR_LEN; |
1094 | 8977f3c1 | bellard | if (pos == 0) { |
1095 | baca51fa | bellard | len = fdctrl->data_len - fdctrl->data_pos; |
1096 | 8977f3c1 | bellard | if (len > FD_SECTOR_LEN)
|
1097 | 8977f3c1 | bellard | len = FD_SECTOR_LEN; |
1098 | 8977f3c1 | bellard | bdrv_read(cur_drv->bs, fd_sector(cur_drv), |
1099 | baca51fa | bellard | fdctrl->fifo, len); |
1100 | 8977f3c1 | bellard | } |
1101 | 8977f3c1 | bellard | } |
1102 | baca51fa | bellard | retval = fdctrl->fifo[pos]; |
1103 | baca51fa | bellard | if (++fdctrl->data_pos == fdctrl->data_len) {
|
1104 | baca51fa | bellard | fdctrl->data_pos = 0;
|
1105 | 890fa6be | bellard | /* Switch from transfer mode to status mode
|
1106 | 8977f3c1 | bellard | * then from status mode to command mode
|
1107 | 8977f3c1 | bellard | */
|
1108 | ed5fd2cc | bellard | if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
|
1109 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00); |
1110 | ed5fd2cc | bellard | } else {
|
1111 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1112 | ed5fd2cc | bellard | fdctrl_reset_irq(fdctrl); |
1113 | ed5fd2cc | bellard | } |
1114 | 8977f3c1 | bellard | } |
1115 | 8977f3c1 | bellard | FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
|
1116 | 8977f3c1 | bellard | |
1117 | 8977f3c1 | bellard | return retval;
|
1118 | 8977f3c1 | bellard | } |
1119 | 8977f3c1 | bellard | |
1120 | baca51fa | bellard | static void fdctrl_format_sector (fdctrl_t *fdctrl) |
1121 | 8977f3c1 | bellard | { |
1122 | baca51fa | bellard | fdrive_t *cur_drv; |
1123 | baca51fa | bellard | uint8_t kh, kt, ks; |
1124 | baca51fa | bellard | int did_seek;
|
1125 | 8977f3c1 | bellard | |
1126 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
1127 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1128 | baca51fa | bellard | kt = fdctrl->fifo[6];
|
1129 | baca51fa | bellard | kh = fdctrl->fifo[7];
|
1130 | baca51fa | bellard | ks = fdctrl->fifo[8];
|
1131 | baca51fa | bellard | FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
|
1132 | baca51fa | bellard | fdctrl->cur_drv, kh, kt, ks, |
1133 | baca51fa | bellard | _fd_sector(kh, kt, ks, cur_drv->last_sect)); |
1134 | baca51fa | bellard | did_seek = 0;
|
1135 | baca51fa | bellard | switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) { |
1136 | baca51fa | bellard | case 2: |
1137 | baca51fa | bellard | /* sect too big */
|
1138 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00); |
1139 | baca51fa | bellard | fdctrl->fifo[3] = kt;
|
1140 | baca51fa | bellard | fdctrl->fifo[4] = kh;
|
1141 | baca51fa | bellard | fdctrl->fifo[5] = ks;
|
1142 | baca51fa | bellard | return;
|
1143 | baca51fa | bellard | case 3: |
1144 | baca51fa | bellard | /* track too big */
|
1145 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00); |
1146 | baca51fa | bellard | fdctrl->fifo[3] = kt;
|
1147 | baca51fa | bellard | fdctrl->fifo[4] = kh;
|
1148 | baca51fa | bellard | fdctrl->fifo[5] = ks;
|
1149 | baca51fa | bellard | return;
|
1150 | baca51fa | bellard | case 4: |
1151 | baca51fa | bellard | /* No seek enabled */
|
1152 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00); |
1153 | baca51fa | bellard | fdctrl->fifo[3] = kt;
|
1154 | baca51fa | bellard | fdctrl->fifo[4] = kh;
|
1155 | baca51fa | bellard | fdctrl->fifo[5] = ks;
|
1156 | baca51fa | bellard | return;
|
1157 | baca51fa | bellard | case 1: |
1158 | baca51fa | bellard | did_seek = 1;
|
1159 | baca51fa | bellard | fdctrl->data_state |= FD_STATE_SEEK; |
1160 | baca51fa | bellard | break;
|
1161 | baca51fa | bellard | default:
|
1162 | baca51fa | bellard | break;
|
1163 | baca51fa | bellard | } |
1164 | baca51fa | bellard | memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
|
1165 | baca51fa | bellard | if (cur_drv->bs == NULL || |
1166 | baca51fa | bellard | bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) { |
1167 | baca51fa | bellard | FLOPPY_ERROR("formating sector %d\n", fd_sector(cur_drv));
|
1168 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00); |
1169 | baca51fa | bellard | } else {
|
1170 | baca51fa | bellard | if (cur_drv->sect == cur_drv->last_sect) {
|
1171 | baca51fa | bellard | fdctrl->data_state &= ~FD_STATE_FORMAT; |
1172 | baca51fa | bellard | /* Last sector done */
|
1173 | baca51fa | bellard | if (FD_DID_SEEK(fdctrl->data_state))
|
1174 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00); |
1175 | baca51fa | bellard | else
|
1176 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); |
1177 | baca51fa | bellard | } else {
|
1178 | baca51fa | bellard | /* More to do */
|
1179 | baca51fa | bellard | fdctrl->data_pos = 0;
|
1180 | baca51fa | bellard | fdctrl->data_len = 4;
|
1181 | baca51fa | bellard | } |
1182 | baca51fa | bellard | } |
1183 | baca51fa | bellard | } |
1184 | baca51fa | bellard | |
1185 | baca51fa | bellard | static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value) |
1186 | baca51fa | bellard | { |
1187 | baca51fa | bellard | fdrive_t *cur_drv; |
1188 | baca51fa | bellard | |
1189 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1190 | 8977f3c1 | bellard | /* Reset mode */
|
1191 | baca51fa | bellard | if (fdctrl->state & FD_CTRL_RESET) {
|
1192 | 4b19ec0c | bellard | FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
|
1193 | 8977f3c1 | bellard | return;
|
1194 | 8977f3c1 | bellard | } |
1195 | baca51fa | bellard | fdctrl->state &= ~FD_CTRL_SLEEP; |
1196 | baca51fa | bellard | if (FD_STATE(fdctrl->data_state) == FD_STATE_STATUS) {
|
1197 | 8977f3c1 | bellard | FLOPPY_ERROR("can't write data in status mode\n");
|
1198 | 8977f3c1 | bellard | return;
|
1199 | 8977f3c1 | bellard | } |
1200 | 8977f3c1 | bellard | /* Is it write command time ? */
|
1201 | baca51fa | bellard | if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
|
1202 | 8977f3c1 | bellard | /* FIFO data write */
|
1203 | baca51fa | bellard | fdctrl->fifo[fdctrl->data_pos++] = value; |
1204 | baca51fa | bellard | if (fdctrl->data_pos % FD_SECTOR_LEN == (FD_SECTOR_LEN - 1) || |
1205 | baca51fa | bellard | fdctrl->data_pos == fdctrl->data_len) { |
1206 | 8977f3c1 | bellard | bdrv_write(cur_drv->bs, fd_sector(cur_drv), |
1207 | baca51fa | bellard | fdctrl->fifo, FD_SECTOR_LEN); |
1208 | 8977f3c1 | bellard | } |
1209 | 890fa6be | bellard | /* Switch from transfer mode to status mode
|
1210 | 8977f3c1 | bellard | * then from status mode to command mode
|
1211 | 8977f3c1 | bellard | */
|
1212 | baca51fa | bellard | if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA)
|
1213 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00); |
1214 | 8977f3c1 | bellard | return;
|
1215 | 8977f3c1 | bellard | } |
1216 | baca51fa | bellard | if (fdctrl->data_pos == 0) { |
1217 | 8977f3c1 | bellard | /* Command */
|
1218 | 8977f3c1 | bellard | switch (value & 0x5F) { |
1219 | 8977f3c1 | bellard | case 0x46: |
1220 | 8977f3c1 | bellard | /* READ variants */
|
1221 | 8977f3c1 | bellard | FLOPPY_DPRINTF("READ command\n");
|
1222 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1223 | baca51fa | bellard | fdctrl->data_len = 9;
|
1224 | 8977f3c1 | bellard | goto enqueue;
|
1225 | 8977f3c1 | bellard | case 0x4C: |
1226 | 8977f3c1 | bellard | /* READ_DELETED variants */
|
1227 | 8977f3c1 | bellard | FLOPPY_DPRINTF("READ_DELETED command\n");
|
1228 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1229 | baca51fa | bellard | fdctrl->data_len = 9;
|
1230 | 8977f3c1 | bellard | goto enqueue;
|
1231 | 8977f3c1 | bellard | case 0x50: |
1232 | 8977f3c1 | bellard | /* SCAN_EQUAL variants */
|
1233 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SCAN_EQUAL command\n");
|
1234 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1235 | baca51fa | bellard | fdctrl->data_len = 9;
|
1236 | 8977f3c1 | bellard | goto enqueue;
|
1237 | 8977f3c1 | bellard | case 0x56: |
1238 | 8977f3c1 | bellard | /* VERIFY variants */
|
1239 | 8977f3c1 | bellard | FLOPPY_DPRINTF("VERIFY command\n");
|
1240 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1241 | baca51fa | bellard | fdctrl->data_len = 9;
|
1242 | 8977f3c1 | bellard | goto enqueue;
|
1243 | 8977f3c1 | bellard | case 0x59: |
1244 | 8977f3c1 | bellard | /* SCAN_LOW_OR_EQUAL variants */
|
1245 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SCAN_LOW_OR_EQUAL command\n");
|
1246 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1247 | baca51fa | bellard | fdctrl->data_len = 9;
|
1248 | 8977f3c1 | bellard | goto enqueue;
|
1249 | 8977f3c1 | bellard | case 0x5D: |
1250 | 8977f3c1 | bellard | /* SCAN_HIGH_OR_EQUAL variants */
|
1251 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SCAN_HIGH_OR_EQUAL command\n");
|
1252 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1253 | baca51fa | bellard | fdctrl->data_len = 9;
|
1254 | 8977f3c1 | bellard | goto enqueue;
|
1255 | 8977f3c1 | bellard | default:
|
1256 | 8977f3c1 | bellard | break;
|
1257 | 8977f3c1 | bellard | } |
1258 | 8977f3c1 | bellard | switch (value & 0x7F) { |
1259 | 8977f3c1 | bellard | case 0x45: |
1260 | 8977f3c1 | bellard | /* WRITE variants */
|
1261 | 8977f3c1 | bellard | FLOPPY_DPRINTF("WRITE command\n");
|
1262 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1263 | baca51fa | bellard | fdctrl->data_len = 9;
|
1264 | 8977f3c1 | bellard | goto enqueue;
|
1265 | 8977f3c1 | bellard | case 0x49: |
1266 | 8977f3c1 | bellard | /* WRITE_DELETED variants */
|
1267 | 8977f3c1 | bellard | FLOPPY_DPRINTF("WRITE_DELETED command\n");
|
1268 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1269 | baca51fa | bellard | fdctrl->data_len = 9;
|
1270 | 8977f3c1 | bellard | goto enqueue;
|
1271 | 8977f3c1 | bellard | default:
|
1272 | 8977f3c1 | bellard | break;
|
1273 | 8977f3c1 | bellard | } |
1274 | 8977f3c1 | bellard | switch (value) {
|
1275 | 8977f3c1 | bellard | case 0x03: |
1276 | 8977f3c1 | bellard | /* SPECIFY */
|
1277 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SPECIFY command\n");
|
1278 | 8977f3c1 | bellard | /* 1 parameter cmd */
|
1279 | baca51fa | bellard | fdctrl->data_len = 3;
|
1280 | 8977f3c1 | bellard | goto enqueue;
|
1281 | 8977f3c1 | bellard | case 0x04: |
1282 | 8977f3c1 | bellard | /* SENSE_DRIVE_STATUS */
|
1283 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SENSE_DRIVE_STATUS command\n");
|
1284 | 8977f3c1 | bellard | /* 1 parameter cmd */
|
1285 | baca51fa | bellard | fdctrl->data_len = 2;
|
1286 | 8977f3c1 | bellard | goto enqueue;
|
1287 | 8977f3c1 | bellard | case 0x07: |
1288 | 8977f3c1 | bellard | /* RECALIBRATE */
|
1289 | 8977f3c1 | bellard | FLOPPY_DPRINTF("RECALIBRATE command\n");
|
1290 | 8977f3c1 | bellard | /* 1 parameter cmd */
|
1291 | baca51fa | bellard | fdctrl->data_len = 2;
|
1292 | 8977f3c1 | bellard | goto enqueue;
|
1293 | 8977f3c1 | bellard | case 0x08: |
1294 | 8977f3c1 | bellard | /* SENSE_INTERRUPT_STATUS */
|
1295 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SENSE_INTERRUPT_STATUS command (%02x)\n",
|
1296 | baca51fa | bellard | fdctrl->int_status); |
1297 | 8977f3c1 | bellard | /* No parameters cmd: returns status if no interrupt */
|
1298 | 953569d2 | bellard | #if 0
|
1299 | baca51fa | bellard | fdctrl->fifo[0] =
|
1300 | baca51fa | bellard | fdctrl->int_status | (cur_drv->head << 2) | fdctrl->cur_drv;
|
1301 | 953569d2 | bellard | #else
|
1302 | 953569d2 | bellard | /* XXX: int_status handling is broken for read/write
|
1303 | 953569d2 | bellard | commands, so we do this hack. It should be suppressed
|
1304 | 953569d2 | bellard | ASAP */
|
1305 | 953569d2 | bellard | fdctrl->fifo[0] =
|
1306 | 953569d2 | bellard | 0x20 | (cur_drv->head << 2) | fdctrl->cur_drv; |
1307 | 953569d2 | bellard | #endif
|
1308 | baca51fa | bellard | fdctrl->fifo[1] = cur_drv->track;
|
1309 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 2, 0); |
1310 | baca51fa | bellard | fdctrl_reset_irq(fdctrl); |
1311 | baca51fa | bellard | fdctrl->int_status = 0xC0;
|
1312 | 8977f3c1 | bellard | return;
|
1313 | 8977f3c1 | bellard | case 0x0E: |
1314 | 8977f3c1 | bellard | /* DUMPREG */
|
1315 | 8977f3c1 | bellard | FLOPPY_DPRINTF("DUMPREG command\n");
|
1316 | 8977f3c1 | bellard | /* Drives position */
|
1317 | baca51fa | bellard | fdctrl->fifo[0] = drv0(fdctrl)->track;
|
1318 | baca51fa | bellard | fdctrl->fifo[1] = drv1(fdctrl)->track;
|
1319 | baca51fa | bellard | fdctrl->fifo[2] = 0; |
1320 | baca51fa | bellard | fdctrl->fifo[3] = 0; |
1321 | 8977f3c1 | bellard | /* timers */
|
1322 | baca51fa | bellard | fdctrl->fifo[4] = fdctrl->timer0;
|
1323 | baca51fa | bellard | fdctrl->fifo[5] = (fdctrl->timer1 << 1) | fdctrl->dma_en; |
1324 | baca51fa | bellard | fdctrl->fifo[6] = cur_drv->last_sect;
|
1325 | baca51fa | bellard | fdctrl->fifo[7] = (fdctrl->lock << 7) | |
1326 | 8977f3c1 | bellard | (cur_drv->perpendicular << 2);
|
1327 | baca51fa | bellard | fdctrl->fifo[8] = fdctrl->config;
|
1328 | baca51fa | bellard | fdctrl->fifo[9] = fdctrl->precomp_trk;
|
1329 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 10, 0); |
1330 | 8977f3c1 | bellard | return;
|
1331 | 8977f3c1 | bellard | case 0x0F: |
1332 | 8977f3c1 | bellard | /* SEEK */
|
1333 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SEEK command\n");
|
1334 | 8977f3c1 | bellard | /* 2 parameters cmd */
|
1335 | baca51fa | bellard | fdctrl->data_len = 3;
|
1336 | 8977f3c1 | bellard | goto enqueue;
|
1337 | 8977f3c1 | bellard | case 0x10: |
1338 | 8977f3c1 | bellard | /* VERSION */
|
1339 | 8977f3c1 | bellard | FLOPPY_DPRINTF("VERSION command\n");
|
1340 | 8977f3c1 | bellard | /* No parameters cmd */
|
1341 | 4b19ec0c | bellard | /* Controller's version */
|
1342 | baca51fa | bellard | fdctrl->fifo[0] = fdctrl->version;
|
1343 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 1); |
1344 | 8977f3c1 | bellard | return;
|
1345 | 8977f3c1 | bellard | case 0x12: |
1346 | 8977f3c1 | bellard | /* PERPENDICULAR_MODE */
|
1347 | 8977f3c1 | bellard | FLOPPY_DPRINTF("PERPENDICULAR_MODE command\n");
|
1348 | 8977f3c1 | bellard | /* 1 parameter cmd */
|
1349 | baca51fa | bellard | fdctrl->data_len = 2;
|
1350 | 8977f3c1 | bellard | goto enqueue;
|
1351 | 8977f3c1 | bellard | case 0x13: |
1352 | 8977f3c1 | bellard | /* CONFIGURE */
|
1353 | 8977f3c1 | bellard | FLOPPY_DPRINTF("CONFIGURE command\n");
|
1354 | 8977f3c1 | bellard | /* 3 parameters cmd */
|
1355 | baca51fa | bellard | fdctrl->data_len = 4;
|
1356 | 8977f3c1 | bellard | goto enqueue;
|
1357 | 8977f3c1 | bellard | case 0x14: |
1358 | 8977f3c1 | bellard | /* UNLOCK */
|
1359 | 8977f3c1 | bellard | FLOPPY_DPRINTF("UNLOCK command\n");
|
1360 | 8977f3c1 | bellard | /* No parameters cmd */
|
1361 | baca51fa | bellard | fdctrl->lock = 0;
|
1362 | baca51fa | bellard | fdctrl->fifo[0] = 0; |
1363 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 0); |
1364 | 8977f3c1 | bellard | return;
|
1365 | 8977f3c1 | bellard | case 0x17: |
1366 | 8977f3c1 | bellard | /* POWERDOWN_MODE */
|
1367 | 8977f3c1 | bellard | FLOPPY_DPRINTF("POWERDOWN_MODE command\n");
|
1368 | 8977f3c1 | bellard | /* 2 parameters cmd */
|
1369 | baca51fa | bellard | fdctrl->data_len = 3;
|
1370 | 8977f3c1 | bellard | goto enqueue;
|
1371 | 8977f3c1 | bellard | case 0x18: |
1372 | 8977f3c1 | bellard | /* PART_ID */
|
1373 | 8977f3c1 | bellard | FLOPPY_DPRINTF("PART_ID command\n");
|
1374 | 8977f3c1 | bellard | /* No parameters cmd */
|
1375 | baca51fa | bellard | fdctrl->fifo[0] = 0x41; /* Stepping 1 */ |
1376 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 0); |
1377 | 8977f3c1 | bellard | return;
|
1378 | 8977f3c1 | bellard | case 0x2C: |
1379 | 8977f3c1 | bellard | /* SAVE */
|
1380 | 8977f3c1 | bellard | FLOPPY_DPRINTF("SAVE command\n");
|
1381 | 8977f3c1 | bellard | /* No parameters cmd */
|
1382 | baca51fa | bellard | fdctrl->fifo[0] = 0; |
1383 | baca51fa | bellard | fdctrl->fifo[1] = 0; |
1384 | 8977f3c1 | bellard | /* Drives position */
|
1385 | baca51fa | bellard | fdctrl->fifo[2] = drv0(fdctrl)->track;
|
1386 | baca51fa | bellard | fdctrl->fifo[3] = drv1(fdctrl)->track;
|
1387 | baca51fa | bellard | fdctrl->fifo[4] = 0; |
1388 | baca51fa | bellard | fdctrl->fifo[5] = 0; |
1389 | 8977f3c1 | bellard | /* timers */
|
1390 | baca51fa | bellard | fdctrl->fifo[6] = fdctrl->timer0;
|
1391 | baca51fa | bellard | fdctrl->fifo[7] = fdctrl->timer1;
|
1392 | baca51fa | bellard | fdctrl->fifo[8] = cur_drv->last_sect;
|
1393 | baca51fa | bellard | fdctrl->fifo[9] = (fdctrl->lock << 7) | |
1394 | 8977f3c1 | bellard | (cur_drv->perpendicular << 2);
|
1395 | baca51fa | bellard | fdctrl->fifo[10] = fdctrl->config;
|
1396 | baca51fa | bellard | fdctrl->fifo[11] = fdctrl->precomp_trk;
|
1397 | baca51fa | bellard | fdctrl->fifo[12] = fdctrl->pwrd;
|
1398 | baca51fa | bellard | fdctrl->fifo[13] = 0; |
1399 | baca51fa | bellard | fdctrl->fifo[14] = 0; |
1400 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 15, 1); |
1401 | 8977f3c1 | bellard | return;
|
1402 | 8977f3c1 | bellard | case 0x33: |
1403 | 8977f3c1 | bellard | /* OPTION */
|
1404 | 8977f3c1 | bellard | FLOPPY_DPRINTF("OPTION command\n");
|
1405 | 8977f3c1 | bellard | /* 1 parameter cmd */
|
1406 | baca51fa | bellard | fdctrl->data_len = 2;
|
1407 | 8977f3c1 | bellard | goto enqueue;
|
1408 | 8977f3c1 | bellard | case 0x42: |
1409 | 8977f3c1 | bellard | /* READ_TRACK */
|
1410 | 8977f3c1 | bellard | FLOPPY_DPRINTF("READ_TRACK command\n");
|
1411 | 8977f3c1 | bellard | /* 8 parameters cmd */
|
1412 | baca51fa | bellard | fdctrl->data_len = 9;
|
1413 | 8977f3c1 | bellard | goto enqueue;
|
1414 | 8977f3c1 | bellard | case 0x4A: |
1415 | 8977f3c1 | bellard | /* READ_ID */
|
1416 | 8977f3c1 | bellard | FLOPPY_DPRINTF("READ_ID command\n");
|
1417 | 8977f3c1 | bellard | /* 1 parameter cmd */
|
1418 | baca51fa | bellard | fdctrl->data_len = 2;
|
1419 | 8977f3c1 | bellard | goto enqueue;
|
1420 | 8977f3c1 | bellard | case 0x4C: |
1421 | 8977f3c1 | bellard | /* RESTORE */
|
1422 | 8977f3c1 | bellard | FLOPPY_DPRINTF("RESTORE command\n");
|
1423 | 8977f3c1 | bellard | /* 17 parameters cmd */
|
1424 | baca51fa | bellard | fdctrl->data_len = 18;
|
1425 | 8977f3c1 | bellard | goto enqueue;
|
1426 | 8977f3c1 | bellard | case 0x4D: |
1427 | 8977f3c1 | bellard | /* FORMAT_TRACK */
|
1428 | 8977f3c1 | bellard | FLOPPY_DPRINTF("FORMAT_TRACK command\n");
|
1429 | 8977f3c1 | bellard | /* 5 parameters cmd */
|
1430 | baca51fa | bellard | fdctrl->data_len = 6;
|
1431 | 8977f3c1 | bellard | goto enqueue;
|
1432 | 8977f3c1 | bellard | case 0x8E: |
1433 | 8977f3c1 | bellard | /* DRIVE_SPECIFICATION_COMMAND */
|
1434 | 8977f3c1 | bellard | FLOPPY_DPRINTF("DRIVE_SPECIFICATION_COMMAND command\n");
|
1435 | 8977f3c1 | bellard | /* 5 parameters cmd */
|
1436 | baca51fa | bellard | fdctrl->data_len = 6;
|
1437 | 8977f3c1 | bellard | goto enqueue;
|
1438 | 8977f3c1 | bellard | case 0x8F: |
1439 | 8977f3c1 | bellard | /* RELATIVE_SEEK_OUT */
|
1440 | 8977f3c1 | bellard | FLOPPY_DPRINTF("RELATIVE_SEEK_OUT command\n");
|
1441 | 8977f3c1 | bellard | /* 2 parameters cmd */
|
1442 | baca51fa | bellard | fdctrl->data_len = 3;
|
1443 | 8977f3c1 | bellard | goto enqueue;
|
1444 | 8977f3c1 | bellard | case 0x94: |
1445 | 8977f3c1 | bellard | /* LOCK */
|
1446 | 8977f3c1 | bellard | FLOPPY_DPRINTF("LOCK command\n");
|
1447 | 8977f3c1 | bellard | /* No parameters cmd */
|
1448 | baca51fa | bellard | fdctrl->lock = 1;
|
1449 | baca51fa | bellard | fdctrl->fifo[0] = 0x10; |
1450 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 1); |
1451 | 8977f3c1 | bellard | return;
|
1452 | 8977f3c1 | bellard | case 0xCD: |
1453 | 8977f3c1 | bellard | /* FORMAT_AND_WRITE */
|
1454 | 8977f3c1 | bellard | FLOPPY_DPRINTF("FORMAT_AND_WRITE command\n");
|
1455 | 8977f3c1 | bellard | /* 10 parameters cmd */
|
1456 | baca51fa | bellard | fdctrl->data_len = 11;
|
1457 | 8977f3c1 | bellard | goto enqueue;
|
1458 | 8977f3c1 | bellard | case 0xCF: |
1459 | 8977f3c1 | bellard | /* RELATIVE_SEEK_IN */
|
1460 | 8977f3c1 | bellard | FLOPPY_DPRINTF("RELATIVE_SEEK_IN command\n");
|
1461 | 8977f3c1 | bellard | /* 2 parameters cmd */
|
1462 | baca51fa | bellard | fdctrl->data_len = 3;
|
1463 | 8977f3c1 | bellard | goto enqueue;
|
1464 | 8977f3c1 | bellard | default:
|
1465 | 8977f3c1 | bellard | /* Unknown command */
|
1466 | 8977f3c1 | bellard | FLOPPY_ERROR("unknown command: 0x%02x\n", value);
|
1467 | baca51fa | bellard | fdctrl_unimplemented(fdctrl); |
1468 | 8977f3c1 | bellard | return;
|
1469 | 8977f3c1 | bellard | } |
1470 | 8977f3c1 | bellard | } |
1471 | 8977f3c1 | bellard | enqueue:
|
1472 | baca51fa | bellard | FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
|
1473 | baca51fa | bellard | fdctrl->fifo[fdctrl->data_pos] = value; |
1474 | baca51fa | bellard | if (++fdctrl->data_pos == fdctrl->data_len) {
|
1475 | 8977f3c1 | bellard | /* We now have all parameters
|
1476 | 8977f3c1 | bellard | * and will be able to treat the command
|
1477 | 8977f3c1 | bellard | */
|
1478 | baca51fa | bellard | if (fdctrl->data_state & FD_STATE_FORMAT) {
|
1479 | baca51fa | bellard | fdctrl_format_sector(fdctrl); |
1480 | baca51fa | bellard | return;
|
1481 | baca51fa | bellard | } |
1482 | baca51fa | bellard | switch (fdctrl->fifo[0] & 0x1F) { |
1483 | 8977f3c1 | bellard | case 0x06: |
1484 | 8977f3c1 | bellard | { |
1485 | 8977f3c1 | bellard | /* READ variants */
|
1486 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat READ command\n");
|
1487 | baca51fa | bellard | fdctrl_start_transfer(fdctrl, FD_DIR_READ); |
1488 | 8977f3c1 | bellard | return;
|
1489 | 8977f3c1 | bellard | } |
1490 | 8977f3c1 | bellard | case 0x0C: |
1491 | 8977f3c1 | bellard | /* READ_DELETED variants */
|
1492 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat READ_DELETED command\n");
|
1493 | 8977f3c1 | bellard | FLOPPY_ERROR("treat READ_DELETED command\n");
|
1494 | baca51fa | bellard | fdctrl_start_transfer_del(fdctrl, FD_DIR_READ); |
1495 | 8977f3c1 | bellard | return;
|
1496 | 8977f3c1 | bellard | case 0x16: |
1497 | 8977f3c1 | bellard | /* VERIFY variants */
|
1498 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat VERIFY command\n");
|
1499 | 8977f3c1 | bellard | FLOPPY_ERROR("treat VERIFY command\n");
|
1500 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00); |
1501 | 8977f3c1 | bellard | return;
|
1502 | 8977f3c1 | bellard | case 0x10: |
1503 | 8977f3c1 | bellard | /* SCAN_EQUAL variants */
|
1504 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat SCAN_EQUAL command\n");
|
1505 | 8977f3c1 | bellard | FLOPPY_ERROR("treat SCAN_EQUAL command\n");
|
1506 | baca51fa | bellard | fdctrl_start_transfer(fdctrl, FD_DIR_SCANE); |
1507 | 8977f3c1 | bellard | return;
|
1508 | 8977f3c1 | bellard | case 0x19: |
1509 | 8977f3c1 | bellard | /* SCAN_LOW_OR_EQUAL variants */
|
1510 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat SCAN_LOW_OR_EQUAL command\n");
|
1511 | 8977f3c1 | bellard | FLOPPY_ERROR("treat SCAN_LOW_OR_EQUAL command\n");
|
1512 | baca51fa | bellard | fdctrl_start_transfer(fdctrl, FD_DIR_SCANL); |
1513 | 8977f3c1 | bellard | return;
|
1514 | 8977f3c1 | bellard | case 0x1D: |
1515 | 8977f3c1 | bellard | /* SCAN_HIGH_OR_EQUAL variants */
|
1516 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat SCAN_HIGH_OR_EQUAL command\n");
|
1517 | 8977f3c1 | bellard | FLOPPY_ERROR("treat SCAN_HIGH_OR_EQUAL command\n");
|
1518 | baca51fa | bellard | fdctrl_start_transfer(fdctrl, FD_DIR_SCANH); |
1519 | 8977f3c1 | bellard | return;
|
1520 | 8977f3c1 | bellard | default:
|
1521 | 8977f3c1 | bellard | break;
|
1522 | 8977f3c1 | bellard | } |
1523 | baca51fa | bellard | switch (fdctrl->fifo[0] & 0x3F) { |
1524 | 8977f3c1 | bellard | case 0x05: |
1525 | 8977f3c1 | bellard | /* WRITE variants */
|
1526 | baca51fa | bellard | FLOPPY_DPRINTF("treat WRITE command (%02x)\n", fdctrl->fifo[0]); |
1527 | baca51fa | bellard | fdctrl_start_transfer(fdctrl, FD_DIR_WRITE); |
1528 | 8977f3c1 | bellard | return;
|
1529 | 8977f3c1 | bellard | case 0x09: |
1530 | 8977f3c1 | bellard | /* WRITE_DELETED variants */
|
1531 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat WRITE_DELETED command\n");
|
1532 | 8977f3c1 | bellard | FLOPPY_ERROR("treat WRITE_DELETED command\n");
|
1533 | baca51fa | bellard | fdctrl_start_transfer_del(fdctrl, FD_DIR_WRITE); |
1534 | 8977f3c1 | bellard | return;
|
1535 | 8977f3c1 | bellard | default:
|
1536 | 8977f3c1 | bellard | break;
|
1537 | 8977f3c1 | bellard | } |
1538 | baca51fa | bellard | switch (fdctrl->fifo[0]) { |
1539 | 8977f3c1 | bellard | case 0x03: |
1540 | 8977f3c1 | bellard | /* SPECIFY */
|
1541 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat SPECIFY command\n");
|
1542 | baca51fa | bellard | fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF; |
1543 | e309de25 | bellard | fdctrl->timer1 = fdctrl->fifo[2] >> 1; |
1544 | baca51fa | bellard | fdctrl->dma_en = 1 - (fdctrl->fifo[2] & 1) ; |
1545 | 8977f3c1 | bellard | /* No result back */
|
1546 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1547 | 8977f3c1 | bellard | break;
|
1548 | 8977f3c1 | bellard | case 0x04: |
1549 | 8977f3c1 | bellard | /* SENSE_DRIVE_STATUS */
|
1550 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat SENSE_DRIVE_STATUS command\n");
|
1551 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
1552 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1553 | baca51fa | bellard | cur_drv->head = (fdctrl->fifo[1] >> 2) & 1; |
1554 | 8977f3c1 | bellard | /* 1 Byte status back */
|
1555 | baca51fa | bellard | fdctrl->fifo[0] = (cur_drv->ro << 6) | |
1556 | 8977f3c1 | bellard | (cur_drv->track == 0 ? 0x10 : 0x00) | |
1557 | 890fa6be | bellard | (cur_drv->head << 2) |
|
1558 | 890fa6be | bellard | fdctrl->cur_drv | |
1559 | 890fa6be | bellard | 0x28;
|
1560 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 0); |
1561 | 8977f3c1 | bellard | break;
|
1562 | 8977f3c1 | bellard | case 0x07: |
1563 | 8977f3c1 | bellard | /* RECALIBRATE */
|
1564 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat RECALIBRATE command\n");
|
1565 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
1566 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1567 | 8977f3c1 | bellard | fd_recalibrate(cur_drv); |
1568 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1569 | 8977f3c1 | bellard | /* Raise Interrupt */
|
1570 | baca51fa | bellard | fdctrl_raise_irq(fdctrl, 0x20);
|
1571 | 8977f3c1 | bellard | break;
|
1572 | 8977f3c1 | bellard | case 0x0F: |
1573 | 8977f3c1 | bellard | /* SEEK */
|
1574 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat SEEK command\n");
|
1575 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
1576 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1577 | baca51fa | bellard | fd_start(cur_drv); |
1578 | baca51fa | bellard | if (fdctrl->fifo[2] <= cur_drv->track) |
1579 | 8977f3c1 | bellard | cur_drv->dir = 1;
|
1580 | 8977f3c1 | bellard | else
|
1581 | 8977f3c1 | bellard | cur_drv->dir = 0;
|
1582 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1583 | baca51fa | bellard | if (fdctrl->fifo[2] > cur_drv->max_track) { |
1584 | baca51fa | bellard | fdctrl_raise_irq(fdctrl, 0x60);
|
1585 | 8977f3c1 | bellard | } else {
|
1586 | baca51fa | bellard | cur_drv->track = fdctrl->fifo[2];
|
1587 | 8977f3c1 | bellard | /* Raise Interrupt */
|
1588 | baca51fa | bellard | fdctrl_raise_irq(fdctrl, 0x20);
|
1589 | 8977f3c1 | bellard | } |
1590 | 8977f3c1 | bellard | break;
|
1591 | 8977f3c1 | bellard | case 0x12: |
1592 | 8977f3c1 | bellard | /* PERPENDICULAR_MODE */
|
1593 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat PERPENDICULAR_MODE command\n");
|
1594 | baca51fa | bellard | if (fdctrl->fifo[1] & 0x80) |
1595 | baca51fa | bellard | cur_drv->perpendicular = fdctrl->fifo[1] & 0x7; |
1596 | 8977f3c1 | bellard | /* No result back */
|
1597 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1598 | 8977f3c1 | bellard | break;
|
1599 | 8977f3c1 | bellard | case 0x13: |
1600 | 8977f3c1 | bellard | /* CONFIGURE */
|
1601 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat CONFIGURE command\n");
|
1602 | baca51fa | bellard | fdctrl->config = fdctrl->fifo[2];
|
1603 | baca51fa | bellard | fdctrl->precomp_trk = fdctrl->fifo[3];
|
1604 | 8977f3c1 | bellard | /* No result back */
|
1605 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1606 | 8977f3c1 | bellard | break;
|
1607 | 8977f3c1 | bellard | case 0x17: |
1608 | 8977f3c1 | bellard | /* POWERDOWN_MODE */
|
1609 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat POWERDOWN_MODE command\n");
|
1610 | baca51fa | bellard | fdctrl->pwrd = fdctrl->fifo[1];
|
1611 | baca51fa | bellard | fdctrl->fifo[0] = fdctrl->fifo[1]; |
1612 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 1); |
1613 | 8977f3c1 | bellard | break;
|
1614 | 8977f3c1 | bellard | case 0x33: |
1615 | 8977f3c1 | bellard | /* OPTION */
|
1616 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat OPTION command\n");
|
1617 | 8977f3c1 | bellard | /* No result back */
|
1618 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1619 | 8977f3c1 | bellard | break;
|
1620 | 8977f3c1 | bellard | case 0x42: |
1621 | 8977f3c1 | bellard | /* READ_TRACK */
|
1622 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat READ_TRACK command\n");
|
1623 | 8977f3c1 | bellard | FLOPPY_ERROR("treat READ_TRACK command\n");
|
1624 | baca51fa | bellard | fdctrl_start_transfer(fdctrl, FD_DIR_READ); |
1625 | 8977f3c1 | bellard | break;
|
1626 | 8977f3c1 | bellard | case 0x4A: |
1627 | 8977f3c1 | bellard | /* READ_ID */
|
1628 | baca51fa | bellard | FLOPPY_DPRINTF("treat READ_ID command\n");
|
1629 | ed5fd2cc | bellard | /* XXX: should set main status register to busy */
|
1630 | 890fa6be | bellard | cur_drv->head = (fdctrl->fifo[1] >> 2) & 1; |
1631 | ed5fd2cc | bellard | qemu_mod_timer(fdctrl->result_timer, |
1632 | ed5fd2cc | bellard | qemu_get_clock(vm_clock) + (ticks_per_sec / 50));
|
1633 | 8977f3c1 | bellard | break;
|
1634 | 8977f3c1 | bellard | case 0x4C: |
1635 | 8977f3c1 | bellard | /* RESTORE */
|
1636 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat RESTORE command\n");
|
1637 | 8977f3c1 | bellard | /* Drives position */
|
1638 | baca51fa | bellard | drv0(fdctrl)->track = fdctrl->fifo[3];
|
1639 | baca51fa | bellard | drv1(fdctrl)->track = fdctrl->fifo[4];
|
1640 | 8977f3c1 | bellard | /* timers */
|
1641 | baca51fa | bellard | fdctrl->timer0 = fdctrl->fifo[7];
|
1642 | baca51fa | bellard | fdctrl->timer1 = fdctrl->fifo[8];
|
1643 | baca51fa | bellard | cur_drv->last_sect = fdctrl->fifo[9];
|
1644 | baca51fa | bellard | fdctrl->lock = fdctrl->fifo[10] >> 7; |
1645 | baca51fa | bellard | cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF; |
1646 | baca51fa | bellard | fdctrl->config = fdctrl->fifo[11];
|
1647 | baca51fa | bellard | fdctrl->precomp_trk = fdctrl->fifo[12];
|
1648 | baca51fa | bellard | fdctrl->pwrd = fdctrl->fifo[13];
|
1649 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1650 | 8977f3c1 | bellard | break;
|
1651 | 8977f3c1 | bellard | case 0x4D: |
1652 | 8977f3c1 | bellard | /* FORMAT_TRACK */
|
1653 | baca51fa | bellard | FLOPPY_DPRINTF("treat FORMAT_TRACK command\n");
|
1654 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
1655 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1656 | baca51fa | bellard | fdctrl->data_state |= FD_STATE_FORMAT; |
1657 | baca51fa | bellard | if (fdctrl->fifo[0] & 0x80) |
1658 | baca51fa | bellard | fdctrl->data_state |= FD_STATE_MULTI; |
1659 | baca51fa | bellard | else
|
1660 | baca51fa | bellard | fdctrl->data_state &= ~FD_STATE_MULTI; |
1661 | baca51fa | bellard | fdctrl->data_state &= ~FD_STATE_SEEK; |
1662 | baca51fa | bellard | cur_drv->bps = |
1663 | baca51fa | bellard | fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2]; |
1664 | baca51fa | bellard | #if 0
|
1665 | baca51fa | bellard | cur_drv->last_sect =
|
1666 | baca51fa | bellard | cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
|
1667 | baca51fa | bellard | fdctrl->fifo[3] / 2;
|
1668 | baca51fa | bellard | #else
|
1669 | baca51fa | bellard | cur_drv->last_sect = fdctrl->fifo[3];
|
1670 | baca51fa | bellard | #endif
|
1671 | baca51fa | bellard | /* Bochs BIOS is buggy and don't send format informations
|
1672 | baca51fa | bellard | * for each sector. So, pretend all's done right now...
|
1673 | baca51fa | bellard | */
|
1674 | baca51fa | bellard | fdctrl->data_state &= ~FD_STATE_FORMAT; |
1675 | baca51fa | bellard | fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); |
1676 | 8977f3c1 | bellard | break;
|
1677 | 8977f3c1 | bellard | case 0x8E: |
1678 | 8977f3c1 | bellard | /* DRIVE_SPECIFICATION_COMMAND */
|
1679 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat DRIVE_SPECIFICATION_COMMAND command\n");
|
1680 | baca51fa | bellard | if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) { |
1681 | 8977f3c1 | bellard | /* Command parameters done */
|
1682 | baca51fa | bellard | if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) { |
1683 | baca51fa | bellard | fdctrl->fifo[0] = fdctrl->fifo[1]; |
1684 | baca51fa | bellard | fdctrl->fifo[2] = 0; |
1685 | baca51fa | bellard | fdctrl->fifo[3] = 0; |
1686 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 4, 1); |
1687 | 8977f3c1 | bellard | } else {
|
1688 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1689 | 8977f3c1 | bellard | } |
1690 | baca51fa | bellard | } else if (fdctrl->data_len > 7) { |
1691 | 8977f3c1 | bellard | /* ERROR */
|
1692 | baca51fa | bellard | fdctrl->fifo[0] = 0x80 | |
1693 | baca51fa | bellard | (cur_drv->head << 2) | fdctrl->cur_drv;
|
1694 | baca51fa | bellard | fdctrl_set_fifo(fdctrl, 1, 1); |
1695 | 8977f3c1 | bellard | } |
1696 | 8977f3c1 | bellard | break;
|
1697 | 8977f3c1 | bellard | case 0x8F: |
1698 | 8977f3c1 | bellard | /* RELATIVE_SEEK_OUT */
|
1699 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat RELATIVE_SEEK_OUT command\n");
|
1700 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
1701 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1702 | baca51fa | bellard | fd_start(cur_drv); |
1703 | 8977f3c1 | bellard | cur_drv->dir = 0;
|
1704 | baca51fa | bellard | if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) { |
1705 | baca51fa | bellard | cur_drv->track = cur_drv->max_track - 1;
|
1706 | baca51fa | bellard | } else {
|
1707 | baca51fa | bellard | cur_drv->track += fdctrl->fifo[2];
|
1708 | 8977f3c1 | bellard | } |
1709 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1710 | baca51fa | bellard | fdctrl_raise_irq(fdctrl, 0x20);
|
1711 | 8977f3c1 | bellard | break;
|
1712 | 8977f3c1 | bellard | case 0xCD: |
1713 | 8977f3c1 | bellard | /* FORMAT_AND_WRITE */
|
1714 | 8977f3c1 | bellard | // FLOPPY_DPRINTF("treat FORMAT_AND_WRITE command\n");
|
1715 | 8977f3c1 | bellard | FLOPPY_ERROR("treat FORMAT_AND_WRITE command\n");
|
1716 | baca51fa | bellard | fdctrl_unimplemented(fdctrl); |
1717 | 8977f3c1 | bellard | break;
|
1718 | 8977f3c1 | bellard | case 0xCF: |
1719 | 8977f3c1 | bellard | /* RELATIVE_SEEK_IN */
|
1720 | 8977f3c1 | bellard | FLOPPY_DPRINTF("treat RELATIVE_SEEK_IN command\n");
|
1721 | baca51fa | bellard | fdctrl->cur_drv = fdctrl->fifo[1] & 1; |
1722 | baca51fa | bellard | cur_drv = get_cur_drv(fdctrl); |
1723 | baca51fa | bellard | fd_start(cur_drv); |
1724 | 8977f3c1 | bellard | cur_drv->dir = 1;
|
1725 | baca51fa | bellard | if (fdctrl->fifo[2] > cur_drv->track) { |
1726 | baca51fa | bellard | cur_drv->track = 0;
|
1727 | baca51fa | bellard | } else {
|
1728 | baca51fa | bellard | cur_drv->track -= fdctrl->fifo[2];
|
1729 | 8977f3c1 | bellard | } |
1730 | baca51fa | bellard | fdctrl_reset_fifo(fdctrl); |
1731 | baca51fa | bellard | /* Raise Interrupt */
|
1732 | baca51fa | bellard | fdctrl_raise_irq(fdctrl, 0x20);
|
1733 | 8977f3c1 | bellard | break;
|
1734 | 8977f3c1 | bellard | } |
1735 | 8977f3c1 | bellard | } |
1736 | 8977f3c1 | bellard | } |
1737 | ed5fd2cc | bellard | |
1738 | ed5fd2cc | bellard | static void fdctrl_result_timer(void *opaque) |
1739 | ed5fd2cc | bellard | { |
1740 | ed5fd2cc | bellard | fdctrl_t *fdctrl = opaque; |
1741 | ed5fd2cc | bellard | fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); |
1742 | ed5fd2cc | bellard | } |