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/*
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 *  qemu user main
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 *  This program is free software; you can redistribute it and/or modify
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 *  it under the terms of the GNU General Public License as published by
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 *  the Free Software Foundation; either version 2 of the License, or
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 *  (at your option) any later version.
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *  GNU General Public License for more details.
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 *
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 *  You should have received a copy of the GNU General Public License
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 *  along with this program; if not, write to the Free Software
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 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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#include "qemu.h"
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#define DEBUG_LOGFILE "/tmp/qemu.log"
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#ifdef __APPLE__
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#include <crt_externs.h>
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# define environ  (*_NSGetEnviron())
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#endif
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static const char *interp_prefix = CONFIG_QEMU_PREFIX;
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#if defined(__i386__) && !defined(CONFIG_STATIC)
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/* Force usage of an ELF interpreter even if it is an ELF shared
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   object ! */
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const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
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#endif
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/* for recent libc, we add these dummy symbols which are not declared
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   when generating a linked object (bug in ld ?) */
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#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
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long __preinit_array_start[0];
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long __preinit_array_end[0];
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long __init_array_start[0];
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long __init_array_end[0];
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long __fini_array_start[0];
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long __fini_array_end[0];
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#endif
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/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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   we allocate a bigger stack. Need a better solution, for example
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   by remapping the process stack directly at the right place */
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unsigned long x86_stack_size = 512 * 1024;
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void gemu_log(const char *fmt, ...)
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{
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    va_list ap;
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    va_start(ap, fmt);
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    vfprintf(stderr, fmt, ap);
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    va_end(ap);
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}
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void cpu_outb(CPUState *env, int addr, int val)
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{
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    fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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}
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void cpu_outw(CPUState *env, int addr, int val)
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{
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    fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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}
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void cpu_outl(CPUState *env, int addr, int val)
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{
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    fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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}
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int cpu_inb(CPUState *env, int addr)
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{
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    fprintf(stderr, "inb: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_inw(CPUState *env, int addr)
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{
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    fprintf(stderr, "inw: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_inl(CPUState *env, int addr)
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{
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    fprintf(stderr, "inl: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_get_pic_interrupt(CPUState *env)
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{
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    return -1;
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}
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/* timers for rdtsc */
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#if defined(__i386__)
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int64_t cpu_get_real_ticks(void)
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{
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    int64_t val;
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    asm volatile ("rdtsc" : "=A" (val));
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    return val;
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}
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#elif defined(__x86_64__)
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int64_t cpu_get_real_ticks(void)
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{
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    uint32_t low,high;
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    int64_t val;
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    asm volatile("rdtsc" : "=a" (low), "=d" (high));
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    val = high;
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    val <<= 32;
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    val |= low;
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    return val;
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}
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#else
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static uint64_t emu_time;
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int64_t cpu_get_real_ticks(void)
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{
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    return emu_time++;
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}
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#endif
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#ifdef TARGET_I386
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/***********************************************************/
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/* CPUX86 core interface */
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uint64_t cpu_get_tsc(CPUX86State *env)
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{
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    return cpu_get_real_ticks();
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}
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static void write_dt(void *ptr, unsigned long addr, unsigned long limit, 
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                     int flags)
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{
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    unsigned int e1, e2;
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    e1 = (addr << 16) | (limit & 0xffff);
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    e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
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    e2 |= flags;
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    stl((uint8_t *)ptr, e1);
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    stl((uint8_t *)ptr + 4, e2);
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}
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static void set_gate(void *ptr, unsigned int type, unsigned int dpl, 
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                     unsigned long addr, unsigned int sel)
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{
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    unsigned int e1, e2;
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    e1 = (addr & 0xffff) | (sel << 16);
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    e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
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    stl((uint8_t *)ptr, e1);
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    stl((uint8_t *)ptr + 4, e2);
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}
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uint64_t gdt_table[6];
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uint64_t idt_table[256];
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/* only dpl matters as we do only user space emulation */
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static void set_idt(int n, unsigned int dpl)
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{
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    set_gate(idt_table + n, 0, dpl, 0, 0);
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}
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void cpu_loop(CPUX86State *env)
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{
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    int trapnr;
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    uint8_t *pc;
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    target_siginfo_t info;
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    for(;;) {
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        trapnr = cpu_x86_exec(env);
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        switch(trapnr) {
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        case 0x80:
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            /* linux syscall */
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            env->regs[R_EAX] = do_syscall(env, 
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                                          env->regs[R_EAX], 
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                                          env->regs[R_EBX],
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                                          env->regs[R_ECX],
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                                          env->regs[R_EDX],
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                                          env->regs[R_ESI],
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                                          env->regs[R_EDI],
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                                          env->regs[R_EBP]);
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            break;
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        case EXCP0B_NOSEG:
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        case EXCP0C_STACK:
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            info.si_signo = SIGBUS;
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            info.si_errno = 0;
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            info.si_code = TARGET_SI_KERNEL;
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            info._sifields._sigfault._addr = 0;
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            queue_signal(info.si_signo, &info);
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            break;
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        case EXCP0D_GPF:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_fault(env);
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            } else {
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                info.si_signo = SIGSEGV;
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                info.si_errno = 0;
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                info.si_code = TARGET_SI_KERNEL;
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                info._sifields._sigfault._addr = 0;
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP0E_PAGE:
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            info.si_signo = SIGSEGV;
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            info.si_errno = 0;
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            if (!(env->error_code & 1))
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                info.si_code = TARGET_SEGV_MAPERR;
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            else
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                info.si_code = TARGET_SEGV_ACCERR;
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            info._sifields._sigfault._addr = env->cr[2];
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            queue_signal(info.si_signo, &info);
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            break;
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        case EXCP00_DIVZ:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_trap(env, trapnr);
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            } else {
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                /* division by zero */
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                info.si_signo = SIGFPE;
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                info.si_errno = 0;
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                info.si_code = TARGET_FPE_INTDIV;
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                info._sifields._sigfault._addr = env->eip;
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP01_SSTP:
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        case EXCP03_INT3:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_trap(env, trapnr);
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            } else {
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                info.si_signo = SIGTRAP;
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                info.si_errno = 0;
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                if (trapnr == EXCP01_SSTP) {
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                    info.si_code = TARGET_TRAP_BRKPT;
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                    info._sifields._sigfault._addr = env->eip;
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                } else {
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                    info.si_code = TARGET_SI_KERNEL;
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                    info._sifields._sigfault._addr = 0;
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                }
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP04_INTO:
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        case EXCP05_BOUND:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_trap(env, trapnr);
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            } else {
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                info.si_signo = SIGSEGV;
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                info.si_errno = 0;
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                info.si_code = TARGET_SI_KERNEL;
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                info._sifields._sigfault._addr = 0;
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP06_ILLOP:
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            info.si_signo = SIGILL;
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            info.si_errno = 0;
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            info.si_code = TARGET_ILL_ILLOPN;
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            info._sifields._sigfault._addr = env->eip;
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            queue_signal(info.si_signo, &info);
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            break;
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        case EXCP_INTERRUPT:
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            /* just indicate that signals should be handled asap */
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            break;
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        default:
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            pc = env->segs[R_CS].base + env->eip;
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            fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", 
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                    (long)pc, trapnr);
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            abort();
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        }
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        process_pending_signals(env);
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    }
289 1b6b029e bellard
}
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#endif
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#ifdef TARGET_ARM
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294 6f1f31c0 bellard
/* XXX: find a better solution */
295 6f1f31c0 bellard
extern void tb_invalidate_page_range(target_ulong start, target_ulong end);
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static void arm_cache_flush(target_ulong start, target_ulong last)
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{
299 6f1f31c0 bellard
    target_ulong addr, last1;
300 6f1f31c0 bellard
301 6f1f31c0 bellard
    if (last < start)
302 6f1f31c0 bellard
        return;
303 6f1f31c0 bellard
    addr = start;
304 6f1f31c0 bellard
    for(;;) {
305 6f1f31c0 bellard
        last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
306 6f1f31c0 bellard
        if (last1 > last)
307 6f1f31c0 bellard
            last1 = last;
308 6f1f31c0 bellard
        tb_invalidate_page_range(addr, last1 + 1);
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        if (last1 == last)
310 6f1f31c0 bellard
            break;
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        addr = last1 + 1;
312 6f1f31c0 bellard
    }
313 6f1f31c0 bellard
}
314 6f1f31c0 bellard
315 b346ff46 bellard
void cpu_loop(CPUARMState *env)
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{
317 b346ff46 bellard
    int trapnr;
318 b346ff46 bellard
    unsigned int n, insn;
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    target_siginfo_t info;
320 b346ff46 bellard
    
321 b346ff46 bellard
    for(;;) {
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        trapnr = cpu_arm_exec(env);
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        switch(trapnr) {
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        case EXCP_UDEF:
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            {
326 c6981055 bellard
                TaskState *ts = env->opaque;
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                uint32_t opcode;
328 c6981055 bellard
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                /* we handle the FPU emulation here, as Linux */
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                /* we get the opcode */
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                opcode = ldl_raw((uint8_t *)env->regs[15]);
332 c6981055 bellard
                
333 c6981055 bellard
                if (EmulateAll(opcode, &ts->fpa, env->regs) == 0) {
334 c6981055 bellard
                    info.si_signo = SIGILL;
335 c6981055 bellard
                    info.si_errno = 0;
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                    info.si_code = TARGET_ILL_ILLOPN;
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                    info._sifields._sigfault._addr = env->regs[15];
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                    queue_signal(info.si_signo, &info);
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                } else {
340 c6981055 bellard
                    /* increment PC */
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                    env->regs[15] += 4;
342 c6981055 bellard
                }
343 c6981055 bellard
            }
344 b346ff46 bellard
            break;
345 b346ff46 bellard
        case EXCP_SWI:
346 b346ff46 bellard
            {
347 b346ff46 bellard
                /* system call */
348 b346ff46 bellard
                insn = ldl((void *)(env->regs[15] - 4));
349 b346ff46 bellard
                n = insn & 0xffffff;
350 6f1f31c0 bellard
                if (n == ARM_NR_cacheflush) {
351 6f1f31c0 bellard
                    arm_cache_flush(env->regs[0], env->regs[1]);
352 6f1f31c0 bellard
                } else if (n >= ARM_SYSCALL_BASE) {
353 b346ff46 bellard
                    /* linux syscall */
354 b346ff46 bellard
                    n -= ARM_SYSCALL_BASE;
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                    env->regs[0] = do_syscall(env, 
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                                              n, 
357 b346ff46 bellard
                                              env->regs[0],
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                                              env->regs[1],
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                                              env->regs[2],
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                                              env->regs[3],
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                                              env->regs[4],
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                                              0);
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                } else {
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                    goto error;
365 b346ff46 bellard
                }
366 b346ff46 bellard
            }
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            break;
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        case EXCP_INTERRUPT:
369 43fff238 bellard
            /* just indicate that signals should be handled asap */
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            break;
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        default:
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        error:
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            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 
374 b346ff46 bellard
                    trapnr);
375 7fe48483 bellard
            cpu_dump_state(env, stderr, fprintf, 0);
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            abort();
377 b346ff46 bellard
        }
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        process_pending_signals(env);
379 b346ff46 bellard
    }
380 b346ff46 bellard
}
381 b346ff46 bellard
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#endif
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384 93ac68bc bellard
#ifdef TARGET_SPARC
385 93ac68bc bellard
386 060366c5 bellard
//#define DEBUG_WIN
387 060366c5 bellard
388 060366c5 bellard
/* WARNING: dealing with register windows _is_ complicated */
389 060366c5 bellard
static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
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{
391 060366c5 bellard
    index = (index + cwp * 16) & (16 * NWINDOWS - 1);
392 060366c5 bellard
    /* wrap handling : if cwp is on the last window, then we use the
393 060366c5 bellard
       registers 'after' the end */
394 060366c5 bellard
    if (index < 8 && env->cwp == (NWINDOWS - 1))
395 060366c5 bellard
        index += (16 * NWINDOWS);
396 060366c5 bellard
    return index;
397 060366c5 bellard
}
398 060366c5 bellard
399 060366c5 bellard
static inline void save_window_offset(CPUSPARCState *env, int offset)
400 060366c5 bellard
{
401 060366c5 bellard
    unsigned int new_wim, i, cwp1;
402 060366c5 bellard
    uint32_t *sp_ptr;
403 060366c5 bellard
    
404 060366c5 bellard
    new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
405 060366c5 bellard
        ((1LL << NWINDOWS) - 1);
406 060366c5 bellard
    /* save the window */
407 060366c5 bellard
    cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
408 060366c5 bellard
    sp_ptr = (uint32_t *)(env->regbase[get_reg_index(env, cwp1, 6)]);
409 060366c5 bellard
#if defined(DEBUG_WIN)
410 060366c5 bellard
    printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n", 
411 060366c5 bellard
           (int)sp_ptr, cwp1);
412 060366c5 bellard
#endif
413 060366c5 bellard
    for(i = 0; i < 16; i++)
414 060366c5 bellard
        stl_raw(sp_ptr + i, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
415 060366c5 bellard
    env->wim = new_wim;
416 060366c5 bellard
}
417 060366c5 bellard
418 060366c5 bellard
static void save_window(CPUSPARCState *env)
419 060366c5 bellard
{
420 060366c5 bellard
    save_window_offset(env, 2);
421 060366c5 bellard
}
422 060366c5 bellard
423 060366c5 bellard
static void restore_window(CPUSPARCState *env)
424 060366c5 bellard
{
425 060366c5 bellard
    unsigned int new_wim, i, cwp1;
426 060366c5 bellard
    uint32_t *sp_ptr;
427 060366c5 bellard
    
428 060366c5 bellard
    new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
429 060366c5 bellard
        ((1LL << NWINDOWS) - 1);
430 060366c5 bellard
    
431 060366c5 bellard
    /* restore the invalid window */
432 060366c5 bellard
    cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
433 060366c5 bellard
    sp_ptr = (uint32_t *)(env->regbase[get_reg_index(env, cwp1, 6)]);
434 060366c5 bellard
#if defined(DEBUG_WIN)
435 060366c5 bellard
    printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n", 
436 060366c5 bellard
           (int)sp_ptr, cwp1);
437 060366c5 bellard
#endif
438 060366c5 bellard
    for(i = 0; i < 16; i++)
439 060366c5 bellard
        env->regbase[get_reg_index(env, cwp1, 8 + i)] = ldl_raw(sp_ptr + i);
440 060366c5 bellard
    env->wim = new_wim;
441 060366c5 bellard
}
442 060366c5 bellard
443 060366c5 bellard
static void flush_windows(CPUSPARCState *env)
444 060366c5 bellard
{
445 060366c5 bellard
    int offset, cwp1;
446 060366c5 bellard
#if defined(DEBUG_WIN)
447 060366c5 bellard
    printf("flush_windows:\n");
448 060366c5 bellard
#endif
449 060366c5 bellard
    offset = 2;
450 060366c5 bellard
    for(;;) {
451 060366c5 bellard
        /* if restore would invoke restore_window(), then we can stop */
452 060366c5 bellard
        cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
453 060366c5 bellard
        if (env->wim & (1 << cwp1))
454 060366c5 bellard
            break;
455 060366c5 bellard
#if defined(DEBUG_WIN)
456 060366c5 bellard
        printf("offset=%d: ", offset);
457 060366c5 bellard
#endif
458 060366c5 bellard
        save_window_offset(env, offset);
459 060366c5 bellard
        offset++;
460 060366c5 bellard
    }
461 060366c5 bellard
}
462 060366c5 bellard
463 93ac68bc bellard
void cpu_loop (CPUSPARCState *env)
464 93ac68bc bellard
{
465 060366c5 bellard
    int trapnr, ret;
466 060366c5 bellard
    
467 060366c5 bellard
    while (1) {
468 060366c5 bellard
        trapnr = cpu_sparc_exec (env);
469 060366c5 bellard
        
470 060366c5 bellard
        switch (trapnr) {
471 060366c5 bellard
        case 0x88: 
472 060366c5 bellard
        case 0x90:
473 060366c5 bellard
            ret = do_syscall (env, env->gregs[1],
474 060366c5 bellard
                              env->regwptr[0], env->regwptr[1], 
475 060366c5 bellard
                              env->regwptr[2], env->regwptr[3], 
476 060366c5 bellard
                              env->regwptr[4], env->regwptr[5]);
477 060366c5 bellard
            if ((unsigned int)ret >= (unsigned int)(-515)) {
478 060366c5 bellard
                env->psr |= PSR_CARRY;
479 060366c5 bellard
                ret = -ret;
480 060366c5 bellard
            } else {
481 060366c5 bellard
                env->psr &= ~PSR_CARRY;
482 060366c5 bellard
            }
483 060366c5 bellard
            env->regwptr[0] = ret;
484 060366c5 bellard
            /* next instruction */
485 060366c5 bellard
            env->pc = env->npc;
486 060366c5 bellard
            env->npc = env->npc + 4;
487 060366c5 bellard
            break;
488 060366c5 bellard
        case 0x83: /* flush windows */
489 060366c5 bellard
            //            flush_windows(env);
490 060366c5 bellard
            /* next instruction */
491 060366c5 bellard
            env->pc = env->npc;
492 060366c5 bellard
            env->npc = env->npc + 4;
493 060366c5 bellard
            break;
494 060366c5 bellard
        case TT_WIN_OVF: /* window overflow */
495 060366c5 bellard
            save_window(env);
496 060366c5 bellard
            break;
497 060366c5 bellard
        case TT_WIN_UNF: /* window underflow */
498 060366c5 bellard
            restore_window(env);
499 060366c5 bellard
            break;
500 e80cfcfc bellard
        case 0x100: // XXX, why do we get these?
501 e80cfcfc bellard
            break;
502 060366c5 bellard
        default:
503 060366c5 bellard
            printf ("Unhandled trap: 0x%x\n", trapnr);
504 7fe48483 bellard
            cpu_dump_state(env, stderr, fprintf, 0);
505 060366c5 bellard
            exit (1);
506 060366c5 bellard
        }
507 060366c5 bellard
        process_pending_signals (env);
508 060366c5 bellard
    }
509 93ac68bc bellard
}
510 93ac68bc bellard
511 93ac68bc bellard
#endif
512 93ac68bc bellard
513 67867308 bellard
#ifdef TARGET_PPC
514 9fddaa0c bellard
515 9fddaa0c bellard
static inline uint64_t cpu_ppc_get_tb (CPUState *env)
516 9fddaa0c bellard
{
517 9fddaa0c bellard
    /* TO FIX */
518 9fddaa0c bellard
    return 0;
519 9fddaa0c bellard
}
520 9fddaa0c bellard
  
521 9fddaa0c bellard
uint32_t cpu_ppc_load_tbl (CPUState *env)
522 9fddaa0c bellard
{
523 9fddaa0c bellard
    return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
524 9fddaa0c bellard
}
525 9fddaa0c bellard
  
526 9fddaa0c bellard
uint32_t cpu_ppc_load_tbu (CPUState *env)
527 9fddaa0c bellard
{
528 9fddaa0c bellard
    return cpu_ppc_get_tb(env) >> 32;
529 9fddaa0c bellard
}
530 9fddaa0c bellard
  
531 9fddaa0c bellard
static void cpu_ppc_store_tb (CPUState *env, uint64_t value)
532 9fddaa0c bellard
{
533 9fddaa0c bellard
    /* TO FIX */
534 9fddaa0c bellard
}
535 9fddaa0c bellard
536 9fddaa0c bellard
void cpu_ppc_store_tbu (CPUState *env, uint32_t value)
537 9fddaa0c bellard
{
538 9fddaa0c bellard
    cpu_ppc_store_tb(env, ((uint64_t)value << 32) | cpu_ppc_load_tbl(env));
539 9fddaa0c bellard
}
540 9fddaa0c bellard
 
541 9fddaa0c bellard
void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
542 9fddaa0c bellard
{
543 9fddaa0c bellard
    cpu_ppc_store_tb(env, ((uint64_t)cpu_ppc_load_tbl(env) << 32) | value);
544 9fddaa0c bellard
}
545 9fddaa0c bellard
  
546 9fddaa0c bellard
uint32_t cpu_ppc_load_decr (CPUState *env)
547 9fddaa0c bellard
{
548 9fddaa0c bellard
    /* TO FIX */
549 9fddaa0c bellard
    return -1;
550 9fddaa0c bellard
}
551 9fddaa0c bellard
 
552 9fddaa0c bellard
void cpu_ppc_store_decr (CPUState *env, uint32_t value)
553 9fddaa0c bellard
{
554 9fddaa0c bellard
    /* TO FIX */
555 9fddaa0c bellard
}
556 9fddaa0c bellard
 
557 67867308 bellard
void cpu_loop(CPUPPCState *env)
558 67867308 bellard
{
559 67867308 bellard
    target_siginfo_t info;
560 61190b14 bellard
    int trapnr;
561 61190b14 bellard
    uint32_t ret;
562 67867308 bellard
    
563 67867308 bellard
    for(;;) {
564 67867308 bellard
        trapnr = cpu_ppc_exec(env);
565 61190b14 bellard
        if (trapnr != EXCP_SYSCALL_USER && trapnr != EXCP_BRANCH &&
566 61190b14 bellard
            trapnr != EXCP_TRACE) {
567 61190b14 bellard
            if (loglevel > 0) {
568 7fe48483 bellard
                cpu_dump_state(env, logfile, fprintf, 0);
569 61190b14 bellard
            }
570 61190b14 bellard
        }
571 67867308 bellard
        switch(trapnr) {
572 67867308 bellard
        case EXCP_NONE:
573 67867308 bellard
            break;
574 61190b14 bellard
        case EXCP_SYSCALL_USER:
575 61190b14 bellard
            /* system call */
576 61190b14 bellard
            /* WARNING:
577 61190b14 bellard
             * PPC ABI uses overflow flag in cr0 to signal an error
578 61190b14 bellard
             * in syscalls.
579 61190b14 bellard
             */
580 67867308 bellard
#if 0
581 61190b14 bellard
            printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
582 61190b14 bellard
                   env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
583 67867308 bellard
#endif
584 61190b14 bellard
            env->crf[0] &= ~0x1;
585 61190b14 bellard
            ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
586 61190b14 bellard
                             env->gpr[5], env->gpr[6], env->gpr[7],
587 61190b14 bellard
                             env->gpr[8]);
588 61190b14 bellard
            if (ret > (uint32_t)(-515)) {
589 61190b14 bellard
                env->crf[0] |= 0x1;
590 61190b14 bellard
                ret = -ret;
591 61190b14 bellard
            }
592 61190b14 bellard
            env->gpr[3] = ret;
593 61190b14 bellard
#if 0
594 61190b14 bellard
            printf("syscall returned 0x%08x (%d)\n", ret, ret);
595 61190b14 bellard
#endif
596 61190b14 bellard
            break;
597 61190b14 bellard
        case EXCP_RESET:
598 61190b14 bellard
            /* Should not happen ! */
599 61190b14 bellard
            fprintf(stderr, "RESET asked... Stop emulation\n");
600 61190b14 bellard
            if (loglevel)
601 61190b14 bellard
                fprintf(logfile, "RESET asked... Stop emulation\n");
602 67867308 bellard
            abort();
603 61190b14 bellard
        case EXCP_MACHINE_CHECK:
604 61190b14 bellard
            fprintf(stderr, "Machine check exeption...  Stop emulation\n");
605 61190b14 bellard
            if (loglevel)
606 61190b14 bellard
                fprintf(logfile, "RESET asked... Stop emulation\n");
607 61190b14 bellard
            info.si_signo = TARGET_SIGBUS;
608 67867308 bellard
            info.si_errno = 0;
609 61190b14 bellard
            info.si_code = TARGET_BUS_OBJERR;
610 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
611 61190b14 bellard
            queue_signal(info.si_signo, &info);
612 61190b14 bellard
        case EXCP_DSI:
613 61190b14 bellard
            fprintf(stderr, "Invalid data memory access: 0x%08x\n", env->spr[DAR]);
614 61190b14 bellard
            if (loglevel) {
615 61190b14 bellard
                fprintf(logfile, "Invalid data memory access: 0x%08x\n",
616 61190b14 bellard
                        env->spr[DAR]);
617 61190b14 bellard
            }
618 61190b14 bellard
            switch (env->error_code & 0xF) {
619 61190b14 bellard
            case EXCP_DSI_TRANSLATE:
620 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
621 61190b14 bellard
                info.si_errno = 0;
622 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
623 61190b14 bellard
                break;
624 61190b14 bellard
            case EXCP_DSI_NOTSUP:
625 61190b14 bellard
            case EXCP_DSI_EXTERNAL:
626 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
627 61190b14 bellard
                info.si_errno = 0;
628 61190b14 bellard
                info.si_code = TARGET_ILL_ILLADR;
629 61190b14 bellard
                break;
630 61190b14 bellard
            case EXCP_DSI_PROT: 
631 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
632 61190b14 bellard
                info.si_errno = 0;
633 61190b14 bellard
                info.si_code = TARGET_SEGV_ACCERR;
634 61190b14 bellard
                break;
635 61190b14 bellard
            case EXCP_DSI_DABR:
636 61190b14 bellard
                info.si_signo = TARGET_SIGTRAP;
637 61190b14 bellard
                info.si_errno = 0;
638 61190b14 bellard
                info.si_code = TARGET_TRAP_BRKPT;
639 61190b14 bellard
                break;
640 61190b14 bellard
            default:
641 61190b14 bellard
                /* Let's send a regular segfault... */
642 61190b14 bellard
                fprintf(stderr, "Invalid segfault errno (%02x)\n",
643 61190b14 bellard
                        env->error_code);
644 61190b14 bellard
                if (loglevel) {
645 61190b14 bellard
                    fprintf(logfile, "Invalid segfault errno (%02x)\n",
646 61190b14 bellard
                            env->error_code);
647 61190b14 bellard
                }
648 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
649 61190b14 bellard
                info.si_errno = 0;
650 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
651 61190b14 bellard
                break;
652 61190b14 bellard
            }
653 67867308 bellard
            info._sifields._sigfault._addr = env->nip;
654 67867308 bellard
            queue_signal(info.si_signo, &info);
655 67867308 bellard
            break;
656 61190b14 bellard
        case EXCP_ISI:
657 67867308 bellard
            fprintf(stderr, "Invalid instruction fetch\n");
658 61190b14 bellard
            if (loglevel)
659 61190b14 bellard
                fprintf(logfile, "Invalid instruction fetch\n");
660 61190b14 bellard
            switch (env->error_code) {
661 61190b14 bellard
            case EXCP_ISI_TRANSLATE:
662 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
663 67867308 bellard
            info.si_errno = 0;
664 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
665 61190b14 bellard
                break;
666 61190b14 bellard
            case EXCP_ISI_GUARD:
667 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
668 61190b14 bellard
                info.si_errno = 0;
669 61190b14 bellard
                info.si_code = TARGET_ILL_ILLADR;
670 61190b14 bellard
                break;
671 61190b14 bellard
            case EXCP_ISI_NOEXEC:
672 61190b14 bellard
            case EXCP_ISI_PROT:
673 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
674 61190b14 bellard
                info.si_errno = 0;
675 61190b14 bellard
                info.si_code = TARGET_SEGV_ACCERR;
676 61190b14 bellard
                break;
677 61190b14 bellard
            default:
678 61190b14 bellard
                /* Let's send a regular segfault... */
679 61190b14 bellard
                fprintf(stderr, "Invalid segfault errno (%02x)\n",
680 61190b14 bellard
                        env->error_code);
681 61190b14 bellard
                if (loglevel) {
682 61190b14 bellard
                    fprintf(logfile, "Invalid segfault errno (%02x)\n",
683 61190b14 bellard
                            env->error_code);
684 61190b14 bellard
                }
685 61190b14 bellard
                info.si_signo = TARGET_SIGSEGV;
686 61190b14 bellard
                info.si_errno = 0;
687 61190b14 bellard
                info.si_code = TARGET_SEGV_MAPERR;
688 61190b14 bellard
                break;
689 61190b14 bellard
            }
690 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
691 67867308 bellard
            queue_signal(info.si_signo, &info);
692 67867308 bellard
            break;
693 61190b14 bellard
        case EXCP_EXTERNAL:
694 61190b14 bellard
            /* Should not happen ! */
695 61190b14 bellard
            fprintf(stderr, "External interruption... Stop emulation\n");
696 61190b14 bellard
            if (loglevel)
697 61190b14 bellard
                fprintf(logfile, "External interruption... Stop emulation\n");
698 67867308 bellard
            abort();
699 61190b14 bellard
        case EXCP_ALIGN:
700 61190b14 bellard
            fprintf(stderr, "Invalid unaligned memory access\n");
701 61190b14 bellard
            if (loglevel)
702 61190b14 bellard
                fprintf(logfile, "Invalid unaligned memory access\n");
703 61190b14 bellard
            info.si_signo = TARGET_SIGBUS;
704 67867308 bellard
            info.si_errno = 0;
705 61190b14 bellard
            info.si_code = TARGET_BUS_ADRALN;
706 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
707 67867308 bellard
            queue_signal(info.si_signo, &info);
708 67867308 bellard
            break;
709 61190b14 bellard
        case EXCP_PROGRAM:
710 61190b14 bellard
            switch (env->error_code & ~0xF) {
711 61190b14 bellard
            case EXCP_FP:
712 61190b14 bellard
            fprintf(stderr, "Program exception\n");
713 61190b14 bellard
                if (loglevel)
714 61190b14 bellard
                    fprintf(logfile, "Program exception\n");
715 61190b14 bellard
                /* Set FX */
716 61190b14 bellard
                env->fpscr[7] |= 0x8;
717 61190b14 bellard
                /* Finally, update FEX */
718 61190b14 bellard
                if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) &
719 61190b14 bellard
                    ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3)))
720 61190b14 bellard
                    env->fpscr[7] |= 0x4;
721 61190b14 bellard
                info.si_signo = TARGET_SIGFPE;
722 61190b14 bellard
                info.si_errno = 0;
723 61190b14 bellard
                switch (env->error_code & 0xF) {
724 61190b14 bellard
                case EXCP_FP_OX:
725 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTOVF;
726 61190b14 bellard
                    break;
727 61190b14 bellard
                case EXCP_FP_UX:
728 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTUND;
729 61190b14 bellard
                    break;
730 61190b14 bellard
                case EXCP_FP_ZX:
731 61190b14 bellard
                case EXCP_FP_VXZDZ:
732 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTDIV;
733 61190b14 bellard
                    break;
734 61190b14 bellard
                case EXCP_FP_XX:
735 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTRES;
736 61190b14 bellard
                    break;
737 61190b14 bellard
                case EXCP_FP_VXSOFT:
738 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTINV;
739 61190b14 bellard
                    break;
740 61190b14 bellard
                case EXCP_FP_VXNAN:
741 61190b14 bellard
                case EXCP_FP_VXISI:
742 61190b14 bellard
                case EXCP_FP_VXIDI:
743 61190b14 bellard
                case EXCP_FP_VXIMZ:
744 61190b14 bellard
                case EXCP_FP_VXVC:
745 61190b14 bellard
                case EXCP_FP_VXSQRT:
746 61190b14 bellard
                case EXCP_FP_VXCVI:
747 61190b14 bellard
                    info.si_code = TARGET_FPE_FLTSUB;
748 61190b14 bellard
                    break;
749 61190b14 bellard
                default:
750 61190b14 bellard
                    fprintf(stderr, "Unknown floating point exception "
751 61190b14 bellard
                            "(%02x)\n", env->error_code);
752 61190b14 bellard
                    if (loglevel) {
753 61190b14 bellard
                        fprintf(logfile, "Unknown floating point exception "
754 61190b14 bellard
                                "(%02x)\n", env->error_code & 0xF);
755 61190b14 bellard
                    }
756 61190b14 bellard
                }
757 61190b14 bellard
            break;
758 67867308 bellard
        case EXCP_INVAL:
759 61190b14 bellard
                fprintf(stderr, "Invalid instruction\n");
760 61190b14 bellard
                if (loglevel)
761 61190b14 bellard
                    fprintf(logfile, "Invalid instruction\n");
762 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
763 61190b14 bellard
                info.si_errno = 0;
764 61190b14 bellard
                switch (env->error_code & 0xF) {
765 61190b14 bellard
                case EXCP_INVAL_INVAL:
766 61190b14 bellard
                    info.si_code = TARGET_ILL_ILLOPC;
767 61190b14 bellard
                    break;
768 61190b14 bellard
                case EXCP_INVAL_LSWX:
769 67867308 bellard
            info.si_code = TARGET_ILL_ILLOPN;
770 61190b14 bellard
                    break;
771 61190b14 bellard
                case EXCP_INVAL_SPR:
772 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVREG;
773 61190b14 bellard
                    break;
774 61190b14 bellard
                case EXCP_INVAL_FP:
775 61190b14 bellard
                    info.si_code = TARGET_ILL_COPROC;
776 61190b14 bellard
                    break;
777 61190b14 bellard
                default:
778 61190b14 bellard
                    fprintf(stderr, "Unknown invalid operation (%02x)\n",
779 61190b14 bellard
                            env->error_code & 0xF);
780 61190b14 bellard
                    if (loglevel) {
781 61190b14 bellard
                        fprintf(logfile, "Unknown invalid operation (%02x)\n",
782 61190b14 bellard
                                env->error_code & 0xF);
783 61190b14 bellard
                    }
784 61190b14 bellard
                    info.si_code = TARGET_ILL_ILLADR;
785 61190b14 bellard
                    break;
786 61190b14 bellard
                }
787 61190b14 bellard
                break;
788 61190b14 bellard
            case EXCP_PRIV:
789 61190b14 bellard
                fprintf(stderr, "Privilege violation\n");
790 61190b14 bellard
                if (loglevel)
791 61190b14 bellard
                    fprintf(logfile, "Privilege violation\n");
792 61190b14 bellard
                info.si_signo = TARGET_SIGILL;
793 61190b14 bellard
                info.si_errno = 0;
794 61190b14 bellard
                switch (env->error_code & 0xF) {
795 61190b14 bellard
                case EXCP_PRIV_OPC:
796 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVOPC;
797 61190b14 bellard
                    break;
798 61190b14 bellard
                case EXCP_PRIV_REG:
799 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVREG;
800 61190b14 bellard
                break;
801 61190b14 bellard
                default:
802 61190b14 bellard
                    fprintf(stderr, "Unknown privilege violation (%02x)\n",
803 61190b14 bellard
                            env->error_code & 0xF);
804 61190b14 bellard
                    info.si_code = TARGET_ILL_PRVOPC;
805 61190b14 bellard
                    break;
806 61190b14 bellard
                }
807 61190b14 bellard
                break;
808 61190b14 bellard
            case EXCP_TRAP:
809 61190b14 bellard
                fprintf(stderr, "Tried to call a TRAP\n");
810 61190b14 bellard
                if (loglevel)
811 61190b14 bellard
                    fprintf(logfile, "Tried to call a TRAP\n");
812 61190b14 bellard
                abort();
813 61190b14 bellard
            default:
814 61190b14 bellard
                /* Should not happen ! */
815 61190b14 bellard
                fprintf(stderr, "Unknown program exception (%02x)\n",
816 61190b14 bellard
                        env->error_code);
817 61190b14 bellard
                if (loglevel) {
818 61190b14 bellard
                    fprintf(logfile, "Unknwon program exception (%02x)\n",
819 61190b14 bellard
                            env->error_code);
820 61190b14 bellard
                }
821 61190b14 bellard
                abort();
822 61190b14 bellard
            }
823 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
824 67867308 bellard
            queue_signal(info.si_signo, &info);
825 67867308 bellard
            break;
826 61190b14 bellard
        case EXCP_NO_FP:
827 61190b14 bellard
            fprintf(stderr, "No floating point allowed\n");
828 61190b14 bellard
            if (loglevel)
829 61190b14 bellard
                fprintf(logfile, "No floating point allowed\n");
830 61190b14 bellard
            info.si_signo = TARGET_SIGILL;
831 67867308 bellard
            info.si_errno = 0;
832 61190b14 bellard
            info.si_code = TARGET_ILL_COPROC;
833 61190b14 bellard
            info._sifields._sigfault._addr = env->nip - 4;
834 67867308 bellard
            queue_signal(info.si_signo, &info);
835 67867308 bellard
            break;
836 61190b14 bellard
        case EXCP_DECR:
837 61190b14 bellard
            /* Should not happen ! */
838 61190b14 bellard
            fprintf(stderr, "Decrementer exception\n");
839 61190b14 bellard
            if (loglevel)
840 61190b14 bellard
                fprintf(logfile, "Decrementer exception\n");
841 61190b14 bellard
            abort();
842 67867308 bellard
        case EXCP_RESA: /* Implementation specific          */
843 61190b14 bellard
            /* Should not happen ! */
844 61190b14 bellard
            fprintf(stderr, "RESA exception should never happen !\n");
845 61190b14 bellard
            if (loglevel)
846 61190b14 bellard
                fprintf(logfile, "RESA exception should never happen !\n");
847 61190b14 bellard
            abort();
848 67867308 bellard
        case EXCP_RESB: /* Implementation specific          */
849 61190b14 bellard
            /* Should not happen ! */
850 61190b14 bellard
            fprintf(stderr, "RESB exception should never happen !\n");
851 61190b14 bellard
            if (loglevel)
852 61190b14 bellard
                fprintf(logfile, "RESB exception should never happen !\n");
853 67867308 bellard
            abort();
854 61190b14 bellard
        case EXCP_TRACE:
855 61190b14 bellard
            /* Do nothing: we use this to trace execution */
856 67867308 bellard
            break;
857 61190b14 bellard
        case EXCP_FP_ASSIST:
858 61190b14 bellard
            /* Should not happen ! */
859 61190b14 bellard
            fprintf(stderr, "Floating point assist exception\n");
860 61190b14 bellard
            if (loglevel)
861 61190b14 bellard
                fprintf(logfile, "Floating point assist exception\n");
862 61190b14 bellard
            abort();
863 61190b14 bellard
        case EXCP_MTMSR:
864 61190b14 bellard
            /* We reloaded the msr, just go on */
865 9fddaa0c bellard
            if (msr_pr == 0) {
866 61190b14 bellard
                fprintf(stderr, "Tried to go into supervisor mode !\n");
867 61190b14 bellard
                if (loglevel)
868 61190b14 bellard
                    fprintf(logfile, "Tried to go into supervisor mode !\n");
869 61190b14 bellard
                abort();
870 67867308 bellard
        }
871 61190b14 bellard
            break;
872 61190b14 bellard
        case EXCP_BRANCH:
873 61190b14 bellard
            /* We stopped because of a jump... */
874 61190b14 bellard
            break;
875 61190b14 bellard
        case EXCP_RFI:
876 61190b14 bellard
            /* Should not occur: we always are in user mode */
877 61190b14 bellard
            fprintf(stderr, "Return from interrupt ?\n");
878 61190b14 bellard
            if (loglevel)
879 61190b14 bellard
                fprintf(logfile, "Return from interrupt ?\n");
880 61190b14 bellard
            abort();
881 61190b14 bellard
        case EXCP_INTERRUPT:
882 61190b14 bellard
            /* Don't know why this should ever happen... */
883 61190b14 bellard
            break;
884 a541f297 bellard
        case EXCP_DEBUG:
885 a541f297 bellard
            break;
886 67867308 bellard
        default:
887 67867308 bellard
            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 
888 67867308 bellard
                    trapnr);
889 61190b14 bellard
            if (loglevel) {
890 61190b14 bellard
                fprintf(logfile, "qemu: unhandled CPU exception 0x%02x - "
891 61190b14 bellard
                        "0x%02x - aborting\n", trapnr, env->error_code);
892 61190b14 bellard
            }
893 67867308 bellard
            abort();
894 67867308 bellard
        }
895 67867308 bellard
        process_pending_signals(env);
896 67867308 bellard
    }
897 67867308 bellard
}
898 67867308 bellard
#endif
899 67867308 bellard
900 31e31b8a bellard
void usage(void)
901 31e31b8a bellard
{
902 4606bb3f bellard
    printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2004 Fabrice Bellard\n"
903 6f1f31c0 bellard
           "usage: qemu-" TARGET_ARCH " [-h] [-d opts] [-L path] [-s size] program [arguments...]\n"
904 b346ff46 bellard
           "Linux CPU emulator (compiled for %s emulation)\n"
905 d691f669 bellard
           "\n"
906 54936004 bellard
           "-h           print this help\n"
907 b346ff46 bellard
           "-L path      set the elf interpreter prefix (default=%s)\n"
908 b346ff46 bellard
           "-s size      set the stack size in bytes (default=%ld)\n"
909 54936004 bellard
           "\n"
910 54936004 bellard
           "debug options:\n"
911 c6981055 bellard
#ifdef USE_CODE_COPY
912 c6981055 bellard
           "-no-code-copy   disable code copy acceleration\n"
913 c6981055 bellard
#endif
914 6f1f31c0 bellard
           "-d options   activate log (logfile=%s)\n"
915 54936004 bellard
           "-p pagesize  set the host page size to 'pagesize'\n",
916 b346ff46 bellard
           TARGET_ARCH,
917 d691f669 bellard
           interp_prefix, 
918 54936004 bellard
           x86_stack_size,
919 54936004 bellard
           DEBUG_LOGFILE);
920 74cd30b8 bellard
    _exit(1);
921 31e31b8a bellard
}
922 31e31b8a bellard
923 9de5e440 bellard
/* XXX: currently only used for async signals (see signal.c) */
924 b346ff46 bellard
CPUState *global_env;
925 59faf6d6 bellard
/* used only if single thread */
926 59faf6d6 bellard
CPUState *cpu_single_env = NULL;
927 59faf6d6 bellard
928 851e67a1 bellard
/* used to free thread contexts */
929 851e67a1 bellard
TaskState *first_task_state;
930 9de5e440 bellard
931 31e31b8a bellard
int main(int argc, char **argv)
932 31e31b8a bellard
{
933 31e31b8a bellard
    const char *filename;
934 01ffc75b bellard
    struct target_pt_regs regs1, *regs = &regs1;
935 31e31b8a bellard
    struct image_info info1, *info = &info1;
936 851e67a1 bellard
    TaskState ts1, *ts = &ts1;
937 b346ff46 bellard
    CPUState *env;
938 586314f2 bellard
    int optind;
939 d691f669 bellard
    const char *r;
940 d691f669 bellard
    
941 31e31b8a bellard
    if (argc <= 1)
942 31e31b8a bellard
        usage();
943 f801f97e bellard
944 cc38b844 bellard
    /* init debug */
945 cc38b844 bellard
    cpu_set_log_filename(DEBUG_LOGFILE);
946 cc38b844 bellard
947 586314f2 bellard
    optind = 1;
948 d691f669 bellard
    for(;;) {
949 d691f669 bellard
        if (optind >= argc)
950 d691f669 bellard
            break;
951 d691f669 bellard
        r = argv[optind];
952 d691f669 bellard
        if (r[0] != '-')
953 d691f669 bellard
            break;
954 586314f2 bellard
        optind++;
955 d691f669 bellard
        r++;
956 d691f669 bellard
        if (!strcmp(r, "-")) {
957 d691f669 bellard
            break;
958 d691f669 bellard
        } else if (!strcmp(r, "d")) {
959 e19e89a5 bellard
            int mask;
960 e19e89a5 bellard
            CPULogItem *item;
961 6f1f31c0 bellard
962 6f1f31c0 bellard
            if (optind >= argc)
963 6f1f31c0 bellard
                break;
964 e19e89a5 bellard
            
965 6f1f31c0 bellard
            r = argv[optind++];
966 6f1f31c0 bellard
            mask = cpu_str_to_log_mask(r);
967 e19e89a5 bellard
            if (!mask) {
968 e19e89a5 bellard
                printf("Log items (comma separated):\n");
969 e19e89a5 bellard
                for(item = cpu_log_items; item->mask != 0; item++) {
970 e19e89a5 bellard
                    printf("%-10s %s\n", item->name, item->help);
971 e19e89a5 bellard
                }
972 e19e89a5 bellard
                exit(1);
973 e19e89a5 bellard
            }
974 e19e89a5 bellard
            cpu_set_log(mask);
975 d691f669 bellard
        } else if (!strcmp(r, "s")) {
976 d691f669 bellard
            r = argv[optind++];
977 d691f669 bellard
            x86_stack_size = strtol(r, (char **)&r, 0);
978 d691f669 bellard
            if (x86_stack_size <= 0)
979 d691f669 bellard
                usage();
980 d691f669 bellard
            if (*r == 'M')
981 d691f669 bellard
                x86_stack_size *= 1024 * 1024;
982 d691f669 bellard
            else if (*r == 'k' || *r == 'K')
983 d691f669 bellard
                x86_stack_size *= 1024;
984 d691f669 bellard
        } else if (!strcmp(r, "L")) {
985 d691f669 bellard
            interp_prefix = argv[optind++];
986 54936004 bellard
        } else if (!strcmp(r, "p")) {
987 83fb7adf bellard
            qemu_host_page_size = atoi(argv[optind++]);
988 83fb7adf bellard
            if (qemu_host_page_size == 0 ||
989 83fb7adf bellard
                (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
990 54936004 bellard
                fprintf(stderr, "page size must be a power of two\n");
991 54936004 bellard
                exit(1);
992 54936004 bellard
            }
993 c6981055 bellard
        } else 
994 c6981055 bellard
#ifdef USE_CODE_COPY
995 c6981055 bellard
        if (!strcmp(r, "no-code-copy")) {
996 c6981055 bellard
            code_copy_enabled = 0;
997 c6981055 bellard
        } else 
998 c6981055 bellard
#endif
999 c6981055 bellard
        {
1000 d691f669 bellard
            usage();
1001 d691f669 bellard
        }
1002 586314f2 bellard
    }
1003 d691f669 bellard
    if (optind >= argc)
1004 d691f669 bellard
        usage();
1005 586314f2 bellard
    filename = argv[optind];
1006 586314f2 bellard
1007 31e31b8a bellard
    /* Zero out regs */
1008 01ffc75b bellard
    memset(regs, 0, sizeof(struct target_pt_regs));
1009 31e31b8a bellard
1010 31e31b8a bellard
    /* Zero out image_info */
1011 31e31b8a bellard
    memset(info, 0, sizeof(struct image_info));
1012 31e31b8a bellard
1013 74cd30b8 bellard
    /* Scan interp_prefix dir for replacement files. */
1014 74cd30b8 bellard
    init_paths(interp_prefix);
1015 74cd30b8 bellard
1016 83fb7adf bellard
    /* NOTE: we need to init the CPU at this stage to get
1017 83fb7adf bellard
       qemu_host_page_size */
1018 b346ff46 bellard
    env = cpu_init();
1019 92ccca6a bellard
    
1020 74cd30b8 bellard
    if (elf_exec(filename, argv+optind, environ, regs, info) != 0) {
1021 31e31b8a bellard
        printf("Error loading %s\n", filename);
1022 74cd30b8 bellard
        _exit(1);
1023 31e31b8a bellard
    }
1024 31e31b8a bellard
    
1025 4b74fe1f bellard
    if (loglevel) {
1026 54936004 bellard
        page_dump(logfile);
1027 54936004 bellard
    
1028 4b74fe1f bellard
        fprintf(logfile, "start_brk   0x%08lx\n" , info->start_brk);
1029 4b74fe1f bellard
        fprintf(logfile, "end_code    0x%08lx\n" , info->end_code);
1030 4b74fe1f bellard
        fprintf(logfile, "start_code  0x%08lx\n" , info->start_code);
1031 4b74fe1f bellard
        fprintf(logfile, "end_data    0x%08lx\n" , info->end_data);
1032 4b74fe1f bellard
        fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
1033 4b74fe1f bellard
        fprintf(logfile, "brk         0x%08lx\n" , info->brk);
1034 b346ff46 bellard
        fprintf(logfile, "entry       0x%08lx\n" , info->entry);
1035 4b74fe1f bellard
    }
1036 31e31b8a bellard
1037 31e31b8a bellard
    target_set_brk((char *)info->brk);
1038 31e31b8a bellard
    syscall_init();
1039 66fb9763 bellard
    signal_init();
1040 31e31b8a bellard
1041 9de5e440 bellard
    global_env = env;
1042 0ecfa993 bellard
1043 851e67a1 bellard
    /* build Task State */
1044 851e67a1 bellard
    memset(ts, 0, sizeof(TaskState));
1045 851e67a1 bellard
    env->opaque = ts;
1046 851e67a1 bellard
    ts->used = 1;
1047 59faf6d6 bellard
    env->user_mode_only = 1;
1048 851e67a1 bellard
    
1049 b346ff46 bellard
#if defined(TARGET_I386)
1050 2e255c6b bellard
    cpu_x86_set_cpl(env, 3);
1051 2e255c6b bellard
1052 3802ce26 bellard
    env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1053 75c6215f bellard
    env->hflags |= HF_PE_MASK;
1054 3802ce26 bellard
1055 415e561f bellard
    /* flags setup : we activate the IRQs by default as in user mode */
1056 415e561f bellard
    env->eflags |= IF_MASK;
1057 415e561f bellard
    
1058 6dbad63e bellard
    /* linux register setup */
1059 0ecfa993 bellard
    env->regs[R_EAX] = regs->eax;
1060 0ecfa993 bellard
    env->regs[R_EBX] = regs->ebx;
1061 0ecfa993 bellard
    env->regs[R_ECX] = regs->ecx;
1062 0ecfa993 bellard
    env->regs[R_EDX] = regs->edx;
1063 0ecfa993 bellard
    env->regs[R_ESI] = regs->esi;
1064 0ecfa993 bellard
    env->regs[R_EDI] = regs->edi;
1065 0ecfa993 bellard
    env->regs[R_EBP] = regs->ebp;
1066 0ecfa993 bellard
    env->regs[R_ESP] = regs->esp;
1067 dab2ed99 bellard
    env->eip = regs->eip;
1068 31e31b8a bellard
1069 f4beb510 bellard
    /* linux interrupt setup */
1070 f4beb510 bellard
    env->idt.base = (void *)idt_table;
1071 f4beb510 bellard
    env->idt.limit = sizeof(idt_table) - 1;
1072 f4beb510 bellard
    set_idt(0, 0);
1073 f4beb510 bellard
    set_idt(1, 0);
1074 f4beb510 bellard
    set_idt(2, 0);
1075 f4beb510 bellard
    set_idt(3, 3);
1076 f4beb510 bellard
    set_idt(4, 3);
1077 f4beb510 bellard
    set_idt(5, 3);
1078 f4beb510 bellard
    set_idt(6, 0);
1079 f4beb510 bellard
    set_idt(7, 0);
1080 f4beb510 bellard
    set_idt(8, 0);
1081 f4beb510 bellard
    set_idt(9, 0);
1082 f4beb510 bellard
    set_idt(10, 0);
1083 f4beb510 bellard
    set_idt(11, 0);
1084 f4beb510 bellard
    set_idt(12, 0);
1085 f4beb510 bellard
    set_idt(13, 0);
1086 f4beb510 bellard
    set_idt(14, 0);
1087 f4beb510 bellard
    set_idt(15, 0);
1088 f4beb510 bellard
    set_idt(16, 0);
1089 f4beb510 bellard
    set_idt(17, 0);
1090 f4beb510 bellard
    set_idt(18, 0);
1091 f4beb510 bellard
    set_idt(19, 0);
1092 f4beb510 bellard
    set_idt(0x80, 3);
1093 f4beb510 bellard
1094 6dbad63e bellard
    /* linux segment setup */
1095 6dbad63e bellard
    env->gdt.base = (void *)gdt_table;
1096 6dbad63e bellard
    env->gdt.limit = sizeof(gdt_table) - 1;
1097 f4beb510 bellard
    write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
1098 f4beb510 bellard
             DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 
1099 f4beb510 bellard
             (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
1100 f4beb510 bellard
    write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
1101 f4beb510 bellard
             DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 
1102 f4beb510 bellard
             (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
1103 6dbad63e bellard
    cpu_x86_load_seg(env, R_CS, __USER_CS);
1104 6dbad63e bellard
    cpu_x86_load_seg(env, R_DS, __USER_DS);
1105 6dbad63e bellard
    cpu_x86_load_seg(env, R_ES, __USER_DS);
1106 6dbad63e bellard
    cpu_x86_load_seg(env, R_SS, __USER_DS);
1107 6dbad63e bellard
    cpu_x86_load_seg(env, R_FS, __USER_DS);
1108 6dbad63e bellard
    cpu_x86_load_seg(env, R_GS, __USER_DS);
1109 92ccca6a bellard
1110 b346ff46 bellard
#elif defined(TARGET_ARM)
1111 b346ff46 bellard
    {
1112 b346ff46 bellard
        int i;
1113 b346ff46 bellard
        for(i = 0; i < 16; i++) {
1114 b346ff46 bellard
            env->regs[i] = regs->uregs[i];
1115 b346ff46 bellard
        }
1116 b346ff46 bellard
        env->cpsr = regs->uregs[16];
1117 b346ff46 bellard
    }
1118 93ac68bc bellard
#elif defined(TARGET_SPARC)
1119 060366c5 bellard
    {
1120 060366c5 bellard
        int i;
1121 060366c5 bellard
        env->pc = regs->pc;
1122 060366c5 bellard
        env->npc = regs->npc;
1123 060366c5 bellard
        env->y = regs->y;
1124 060366c5 bellard
        for(i = 0; i < 8; i++)
1125 060366c5 bellard
            env->gregs[i] = regs->u_regs[i];
1126 060366c5 bellard
        for(i = 0; i < 8; i++)
1127 060366c5 bellard
            env->regwptr[i] = regs->u_regs[i + 8];
1128 060366c5 bellard
    }
1129 67867308 bellard
#elif defined(TARGET_PPC)
1130 67867308 bellard
    {
1131 67867308 bellard
        int i;
1132 61190b14 bellard
        for (i = 0; i < 32; i++) {
1133 61190b14 bellard
            if (i != 12 && i != 6)
1134 61190b14 bellard
                env->msr[i] = (regs->msr >> i) & 1;
1135 61190b14 bellard
        }
1136 67867308 bellard
        env->nip = regs->nip;
1137 67867308 bellard
        for(i = 0; i < 32; i++) {
1138 67867308 bellard
            env->gpr[i] = regs->gpr[i];
1139 67867308 bellard
        }
1140 67867308 bellard
    }
1141 b346ff46 bellard
#else
1142 b346ff46 bellard
#error unsupported target CPU
1143 b346ff46 bellard
#endif
1144 31e31b8a bellard
1145 1b6b029e bellard
    cpu_loop(env);
1146 1b6b029e bellard
    /* never exits */
1147 31e31b8a bellard
    return 0;
1148 31e31b8a bellard
}