root / tcg / tcg-op.h @ e8996ee0
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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#ifdef CONFIG_DYNGEN_OP
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/* legacy dyngen operations */
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#include "gen-op.h" |
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#endif
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGv arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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} |
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static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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} |
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static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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} |
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static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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} |
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static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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} |
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static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5, TCGv arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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*gen_opparam_ptr++ = GET_TCGV(arg6); |
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} |
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static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5, TCGArg arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{ |
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tcg_gen_op1i(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_br(int label) |
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{ |
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tcg_gen_op1i(INDEX_op_br, label); |
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} |
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static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
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{ |
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if (GET_TCGV(ret) != GET_TCGV(arg))
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
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{ |
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tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_3(void *func, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 3, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4) |
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{ |
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TCGv args[4];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 4, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 0, NULL); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 1, &arg1); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 3, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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TCGv args[4];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 4, args); |
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tcg_temp_free(t0); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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TCGv t0 = tcg_const_i32(arg2); |
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tcg_gen_add_i32(ret, arg1, t0); |
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tcg_temp_free(t0); |
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} |
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} |
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static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
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} |
372 |
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static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
374 |
{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
378 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
380 |
tcg_gen_sub_i32(ret, arg1, t0); |
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tcg_temp_free(t0); |
382 |
} |
383 |
} |
384 |
|
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static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
388 |
} |
389 |
|
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static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
391 |
{ |
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/* some cases can be optimized here */
|
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if (arg2 == 0) { |
394 |
tcg_gen_movi_i32(ret, 0);
|
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} else if (arg2 == 0xffffffff) { |
396 |
tcg_gen_mov_i32(ret, arg1); |
397 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
399 |
tcg_gen_and_i32(ret, arg1, t0); |
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tcg_temp_free(t0); |
401 |
} |
402 |
} |
403 |
|
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static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
405 |
{ |
406 |
tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
407 |
} |
408 |
|
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static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
410 |
{ |
411 |
/* some cases can be optimized here */
|
412 |
if (arg2 == 0xffffffff) { |
413 |
tcg_gen_movi_i32(ret, 0xffffffff);
|
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} else if (arg2 == 0) { |
415 |
tcg_gen_mov_i32(ret, arg1); |
416 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
418 |
tcg_gen_or_i32(ret, arg1, t0); |
419 |
tcg_temp_free(t0); |
420 |
} |
421 |
} |
422 |
|
423 |
static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
424 |
{ |
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tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
426 |
} |
427 |
|
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static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
432 |
tcg_gen_mov_i32(ret, arg1); |
433 |
} else {
|
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TCGv t0 = tcg_const_i32(arg2); |
435 |
tcg_gen_xor_i32(ret, arg1, t0); |
436 |
tcg_temp_free(t0); |
437 |
} |
438 |
} |
439 |
|
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static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
441 |
{ |
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tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
443 |
} |
444 |
|
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static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
446 |
{ |
447 |
if (arg2 == 0) { |
448 |
tcg_gen_mov_i32(ret, arg1); |
449 |
} else {
|
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TCGv t0 = tcg_const_i32(arg2); |
451 |
tcg_gen_shl_i32(ret, arg1, t0); |
452 |
tcg_temp_free(t0); |
453 |
} |
454 |
} |
455 |
|
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static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
457 |
{ |
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tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
459 |
} |
460 |
|
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static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
462 |
{ |
463 |
if (arg2 == 0) { |
464 |
tcg_gen_mov_i32(ret, arg1); |
465 |
} else {
|
466 |
TCGv t0 = tcg_const_i32(arg2); |
467 |
tcg_gen_shr_i32(ret, arg1, t0); |
468 |
tcg_temp_free(t0); |
469 |
} |
470 |
} |
471 |
|
472 |
static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
473 |
{ |
474 |
tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
475 |
} |
476 |
|
477 |
static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
478 |
{ |
479 |
if (arg2 == 0) { |
480 |
tcg_gen_mov_i32(ret, arg1); |
481 |
} else {
|
482 |
TCGv t0 = tcg_const_i32(arg2); |
483 |
tcg_gen_sar_i32(ret, arg1, t0); |
484 |
tcg_temp_free(t0); |
485 |
} |
486 |
} |
487 |
|
488 |
static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
489 |
int label_index)
|
490 |
{ |
491 |
tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
492 |
} |
493 |
|
494 |
static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
495 |
{ |
496 |
tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
497 |
} |
498 |
|
499 |
static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
500 |
{ |
501 |
TCGv t0 = tcg_const_i32(arg2); |
502 |
tcg_gen_mul_i32(ret, arg1, t0); |
503 |
tcg_temp_free(t0); |
504 |
} |
505 |
|
506 |
#ifdef TCG_TARGET_HAS_div_i32
|
507 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
508 |
{ |
509 |
tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
510 |
} |
511 |
|
512 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
513 |
{ |
514 |
tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
515 |
} |
516 |
|
517 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
518 |
{ |
519 |
tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
520 |
} |
521 |
|
522 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
523 |
{ |
524 |
tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
525 |
} |
526 |
#else
|
527 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
528 |
{ |
529 |
TCGv t0; |
530 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
531 |
tcg_gen_sari_i32(t0, arg1, 31);
|
532 |
tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
533 |
tcg_temp_free(t0); |
534 |
} |
535 |
|
536 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
537 |
{ |
538 |
TCGv t0; |
539 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
540 |
tcg_gen_sari_i32(t0, arg1, 31);
|
541 |
tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
542 |
tcg_temp_free(t0); |
543 |
} |
544 |
|
545 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
546 |
{ |
547 |
TCGv t0; |
548 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
549 |
tcg_gen_movi_i32(t0, 0);
|
550 |
tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
551 |
tcg_temp_free(t0); |
552 |
} |
553 |
|
554 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
555 |
{ |
556 |
TCGv t0; |
557 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
558 |
tcg_gen_movi_i32(t0, 0);
|
559 |
tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
560 |
tcg_temp_free(t0); |
561 |
} |
562 |
#endif
|
563 |
|
564 |
#if TCG_TARGET_REG_BITS == 32 |
565 |
|
566 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
567 |
{ |
568 |
if (GET_TCGV(ret) != GET_TCGV(arg)) {
|
569 |
tcg_gen_mov_i32(ret, arg); |
570 |
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
571 |
} |
572 |
} |
573 |
|
574 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
575 |
{ |
576 |
tcg_gen_movi_i32(ret, arg); |
577 |
tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
|
578 |
} |
579 |
|
580 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
581 |
{ |
582 |
tcg_gen_ld8u_i32(ret, arg2, offset); |
583 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
584 |
} |
585 |
|
586 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
587 |
{ |
588 |
tcg_gen_ld8s_i32(ret, arg2, offset); |
589 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
590 |
} |
591 |
|
592 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
593 |
{ |
594 |
tcg_gen_ld16u_i32(ret, arg2, offset); |
595 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
596 |
} |
597 |
|
598 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
599 |
{ |
600 |
tcg_gen_ld16s_i32(ret, arg2, offset); |
601 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
602 |
} |
603 |
|
604 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
605 |
{ |
606 |
tcg_gen_ld_i32(ret, arg2, offset); |
607 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
608 |
} |
609 |
|
610 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
611 |
{ |
612 |
tcg_gen_ld_i32(ret, arg2, offset); |
613 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
614 |
} |
615 |
|
616 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
617 |
{ |
618 |
/* since arg2 and ret have different types, they cannot be the
|
619 |
same temporary */
|
620 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
621 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
622 |
tcg_gen_ld_i32(ret, arg2, offset + 4);
|
623 |
#else
|
624 |
tcg_gen_ld_i32(ret, arg2, offset); |
625 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
626 |
#endif
|
627 |
} |
628 |
|
629 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
630 |
{ |
631 |
tcg_gen_st8_i32(arg1, arg2, offset); |
632 |
} |
633 |
|
634 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
635 |
{ |
636 |
tcg_gen_st16_i32(arg1, arg2, offset); |
637 |
} |
638 |
|
639 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
640 |
{ |
641 |
tcg_gen_st_i32(arg1, arg2, offset); |
642 |
} |
643 |
|
644 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
645 |
{ |
646 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
647 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
648 |
tcg_gen_st_i32(arg1, arg2, offset + 4);
|
649 |
#else
|
650 |
tcg_gen_st_i32(arg1, arg2, offset); |
651 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
652 |
#endif
|
653 |
} |
654 |
|
655 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
656 |
{ |
657 |
tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
658 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
659 |
} |
660 |
|
661 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
662 |
{ |
663 |
TCGv t0 = tcg_const_i64(arg2); |
664 |
tcg_gen_add_i64(ret, arg1, t0); |
665 |
tcg_temp_free(t0); |
666 |
} |
667 |
|
668 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
669 |
{ |
670 |
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
671 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
672 |
} |
673 |
|
674 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
675 |
{ |
676 |
TCGv t0 = tcg_const_i64(arg2); |
677 |
tcg_gen_sub_i64(ret, arg1, t0); |
678 |
tcg_temp_free(t0); |
679 |
} |
680 |
|
681 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
682 |
{ |
683 |
tcg_gen_and_i32(ret, arg1, arg2); |
684 |
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
685 |
} |
686 |
|
687 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
688 |
{ |
689 |
tcg_gen_andi_i32(ret, arg1, arg2); |
690 |
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
691 |
} |
692 |
|
693 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
694 |
{ |
695 |
tcg_gen_or_i32(ret, arg1, arg2); |
696 |
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
697 |
} |
698 |
|
699 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
700 |
{ |
701 |
tcg_gen_ori_i32(ret, arg1, arg2); |
702 |
tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
703 |
} |
704 |
|
705 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
706 |
{ |
707 |
tcg_gen_xor_i32(ret, arg1, arg2); |
708 |
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
709 |
} |
710 |
|
711 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
712 |
{ |
713 |
tcg_gen_xori_i32(ret, arg1, arg2); |
714 |
tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
715 |
} |
716 |
|
717 |
/* XXX: use generic code when basic block handling is OK or CPU
|
718 |
specific code (x86) */
|
719 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
720 |
{ |
721 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
722 |
} |
723 |
|
724 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
725 |
{ |
726 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
727 |
} |
728 |
|
729 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
730 |
{ |
731 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
732 |
} |
733 |
|
734 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
735 |
{ |
736 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
737 |
} |
738 |
|
739 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
740 |
{ |
741 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
742 |
} |
743 |
|
744 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
745 |
{ |
746 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
747 |
} |
748 |
|
749 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
750 |
int label_index)
|
751 |
{ |
752 |
tcg_gen_op6ii(INDEX_op_brcond2_i32, |
753 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
754 |
cond, label_index); |
755 |
} |
756 |
|
757 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
758 |
{ |
759 |
TCGv t0, t1; |
760 |
|
761 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
762 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
763 |
|
764 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
765 |
|
766 |
tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
767 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
768 |
tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
769 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
770 |
|
771 |
tcg_gen_mov_i64(ret, t0); |
772 |
tcg_temp_free(t0); |
773 |
tcg_temp_free(t1); |
774 |
} |
775 |
|
776 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
777 |
{ |
778 |
TCGv t0 = tcg_const_i64(arg2); |
779 |
tcg_gen_mul_i64(ret, arg1, t0); |
780 |
tcg_temp_free(t0); |
781 |
} |
782 |
|
783 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
784 |
{ |
785 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
786 |
} |
787 |
|
788 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
789 |
{ |
790 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
791 |
} |
792 |
|
793 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
794 |
{ |
795 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
796 |
} |
797 |
|
798 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
799 |
{ |
800 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
801 |
} |
802 |
|
803 |
#else
|
804 |
|
805 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
806 |
{ |
807 |
if (GET_TCGV(ret) != GET_TCGV(arg))
|
808 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
809 |
} |
810 |
|
811 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
812 |
{ |
813 |
tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
814 |
} |
815 |
|
816 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
817 |
tcg_target_long offset) |
818 |
{ |
819 |
tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
820 |
} |
821 |
|
822 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
823 |
tcg_target_long offset) |
824 |
{ |
825 |
tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
826 |
} |
827 |
|
828 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
829 |
tcg_target_long offset) |
830 |
{ |
831 |
tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
832 |
} |
833 |
|
834 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
835 |
tcg_target_long offset) |
836 |
{ |
837 |
tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
838 |
} |
839 |
|
840 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
841 |
tcg_target_long offset) |
842 |
{ |
843 |
tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
844 |
} |
845 |
|
846 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
847 |
tcg_target_long offset) |
848 |
{ |
849 |
tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
850 |
} |
851 |
|
852 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
853 |
{ |
854 |
tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
855 |
} |
856 |
|
857 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
858 |
tcg_target_long offset) |
859 |
{ |
860 |
tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
861 |
} |
862 |
|
863 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
864 |
tcg_target_long offset) |
865 |
{ |
866 |
tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
867 |
} |
868 |
|
869 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
870 |
tcg_target_long offset) |
871 |
{ |
872 |
tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
873 |
} |
874 |
|
875 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
876 |
{ |
877 |
tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
878 |
} |
879 |
|
880 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
881 |
{ |
882 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
883 |
} |
884 |
|
885 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
886 |
{ |
887 |
TCGv t0 = tcg_const_i64(arg2); |
888 |
tcg_gen_add_i64(ret, arg1, t0); |
889 |
tcg_temp_free(t0); |
890 |
} |
891 |
|
892 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
893 |
{ |
894 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
895 |
} |
896 |
|
897 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
898 |
{ |
899 |
TCGv t0 = tcg_const_i64(arg2); |
900 |
tcg_gen_sub_i64(ret, arg1, t0); |
901 |
tcg_temp_free(t0); |
902 |
} |
903 |
|
904 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
905 |
{ |
906 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
907 |
} |
908 |
|
909 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
910 |
{ |
911 |
TCGv t0 = tcg_const_i64(arg2); |
912 |
tcg_gen_and_i64(ret, arg1, t0); |
913 |
tcg_temp_free(t0); |
914 |
} |
915 |
|
916 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
917 |
{ |
918 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
919 |
} |
920 |
|
921 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
922 |
{ |
923 |
TCGv t0 = tcg_const_i64(arg2); |
924 |
tcg_gen_or_i64(ret, arg1, t0); |
925 |
tcg_temp_free(t0); |
926 |
} |
927 |
|
928 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
929 |
{ |
930 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
931 |
} |
932 |
|
933 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
934 |
{ |
935 |
TCGv t0 = tcg_const_i64(arg2); |
936 |
tcg_gen_xor_i64(ret, arg1, t0); |
937 |
tcg_temp_free(t0); |
938 |
} |
939 |
|
940 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
941 |
{ |
942 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
943 |
} |
944 |
|
945 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
946 |
{ |
947 |
if (arg2 == 0) { |
948 |
tcg_gen_mov_i64(ret, arg1); |
949 |
} else {
|
950 |
TCGv t0 = tcg_const_i64(arg2); |
951 |
tcg_gen_shl_i64(ret, arg1, t0); |
952 |
tcg_temp_free(t0); |
953 |
} |
954 |
} |
955 |
|
956 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
957 |
{ |
958 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
959 |
} |
960 |
|
961 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
962 |
{ |
963 |
if (arg2 == 0) { |
964 |
tcg_gen_mov_i64(ret, arg1); |
965 |
} else {
|
966 |
TCGv t0 = tcg_const_i64(arg2); |
967 |
tcg_gen_shr_i64(ret, arg1, t0); |
968 |
tcg_temp_free(t0); |
969 |
} |
970 |
} |
971 |
|
972 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
973 |
{ |
974 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
975 |
} |
976 |
|
977 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
978 |
{ |
979 |
if (arg2 == 0) { |
980 |
tcg_gen_mov_i64(ret, arg1); |
981 |
} else {
|
982 |
TCGv t0 = tcg_const_i64(arg2); |
983 |
tcg_gen_sar_i64(ret, arg1, t0); |
984 |
tcg_temp_free(t0); |
985 |
} |
986 |
} |
987 |
|
988 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
989 |
int label_index)
|
990 |
{ |
991 |
tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
992 |
} |
993 |
|
994 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
995 |
{ |
996 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
997 |
} |
998 |
|
999 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
1000 |
{ |
1001 |
TCGv t0 = tcg_const_i64(arg2); |
1002 |
tcg_gen_mul_i64(ret, arg1, t0); |
1003 |
tcg_temp_free(t0); |
1004 |
} |
1005 |
|
1006 |
#ifdef TCG_TARGET_HAS_div_i64
|
1007 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1008 |
{ |
1009 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
1010 |
} |
1011 |
|
1012 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1013 |
{ |
1014 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
1015 |
} |
1016 |
|
1017 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1018 |
{ |
1019 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
1020 |
} |
1021 |
|
1022 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1023 |
{ |
1024 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
1025 |
} |
1026 |
#else
|
1027 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1028 |
{ |
1029 |
TCGv t0; |
1030 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1031 |
tcg_gen_sari_i64(t0, arg1, 63);
|
1032 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
1033 |
tcg_temp_free(t0); |
1034 |
} |
1035 |
|
1036 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1037 |
{ |
1038 |
TCGv t0; |
1039 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1040 |
tcg_gen_sari_i64(t0, arg1, 63);
|
1041 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
1042 |
tcg_temp_free(t0); |
1043 |
} |
1044 |
|
1045 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1046 |
{ |
1047 |
TCGv t0; |
1048 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1049 |
tcg_gen_movi_i64(t0, 0);
|
1050 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
1051 |
tcg_temp_free(t0); |
1052 |
} |
1053 |
|
1054 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1055 |
{ |
1056 |
TCGv t0; |
1057 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1058 |
tcg_gen_movi_i64(t0, 0);
|
1059 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
1060 |
tcg_temp_free(t0); |
1061 |
} |
1062 |
#endif
|
1063 |
|
1064 |
#endif
|
1065 |
|
1066 |
/***************************************/
|
1067 |
/* optional operations */
|
1068 |
|
1069 |
static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
1070 |
{ |
1071 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
1072 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
1073 |
#else
|
1074 |
tcg_gen_shli_i32(ret, arg, 24);
|
1075 |
tcg_gen_sari_i32(ret, ret, 24);
|
1076 |
#endif
|
1077 |
} |
1078 |
|
1079 |
static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
1080 |
{ |
1081 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
1082 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
1083 |
#else
|
1084 |
tcg_gen_shli_i32(ret, arg, 16);
|
1085 |
tcg_gen_sari_i32(ret, ret, 16);
|
1086 |
#endif
|
1087 |
} |
1088 |
|
1089 |
/* These are currently just for convenience.
|
1090 |
We assume a target will recognise these automatically . */
|
1091 |
static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) |
1092 |
{ |
1093 |
tcg_gen_andi_i32(ret, arg, 0xffu);
|
1094 |
} |
1095 |
|
1096 |
static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) |
1097 |
{ |
1098 |
tcg_gen_andi_i32(ret, arg, 0xffffu);
|
1099 |
} |
1100 |
|
1101 |
/* Note: we assume the two high bytes are set to zero */
|
1102 |
static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
1103 |
{ |
1104 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
1105 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
1106 |
#else
|
1107 |
TCGv t0, t1; |
1108 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1109 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1110 |
|
1111 |
tcg_gen_shri_i32(t0, arg, 8);
|
1112 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
1113 |
tcg_gen_shli_i32(t1, t1, 8);
|
1114 |
tcg_gen_or_i32(ret, t0, t1); |
1115 |
tcg_temp_free(t0); |
1116 |
tcg_temp_free(t1); |
1117 |
#endif
|
1118 |
} |
1119 |
|
1120 |
static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
1121 |
{ |
1122 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
1123 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
1124 |
#else
|
1125 |
TCGv t0, t1; |
1126 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1127 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1128 |
|
1129 |
tcg_gen_shli_i32(t0, arg, 24);
|
1130 |
|
1131 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
1132 |
tcg_gen_shli_i32(t1, t1, 8);
|
1133 |
tcg_gen_or_i32(t0, t0, t1); |
1134 |
|
1135 |
tcg_gen_shri_i32(t1, arg, 8);
|
1136 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
1137 |
tcg_gen_or_i32(t0, t0, t1); |
1138 |
|
1139 |
tcg_gen_shri_i32(t1, arg, 24);
|
1140 |
tcg_gen_or_i32(ret, t0, t1); |
1141 |
tcg_temp_free(t0); |
1142 |
tcg_temp_free(t1); |
1143 |
#endif
|
1144 |
} |
1145 |
|
1146 |
#if TCG_TARGET_REG_BITS == 32 |
1147 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1148 |
{ |
1149 |
tcg_gen_ext8s_i32(ret, arg); |
1150 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1151 |
} |
1152 |
|
1153 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1154 |
{ |
1155 |
tcg_gen_ext16s_i32(ret, arg); |
1156 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1157 |
} |
1158 |
|
1159 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1160 |
{ |
1161 |
tcg_gen_mov_i32(ret, arg); |
1162 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1163 |
} |
1164 |
|
1165 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1166 |
{ |
1167 |
tcg_gen_ext8u_i32(ret, arg); |
1168 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1169 |
} |
1170 |
|
1171 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1172 |
{ |
1173 |
tcg_gen_ext16u_i32(ret, arg); |
1174 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1175 |
} |
1176 |
|
1177 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1178 |
{ |
1179 |
tcg_gen_mov_i32(ret, arg); |
1180 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1181 |
} |
1182 |
|
1183 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1184 |
{ |
1185 |
tcg_gen_mov_i32(ret, arg); |
1186 |
} |
1187 |
|
1188 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1189 |
{ |
1190 |
tcg_gen_mov_i32(ret, arg); |
1191 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1192 |
} |
1193 |
|
1194 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1195 |
{ |
1196 |
tcg_gen_mov_i32(ret, arg); |
1197 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1198 |
} |
1199 |
|
1200 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1201 |
{ |
1202 |
TCGv t0, t1; |
1203 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1204 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1205 |
|
1206 |
tcg_gen_bswap_i32(t0, arg); |
1207 |
tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
1208 |
tcg_gen_mov_i32(ret, t1); |
1209 |
tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
1210 |
tcg_temp_free(t0); |
1211 |
tcg_temp_free(t1); |
1212 |
} |
1213 |
#else
|
1214 |
|
1215 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1216 |
{ |
1217 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
1218 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
1219 |
#else
|
1220 |
tcg_gen_shli_i64(ret, arg, 56);
|
1221 |
tcg_gen_sari_i64(ret, ret, 56);
|
1222 |
#endif
|
1223 |
} |
1224 |
|
1225 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1226 |
{ |
1227 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
1228 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
1229 |
#else
|
1230 |
tcg_gen_shli_i64(ret, arg, 48);
|
1231 |
tcg_gen_sari_i64(ret, ret, 48);
|
1232 |
#endif
|
1233 |
} |
1234 |
|
1235 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1236 |
{ |
1237 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
1238 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
1239 |
#else
|
1240 |
tcg_gen_shli_i64(ret, arg, 32);
|
1241 |
tcg_gen_sari_i64(ret, ret, 32);
|
1242 |
#endif
|
1243 |
} |
1244 |
|
1245 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1246 |
{ |
1247 |
tcg_gen_andi_i64(ret, arg, 0xffu);
|
1248 |
} |
1249 |
|
1250 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1251 |
{ |
1252 |
tcg_gen_andi_i64(ret, arg, 0xffffu);
|
1253 |
} |
1254 |
|
1255 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1256 |
{ |
1257 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1258 |
} |
1259 |
|
1260 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1261 |
registers. This will probably break MIPS64 targets. */
|
1262 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1263 |
{ |
1264 |
tcg_gen_mov_i32(ret, arg); |
1265 |
} |
1266 |
|
1267 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1268 |
registers */
|
1269 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1270 |
{ |
1271 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1272 |
} |
1273 |
|
1274 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1275 |
registers */
|
1276 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1277 |
{ |
1278 |
tcg_gen_ext32s_i64(ret, arg); |
1279 |
} |
1280 |
|
1281 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1282 |
{ |
1283 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
1284 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
1285 |
#else
|
1286 |
TCGv t0, t1; |
1287 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1288 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1289 |
|
1290 |
tcg_gen_shli_i64(t0, arg, 56);
|
1291 |
|
1292 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
1293 |
tcg_gen_shli_i64(t1, t1, 40);
|
1294 |
tcg_gen_or_i64(t0, t0, t1); |
1295 |
|
1296 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
1297 |
tcg_gen_shli_i64(t1, t1, 24);
|
1298 |
tcg_gen_or_i64(t0, t0, t1); |
1299 |
|
1300 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
1301 |
tcg_gen_shli_i64(t1, t1, 8);
|
1302 |
tcg_gen_or_i64(t0, t0, t1); |
1303 |
|
1304 |
tcg_gen_shri_i64(t1, arg, 8);
|
1305 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
1306 |
tcg_gen_or_i64(t0, t0, t1); |
1307 |
|
1308 |
tcg_gen_shri_i64(t1, arg, 24);
|
1309 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
1310 |
tcg_gen_or_i64(t0, t0, t1); |
1311 |
|
1312 |
tcg_gen_shri_i64(t1, arg, 40);
|
1313 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
1314 |
tcg_gen_or_i64(t0, t0, t1); |
1315 |
|
1316 |
tcg_gen_shri_i64(t1, arg, 56);
|
1317 |
tcg_gen_or_i64(ret, t0, t1); |
1318 |
tcg_temp_free(t0); |
1319 |
tcg_temp_free(t1); |
1320 |
#endif
|
1321 |
} |
1322 |
|
1323 |
#endif
|
1324 |
|
1325 |
static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
1326 |
{ |
1327 |
#ifdef TCG_TARGET_HAS_neg_i32
|
1328 |
tcg_gen_op2(INDEX_op_neg_i32, ret, arg); |
1329 |
#else
|
1330 |
TCGv t0 = tcg_const_i32(0);
|
1331 |
tcg_gen_sub_i32(ret, t0, arg); |
1332 |
tcg_temp_free(t0); |
1333 |
#endif
|
1334 |
} |
1335 |
|
1336 |
static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) |
1337 |
{ |
1338 |
#ifdef TCG_TARGET_HAS_neg_i64
|
1339 |
tcg_gen_op2(INDEX_op_neg_i64, ret, arg); |
1340 |
#else
|
1341 |
TCGv t0 = tcg_const_i64(0);
|
1342 |
tcg_gen_sub_i64(ret, t0, arg); |
1343 |
tcg_temp_free(t0); |
1344 |
#endif
|
1345 |
} |
1346 |
|
1347 |
static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
1348 |
{ |
1349 |
tcg_gen_xori_i32(ret, arg, -1);
|
1350 |
} |
1351 |
|
1352 |
static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) |
1353 |
{ |
1354 |
tcg_gen_xori_i64(ret, arg, -1);
|
1355 |
} |
1356 |
|
1357 |
static inline void tcg_gen_discard_i32(TCGv arg) |
1358 |
{ |
1359 |
tcg_gen_op1(INDEX_op_discard, arg); |
1360 |
} |
1361 |
|
1362 |
#if TCG_TARGET_REG_BITS == 32 |
1363 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1364 |
{ |
1365 |
tcg_gen_discard_i32(arg); |
1366 |
tcg_gen_discard_i32(TCGV_HIGH(arg)); |
1367 |
} |
1368 |
#else
|
1369 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1370 |
{ |
1371 |
tcg_gen_op1(INDEX_op_discard, arg); |
1372 |
} |
1373 |
#endif
|
1374 |
|
1375 |
/***************************************/
|
1376 |
static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
1377 |
{ |
1378 |
tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
1379 |
} |
1380 |
|
1381 |
/***************************************/
|
1382 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
1383 |
type. */
|
1384 |
#ifndef TARGET_LONG_BITS
|
1385 |
#error must include QEMU headers
|
1386 |
#endif
|
1387 |
|
1388 |
/* debug info: write the PC of the corresponding QEMU CPU instruction */
|
1389 |
static inline void tcg_gen_debug_insn_start(uint64_t pc) |
1390 |
{ |
1391 |
/* XXX: must really use a 32 bit size for TCGArg in all cases */
|
1392 |
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
|
1393 |
tcg_gen_op2i(INDEX_op_debug_insn_start, |
1394 |
(uint32_t)(pc), (uint32_t)(pc >> 32));
|
1395 |
#else
|
1396 |
tcg_gen_op1i(INDEX_op_debug_insn_start, pc); |
1397 |
#endif
|
1398 |
} |
1399 |
|
1400 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
1401 |
{ |
1402 |
tcg_gen_op1i(INDEX_op_exit_tb, val); |
1403 |
} |
1404 |
|
1405 |
static inline void tcg_gen_goto_tb(int idx) |
1406 |
{ |
1407 |
tcg_gen_op1i(INDEX_op_goto_tb, idx); |
1408 |
} |
1409 |
|
1410 |
#if TCG_TARGET_REG_BITS == 32 |
1411 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1412 |
{ |
1413 |
#if TARGET_LONG_BITS == 32 |
1414 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1415 |
#else
|
1416 |
tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1417 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1418 |
#endif
|
1419 |
} |
1420 |
|
1421 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1422 |
{ |
1423 |
#if TARGET_LONG_BITS == 32 |
1424 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1425 |
#else
|
1426 |
tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
1427 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1428 |
#endif
|
1429 |
} |
1430 |
|
1431 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1432 |
{ |
1433 |
#if TARGET_LONG_BITS == 32 |
1434 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1435 |
#else
|
1436 |
tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1437 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1438 |
#endif
|
1439 |
} |
1440 |
|
1441 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1442 |
{ |
1443 |
#if TARGET_LONG_BITS == 32 |
1444 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1445 |
#else
|
1446 |
tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
1447 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1448 |
#endif
|
1449 |
} |
1450 |
|
1451 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1452 |
{ |
1453 |
#if TARGET_LONG_BITS == 32 |
1454 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1455 |
#else
|
1456 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1457 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1458 |
#endif
|
1459 |
} |
1460 |
|
1461 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1462 |
{ |
1463 |
#if TARGET_LONG_BITS == 32 |
1464 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1465 |
#else
|
1466 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1467 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1468 |
#endif
|
1469 |
} |
1470 |
|
1471 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1472 |
{ |
1473 |
#if TARGET_LONG_BITS == 32 |
1474 |
tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
1475 |
#else
|
1476 |
tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1477 |
addr, TCGV_HIGH(addr), mem_index); |
1478 |
#endif
|
1479 |
} |
1480 |
|
1481 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1482 |
{ |
1483 |
#if TARGET_LONG_BITS == 32 |
1484 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1485 |
#else
|
1486 |
tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
1487 |
#endif
|
1488 |
} |
1489 |
|
1490 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1491 |
{ |
1492 |
#if TARGET_LONG_BITS == 32 |
1493 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1494 |
#else
|
1495 |
tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
1496 |
#endif
|
1497 |
} |
1498 |
|
1499 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1500 |
{ |
1501 |
#if TARGET_LONG_BITS == 32 |
1502 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1503 |
#else
|
1504 |
tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
1505 |
#endif
|
1506 |
} |
1507 |
|
1508 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1509 |
{ |
1510 |
#if TARGET_LONG_BITS == 32 |
1511 |
tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
1512 |
#else
|
1513 |
tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1514 |
addr, TCGV_HIGH(addr), mem_index); |
1515 |
#endif
|
1516 |
} |
1517 |
|
1518 |
#define tcg_gen_ld_ptr tcg_gen_ld_i32
|
1519 |
#define tcg_gen_discard_ptr tcg_gen_discard_i32
|
1520 |
|
1521 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1522 |
|
1523 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1524 |
{ |
1525 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1526 |
} |
1527 |
|
1528 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1529 |
{ |
1530 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1531 |
} |
1532 |
|
1533 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1534 |
{ |
1535 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1536 |
} |
1537 |
|
1538 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1539 |
{ |
1540 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1541 |
} |
1542 |
|
1543 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1544 |
{ |
1545 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1546 |
} |
1547 |
|
1548 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1549 |
{ |
1550 |
tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
1551 |
} |
1552 |
|
1553 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1554 |
{ |
1555 |
tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
1556 |
} |
1557 |
|
1558 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1559 |
{ |
1560 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1561 |
} |
1562 |
|
1563 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1564 |
{ |
1565 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1566 |
} |
1567 |
|
1568 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1569 |
{ |
1570 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1571 |
} |
1572 |
|
1573 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1574 |
{ |
1575 |
tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
1576 |
} |
1577 |
|
1578 |
#define tcg_gen_ld_ptr tcg_gen_ld_i64
|
1579 |
#define tcg_gen_discard_ptr tcg_gen_discard_i64
|
1580 |
|
1581 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1582 |
|
1583 |
#if TARGET_LONG_BITS == 64 |
1584 |
#define TCG_TYPE_TL TCG_TYPE_I64
|
1585 |
#define tcg_gen_movi_tl tcg_gen_movi_i64
|
1586 |
#define tcg_gen_mov_tl tcg_gen_mov_i64
|
1587 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
|
1588 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
|
1589 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
|
1590 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
|
1591 |
#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
|
1592 |
#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
|
1593 |
#define tcg_gen_ld_tl tcg_gen_ld_i64
|
1594 |
#define tcg_gen_st8_tl tcg_gen_st8_i64
|
1595 |
#define tcg_gen_st16_tl tcg_gen_st16_i64
|
1596 |
#define tcg_gen_st32_tl tcg_gen_st32_i64
|
1597 |
#define tcg_gen_st_tl tcg_gen_st_i64
|
1598 |
#define tcg_gen_add_tl tcg_gen_add_i64
|
1599 |
#define tcg_gen_addi_tl tcg_gen_addi_i64
|
1600 |
#define tcg_gen_sub_tl tcg_gen_sub_i64
|
1601 |
#define tcg_gen_neg_tl tcg_gen_neg_i64
|
1602 |
#define tcg_gen_subi_tl tcg_gen_subi_i64
|
1603 |
#define tcg_gen_and_tl tcg_gen_and_i64
|
1604 |
#define tcg_gen_andi_tl tcg_gen_andi_i64
|
1605 |
#define tcg_gen_or_tl tcg_gen_or_i64
|
1606 |
#define tcg_gen_ori_tl tcg_gen_ori_i64
|
1607 |
#define tcg_gen_xor_tl tcg_gen_xor_i64
|
1608 |
#define tcg_gen_xori_tl tcg_gen_xori_i64
|
1609 |
#define tcg_gen_not_tl tcg_gen_not_i64
|
1610 |
#define tcg_gen_shl_tl tcg_gen_shl_i64
|
1611 |
#define tcg_gen_shli_tl tcg_gen_shli_i64
|
1612 |
#define tcg_gen_shr_tl tcg_gen_shr_i64
|
1613 |
#define tcg_gen_shri_tl tcg_gen_shri_i64
|
1614 |
#define tcg_gen_sar_tl tcg_gen_sar_i64
|
1615 |
#define tcg_gen_sari_tl tcg_gen_sari_i64
|
1616 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
|
1617 |
#define tcg_gen_mul_tl tcg_gen_mul_i64
|
1618 |
#define tcg_gen_muli_tl tcg_gen_muli_i64
|
1619 |
#define tcg_gen_discard_tl tcg_gen_discard_i64
|
1620 |
#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
|
1621 |
#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
|
1622 |
#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
|
1623 |
#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
|
1624 |
#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
|
1625 |
#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
|
1626 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
|
1627 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
|
1628 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
|
1629 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
|
1630 |
#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
|
1631 |
#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
|
1632 |
#define tcg_const_tl tcg_const_i64
|
1633 |
#else
|
1634 |
#define TCG_TYPE_TL TCG_TYPE_I32
|
1635 |
#define tcg_gen_movi_tl tcg_gen_movi_i32
|
1636 |
#define tcg_gen_mov_tl tcg_gen_mov_i32
|
1637 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
|
1638 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
|
1639 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
|
1640 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
|
1641 |
#define tcg_gen_ld32u_tl tcg_gen_ld_i32
|
1642 |
#define tcg_gen_ld32s_tl tcg_gen_ld_i32
|
1643 |
#define tcg_gen_ld_tl tcg_gen_ld_i32
|
1644 |
#define tcg_gen_st8_tl tcg_gen_st8_i32
|
1645 |
#define tcg_gen_st16_tl tcg_gen_st16_i32
|
1646 |
#define tcg_gen_st32_tl tcg_gen_st_i32
|
1647 |
#define tcg_gen_st_tl tcg_gen_st_i32
|
1648 |
#define tcg_gen_add_tl tcg_gen_add_i32
|
1649 |
#define tcg_gen_addi_tl tcg_gen_addi_i32
|
1650 |
#define tcg_gen_sub_tl tcg_gen_sub_i32
|
1651 |
#define tcg_gen_neg_tl tcg_gen_neg_i32
|
1652 |
#define tcg_gen_subi_tl tcg_gen_subi_i32
|
1653 |
#define tcg_gen_and_tl tcg_gen_and_i32
|
1654 |
#define tcg_gen_andi_tl tcg_gen_andi_i32
|
1655 |
#define tcg_gen_or_tl tcg_gen_or_i32
|
1656 |
#define tcg_gen_ori_tl tcg_gen_ori_i32
|
1657 |
#define tcg_gen_xor_tl tcg_gen_xor_i32
|
1658 |
#define tcg_gen_xori_tl tcg_gen_xori_i32
|
1659 |
#define tcg_gen_not_tl tcg_gen_not_i32
|
1660 |
#define tcg_gen_shl_tl tcg_gen_shl_i32
|
1661 |
#define tcg_gen_shli_tl tcg_gen_shli_i32
|
1662 |
#define tcg_gen_shr_tl tcg_gen_shr_i32
|
1663 |
#define tcg_gen_shri_tl tcg_gen_shri_i32
|
1664 |
#define tcg_gen_sar_tl tcg_gen_sar_i32
|
1665 |
#define tcg_gen_sari_tl tcg_gen_sari_i32
|
1666 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
|
1667 |
#define tcg_gen_mul_tl tcg_gen_mul_i32
|
1668 |
#define tcg_gen_muli_tl tcg_gen_muli_i32
|
1669 |
#define tcg_gen_discard_tl tcg_gen_discard_i32
|
1670 |
#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
|
1671 |
#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
|
1672 |
#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
|
1673 |
#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
|
1674 |
#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
|
1675 |
#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
|
1676 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
|
1677 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
|
1678 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
|
1679 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
|
1680 |
#define tcg_gen_ext32u_tl tcg_gen_mov_i32
|
1681 |
#define tcg_gen_ext32s_tl tcg_gen_mov_i32
|
1682 |
#define tcg_const_tl tcg_const_i32
|
1683 |
#endif
|
1684 |
|
1685 |
#if TCG_TARGET_REG_BITS == 32 |
1686 |
#define tcg_gen_add_ptr tcg_gen_add_i32
|
1687 |
#define tcg_gen_addi_ptr tcg_gen_addi_i32
|
1688 |
#define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
|
1689 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1690 |
#define tcg_gen_add_ptr tcg_gen_add_i64
|
1691 |
#define tcg_gen_addi_ptr tcg_gen_addi_i64
|
1692 |
#define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
|
1693 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1694 |
|