Revision e8ee28fb
| b/hw/parallel.c | ||
|---|---|---|
| 80 | 80 |
|
| 81 | 81 |
typedef struct ISAParallelState {
|
| 82 | 82 |
ISADevice dev; |
| 83 |
uint32_t index; |
|
| 83 | 84 |
uint32_t iobase; |
| 84 | 85 |
uint32_t isairq; |
| 85 | 86 |
ParallelState state; |
| ... | ... | |
| 445 | 446 |
s->last_read_offset = ~0U; |
| 446 | 447 |
} |
| 447 | 448 |
|
| 449 |
static const int isa_parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
|
|
| 450 |
|
|
| 448 | 451 |
static int parallel_isa_initfn(ISADevice *dev) |
| 449 | 452 |
{
|
| 453 |
static int index; |
|
| 450 | 454 |
ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev); |
| 451 | 455 |
ParallelState *s = &isa->state; |
| 452 |
int base = isa->iobase;
|
|
| 456 |
int base; |
|
| 453 | 457 |
uint8_t dummy; |
| 454 | 458 |
|
| 455 | 459 |
if (!s->chr) {
|
| ... | ... | |
| 457 | 461 |
exit(1); |
| 458 | 462 |
} |
| 459 | 463 |
|
| 464 |
if (isa->index == -1) |
|
| 465 |
isa->index = index; |
|
| 466 |
if (isa->index >= MAX_PARALLEL_PORTS) |
|
| 467 |
return -1; |
|
| 468 |
if (isa->iobase == -1) |
|
| 469 |
isa->iobase = isa_parallel_io[isa->index]; |
|
| 470 |
index++; |
|
| 471 |
|
|
| 472 |
base = isa->iobase; |
|
| 460 | 473 |
isa_init_irq(dev, &s->irq, isa->isairq); |
| 461 | 474 |
parallel_reset(s); |
| 462 | 475 |
qemu_register_reset(parallel_reset, s); |
| ... | ... | |
| 483 | 496 |
return 0; |
| 484 | 497 |
} |
| 485 | 498 |
|
| 486 |
static const int isa_parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
|
|
| 487 |
|
|
| 488 | 499 |
ParallelState *parallel_init(int index, CharDriverState *chr) |
| 489 | 500 |
{
|
| 490 | 501 |
ISADevice *dev; |
| 491 | 502 |
|
| 492 | 503 |
dev = isa_create("isa-parallel");
|
| 493 |
qdev_prop_set_uint32(&dev->qdev, "iobase", isa_parallel_io[index]); |
|
| 494 |
qdev_prop_set_uint32(&dev->qdev, "irq", 7); |
|
| 504 |
qdev_prop_set_uint32(&dev->qdev, "index", index); |
|
| 495 | 505 |
qdev_prop_set_chr(&dev->qdev, "chardev", chr); |
| 496 | 506 |
if (qdev_init(&dev->qdev) < 0) |
| 497 | 507 |
return NULL; |
| ... | ... | |
| 579 | 589 |
.qdev.size = sizeof(ISAParallelState), |
| 580 | 590 |
.init = parallel_isa_initfn, |
| 581 | 591 |
.qdev.props = (Property[]) {
|
| 582 |
DEFINE_PROP_HEX32("iobase", ISAParallelState, iobase, 0x378),
|
|
| 592 |
DEFINE_PROP_HEX32("index", ISAParallelState, index, -1),
|
|
| 593 |
DEFINE_PROP_HEX32("iobase", ISAParallelState, iobase, -1),
|
|
| 583 | 594 |
DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7),
|
| 584 | 595 |
DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr),
|
| 585 | 596 |
DEFINE_PROP_END_OF_LIST(), |
| b/hw/serial.c | ||
|---|---|---|
| 148 | 148 |
|
| 149 | 149 |
typedef struct ISASerialState {
|
| 150 | 150 |
ISADevice dev; |
| 151 |
uint32_t index; |
|
| 151 | 152 |
uint32_t iobase; |
| 152 | 153 |
uint32_t isairq; |
| 153 | 154 |
SerialState state; |
| ... | ... | |
| 733 | 734 |
serial_event, s); |
| 734 | 735 |
} |
| 735 | 736 |
|
| 737 |
static const int isa_serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
|
|
| 738 |
static const int isa_serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
|
|
| 739 |
|
|
| 736 | 740 |
static int serial_isa_initfn(ISADevice *dev) |
| 737 | 741 |
{
|
| 742 |
static int index; |
|
| 738 | 743 |
ISASerialState *isa = DO_UPCAST(ISASerialState, dev, dev); |
| 739 | 744 |
SerialState *s = &isa->state; |
| 740 | 745 |
|
| 746 |
if (isa->index == -1) |
|
| 747 |
isa->index = index; |
|
| 748 |
if (isa->index >= MAX_SERIAL_PORTS) |
|
| 749 |
return -1; |
|
| 750 |
if (isa->iobase == -1) |
|
| 751 |
isa->iobase = isa_serial_io[isa->index]; |
|
| 752 |
if (isa->isairq == -1) |
|
| 753 |
isa->isairq = isa_serial_irq[isa->index]; |
|
| 754 |
index++; |
|
| 755 |
|
|
| 741 | 756 |
s->baudbase = 115200; |
| 742 | 757 |
isa_init_irq(dev, &s->irq, isa->isairq); |
| 743 | 758 |
serial_init_core(s); |
| ... | ... | |
| 748 | 763 |
return 0; |
| 749 | 764 |
} |
| 750 | 765 |
|
| 751 |
static const int isa_serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
|
|
| 752 |
static const int isa_serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
|
|
| 753 |
|
|
| 754 | 766 |
SerialState *serial_isa_init(int index, CharDriverState *chr) |
| 755 | 767 |
{
|
| 756 | 768 |
ISADevice *dev; |
| 757 | 769 |
|
| 758 | 770 |
dev = isa_create("isa-serial");
|
| 759 |
qdev_prop_set_uint32(&dev->qdev, "iobase", isa_serial_io[index]); |
|
| 760 |
qdev_prop_set_uint32(&dev->qdev, "irq", isa_serial_irq[index]); |
|
| 771 |
qdev_prop_set_uint32(&dev->qdev, "index", index); |
|
| 761 | 772 |
qdev_prop_set_chr(&dev->qdev, "chardev", chr); |
| 762 | 773 |
if (qdev_init(&dev->qdev) < 0) |
| 763 | 774 |
return NULL; |
| ... | ... | |
| 886 | 897 |
.qdev.size = sizeof(ISASerialState), |
| 887 | 898 |
.init = serial_isa_initfn, |
| 888 | 899 |
.qdev.props = (Property[]) {
|
| 889 |
DEFINE_PROP_HEX32("iobase", ISASerialState, iobase, 0x3f8),
|
|
| 890 |
DEFINE_PROP_UINT32("irq", ISASerialState, isairq, 4),
|
|
| 900 |
DEFINE_PROP_HEX32("index", ISASerialState, index, -1),
|
|
| 901 |
DEFINE_PROP_HEX32("iobase", ISASerialState, iobase, -1),
|
|
| 902 |
DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),
|
|
| 891 | 903 |
DEFINE_PROP_CHR("chardev", ISASerialState, state.chr),
|
| 892 | 904 |
DEFINE_PROP_END_OF_LIST(), |
| 893 | 905 |
}, |
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