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1 | b92e5a22 | bellard | /*
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2 | b92e5a22 | bellard | * Software MMU support
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3 | b92e5a22 | bellard | *
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4 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | b92e5a22 | bellard | *
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6 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
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7 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
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9 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | b92e5a22 | bellard | *
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11 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
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12 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | b92e5a22 | bellard | * Lesser General Public License for more details.
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15 | b92e5a22 | bellard | *
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16 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | b92e5a22 | bellard | * License along with this library; if not, write to the Free Software
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18 | b92e5a22 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | b92e5a22 | bellard | */
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20 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
21 | b92e5a22 | bellard | #define SUFFIX q
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22 | 61382a50 | bellard | #define USUFFIX q
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23 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
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24 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
25 | b92e5a22 | bellard | #define SUFFIX l
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26 | 61382a50 | bellard | #define USUFFIX l
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27 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
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28 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
29 | b92e5a22 | bellard | #define SUFFIX w
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30 | 61382a50 | bellard | #define USUFFIX uw
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31 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
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32 | b92e5a22 | bellard | #define DATA_STYPE int16_t
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33 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
34 | b92e5a22 | bellard | #define SUFFIX b
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35 | 61382a50 | bellard | #define USUFFIX ub
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36 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
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37 | b92e5a22 | bellard | #define DATA_STYPE int8_t
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38 | b92e5a22 | bellard | #else
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39 | b92e5a22 | bellard | #error unsupported data size
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40 | b92e5a22 | bellard | #endif
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41 | b92e5a22 | bellard | |
42 | 61382a50 | bellard | #if ACCESS_TYPE == 0 |
43 | 61382a50 | bellard | |
44 | 61382a50 | bellard | #define CPU_MEM_INDEX 0 |
45 | 61382a50 | bellard | #define MMUSUFFIX _mmu
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46 | 61382a50 | bellard | |
47 | 61382a50 | bellard | #elif ACCESS_TYPE == 1 |
48 | 61382a50 | bellard | |
49 | 61382a50 | bellard | #define CPU_MEM_INDEX 1 |
50 | 61382a50 | bellard | #define MMUSUFFIX _mmu
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51 | 61382a50 | bellard | |
52 | 61382a50 | bellard | #elif ACCESS_TYPE == 2 |
53 | 61382a50 | bellard | |
54 | 2d603d22 | bellard | #ifdef TARGET_I386
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55 | 61382a50 | bellard | #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
56 | 2d603d22 | bellard | #elif defined (TARGET_PPC)
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57 | 2d603d22 | bellard | #define CPU_MEM_INDEX (msr_pr)
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58 | 6af0bf9c | bellard | #elif defined (TARGET_MIPS)
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59 | 6af0bf9c | bellard | #define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
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60 | e95c8d51 | bellard | #elif defined (TARGET_SPARC)
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61 | e95c8d51 | bellard | #define CPU_MEM_INDEX ((env->psrs) == 0) |
62 | b5ff1b31 | bellard | #elif defined (TARGET_ARM)
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63 | b5ff1b31 | bellard | #define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
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64 | fdf9b3e8 | bellard | #elif defined (TARGET_SH4)
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65 | fdf9b3e8 | bellard | #define CPU_MEM_INDEX ((env->sr & SR_MD) == 0) |
66 | eddf68a6 | j_mayer | #elif defined (TARGET_ALPHA)
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67 | eddf68a6 | j_mayer | #define CPU_MEM_INDEX ((env->ps >> 3) & 3) |
68 | b5ff1b31 | bellard | #else
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69 | b5ff1b31 | bellard | #error unsupported CPU
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70 | 2d603d22 | bellard | #endif
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71 | 61382a50 | bellard | #define MMUSUFFIX _mmu
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72 | 61382a50 | bellard | |
73 | 61382a50 | bellard | #elif ACCESS_TYPE == 3 |
74 | 61382a50 | bellard | |
75 | 2d603d22 | bellard | #ifdef TARGET_I386
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76 | 61382a50 | bellard | #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
77 | 2d603d22 | bellard | #elif defined (TARGET_PPC)
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78 | 2d603d22 | bellard | #define CPU_MEM_INDEX (msr_pr)
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79 | 6af0bf9c | bellard | #elif defined (TARGET_MIPS)
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80 | 6af0bf9c | bellard | #define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
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81 | e95c8d51 | bellard | #elif defined (TARGET_SPARC)
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82 | e95c8d51 | bellard | #define CPU_MEM_INDEX ((env->psrs) == 0) |
83 | b5ff1b31 | bellard | #elif defined (TARGET_ARM)
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84 | b5ff1b31 | bellard | #define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
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85 | fdf9b3e8 | bellard | #elif defined (TARGET_SH4)
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86 | fdf9b3e8 | bellard | #define CPU_MEM_INDEX ((env->sr & SR_MD) == 0) |
87 | eddf68a6 | j_mayer | #elif defined (TARGET_ALPHA)
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88 | eddf68a6 | j_mayer | #define CPU_MEM_INDEX ((env->ps >> 3) & 3) |
89 | b5ff1b31 | bellard | #else
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90 | b5ff1b31 | bellard | #error unsupported CPU
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91 | 2d603d22 | bellard | #endif
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92 | 61382a50 | bellard | #define MMUSUFFIX _cmmu
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93 | 61382a50 | bellard | |
94 | b92e5a22 | bellard | #else
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95 | 61382a50 | bellard | #error invalid ACCESS_TYPE
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96 | b92e5a22 | bellard | #endif
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97 | b92e5a22 | bellard | |
98 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
99 | b92e5a22 | bellard | #define RES_TYPE uint64_t
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100 | b92e5a22 | bellard | #else
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101 | b92e5a22 | bellard | #define RES_TYPE int |
102 | b92e5a22 | bellard | #endif
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103 | b92e5a22 | bellard | |
104 | 84b7b8e7 | bellard | #if ACCESS_TYPE == 3 |
105 | 84b7b8e7 | bellard | #define ADDR_READ addr_code
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106 | 84b7b8e7 | bellard | #else
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107 | 84b7b8e7 | bellard | #define ADDR_READ addr_read
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108 | 84b7b8e7 | bellard | #endif
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109 | b92e5a22 | bellard | |
110 | c27004ec | bellard | DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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111 | 61382a50 | bellard | int is_user);
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112 | c27004ec | bellard | void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user); |
113 | b92e5a22 | bellard | |
114 | c27004ec | bellard | #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \ |
115 | c27004ec | bellard | (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
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116 | e16c53fa | bellard | |
117 | 84b7b8e7 | bellard | #define CPU_TLB_ENTRY_BITS 4 |
118 | 84b7b8e7 | bellard | |
119 | c27004ec | bellard | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
120 | e16c53fa | bellard | { |
121 | e16c53fa | bellard | int res;
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122 | e16c53fa | bellard | |
123 | e16c53fa | bellard | asm volatile ("movl %1, %%edx\n" |
124 | e16c53fa | bellard | "movl %1, %%eax\n"
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125 | e16c53fa | bellard | "shrl %3, %%edx\n"
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126 | e16c53fa | bellard | "andl %4, %%eax\n"
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127 | e16c53fa | bellard | "andl %2, %%edx\n"
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128 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
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129 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
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130 | e16c53fa | bellard | "movl %1, %%eax\n"
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131 | e16c53fa | bellard | "je 1f\n"
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132 | e16c53fa | bellard | "pushl %6\n"
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133 | e16c53fa | bellard | "call %7\n"
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134 | e16c53fa | bellard | "popl %%edx\n"
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135 | e16c53fa | bellard | "movl %%eax, %0\n"
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136 | e16c53fa | bellard | "jmp 2f\n"
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137 | e16c53fa | bellard | "1:\n"
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138 | 84b7b8e7 | bellard | "addl 12(%%edx), %%eax\n"
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139 | e16c53fa | bellard | #if DATA_SIZE == 1 |
140 | e16c53fa | bellard | "movzbl (%%eax), %0\n"
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141 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
142 | e16c53fa | bellard | "movzwl (%%eax), %0\n"
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143 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
144 | e16c53fa | bellard | "movl (%%eax), %0\n"
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145 | e16c53fa | bellard | #else
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146 | e16c53fa | bellard | #error unsupported size
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147 | e16c53fa | bellard | #endif
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148 | e16c53fa | bellard | "2:\n"
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149 | e16c53fa | bellard | : "=r" (res)
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150 | e16c53fa | bellard | : "r" (ptr),
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151 | 84b7b8e7 | bellard | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
152 | 84b7b8e7 | bellard | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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153 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
154 | 84b7b8e7 | bellard | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)), |
155 | e16c53fa | bellard | "i" (CPU_MEM_INDEX),
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156 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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157 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
158 | e16c53fa | bellard | return res;
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159 | e16c53fa | bellard | } |
160 | e16c53fa | bellard | |
161 | e16c53fa | bellard | #if DATA_SIZE <= 2 |
162 | c27004ec | bellard | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
163 | e16c53fa | bellard | { |
164 | e16c53fa | bellard | int res;
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165 | e16c53fa | bellard | |
166 | e16c53fa | bellard | asm volatile ("movl %1, %%edx\n" |
167 | e16c53fa | bellard | "movl %1, %%eax\n"
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168 | e16c53fa | bellard | "shrl %3, %%edx\n"
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169 | e16c53fa | bellard | "andl %4, %%eax\n"
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170 | e16c53fa | bellard | "andl %2, %%edx\n"
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171 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
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172 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
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173 | e16c53fa | bellard | "movl %1, %%eax\n"
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174 | e16c53fa | bellard | "je 1f\n"
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175 | e16c53fa | bellard | "pushl %6\n"
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176 | e16c53fa | bellard | "call %7\n"
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177 | e16c53fa | bellard | "popl %%edx\n"
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178 | e16c53fa | bellard | #if DATA_SIZE == 1 |
179 | e16c53fa | bellard | "movsbl %%al, %0\n"
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180 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
181 | e16c53fa | bellard | "movswl %%ax, %0\n"
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182 | e16c53fa | bellard | #else
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183 | e16c53fa | bellard | #error unsupported size
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184 | e16c53fa | bellard | #endif
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185 | e16c53fa | bellard | "jmp 2f\n"
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186 | e16c53fa | bellard | "1:\n"
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187 | 84b7b8e7 | bellard | "addl 12(%%edx), %%eax\n"
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188 | e16c53fa | bellard | #if DATA_SIZE == 1 |
189 | e16c53fa | bellard | "movsbl (%%eax), %0\n"
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190 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
191 | e16c53fa | bellard | "movswl (%%eax), %0\n"
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192 | e16c53fa | bellard | #else
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193 | e16c53fa | bellard | #error unsupported size
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194 | e16c53fa | bellard | #endif
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195 | e16c53fa | bellard | "2:\n"
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196 | e16c53fa | bellard | : "=r" (res)
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197 | e16c53fa | bellard | : "r" (ptr),
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198 | 84b7b8e7 | bellard | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
199 | 84b7b8e7 | bellard | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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200 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
201 | 84b7b8e7 | bellard | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)), |
202 | e16c53fa | bellard | "i" (CPU_MEM_INDEX),
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203 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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204 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
205 | e16c53fa | bellard | return res;
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206 | e16c53fa | bellard | } |
207 | e16c53fa | bellard | #endif
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208 | e16c53fa | bellard | |
209 | c27004ec | bellard | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
210 | e16c53fa | bellard | { |
211 | e16c53fa | bellard | asm volatile ("movl %0, %%edx\n" |
212 | e16c53fa | bellard | "movl %0, %%eax\n"
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213 | e16c53fa | bellard | "shrl %3, %%edx\n"
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214 | e16c53fa | bellard | "andl %4, %%eax\n"
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215 | e16c53fa | bellard | "andl %2, %%edx\n"
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216 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
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217 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
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218 | e16c53fa | bellard | "movl %0, %%eax\n"
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219 | e16c53fa | bellard | "je 1f\n"
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220 | e16c53fa | bellard | #if DATA_SIZE == 1 |
221 | e16c53fa | bellard | "movzbl %b1, %%edx\n"
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222 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
223 | e16c53fa | bellard | "movzwl %w1, %%edx\n"
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224 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
225 | e16c53fa | bellard | "movl %1, %%edx\n"
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226 | e16c53fa | bellard | #else
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227 | e16c53fa | bellard | #error unsupported size
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228 | e16c53fa | bellard | #endif
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229 | e16c53fa | bellard | "pushl %6\n"
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230 | e16c53fa | bellard | "call %7\n"
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231 | e16c53fa | bellard | "popl %%eax\n"
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232 | e16c53fa | bellard | "jmp 2f\n"
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233 | e16c53fa | bellard | "1:\n"
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234 | 84b7b8e7 | bellard | "addl 8(%%edx), %%eax\n"
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235 | e16c53fa | bellard | #if DATA_SIZE == 1 |
236 | e16c53fa | bellard | "movb %b1, (%%eax)\n"
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237 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
238 | e16c53fa | bellard | "movw %w1, (%%eax)\n"
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239 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
240 | e16c53fa | bellard | "movl %1, (%%eax)\n"
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241 | e16c53fa | bellard | #else
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242 | e16c53fa | bellard | #error unsupported size
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243 | e16c53fa | bellard | #endif
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244 | e16c53fa | bellard | "2:\n"
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245 | e16c53fa | bellard | : |
246 | e16c53fa | bellard | : "r" (ptr),
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247 | e16c53fa | bellard | /* NOTE: 'q' would be needed as constraint, but we could not use it
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248 | e16c53fa | bellard | with T1 ! */
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249 | e16c53fa | bellard | "r" (v),
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250 | 84b7b8e7 | bellard | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
251 | 84b7b8e7 | bellard | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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252 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
253 | 84b7b8e7 | bellard | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_write)), |
254 | e16c53fa | bellard | "i" (CPU_MEM_INDEX),
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255 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
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256 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
257 | e16c53fa | bellard | } |
258 | e16c53fa | bellard | |
259 | e16c53fa | bellard | #else
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260 | e16c53fa | bellard | |
261 | e16c53fa | bellard | /* generic load/store macros */
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262 | e16c53fa | bellard | |
263 | c27004ec | bellard | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
264 | b92e5a22 | bellard | { |
265 | b92e5a22 | bellard | int index;
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266 | b92e5a22 | bellard | RES_TYPE res; |
267 | c27004ec | bellard | target_ulong addr; |
268 | c27004ec | bellard | unsigned long physaddr; |
269 | 61382a50 | bellard | int is_user;
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270 | 61382a50 | bellard | |
271 | c27004ec | bellard | addr = ptr; |
272 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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273 | 61382a50 | bellard | is_user = CPU_MEM_INDEX; |
274 | 84b7b8e7 | bellard | if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
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275 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
276 | 61382a50 | bellard | res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user); |
277 | b92e5a22 | bellard | } else {
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278 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
279 | 61382a50 | bellard | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); |
280 | b92e5a22 | bellard | } |
281 | b92e5a22 | bellard | return res;
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282 | b92e5a22 | bellard | } |
283 | b92e5a22 | bellard | |
284 | b92e5a22 | bellard | #if DATA_SIZE <= 2 |
285 | c27004ec | bellard | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
286 | b92e5a22 | bellard | { |
287 | b92e5a22 | bellard | int res, index;
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288 | c27004ec | bellard | target_ulong addr; |
289 | c27004ec | bellard | unsigned long physaddr; |
290 | 61382a50 | bellard | int is_user;
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291 | 61382a50 | bellard | |
292 | c27004ec | bellard | addr = ptr; |
293 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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294 | 61382a50 | bellard | is_user = CPU_MEM_INDEX; |
295 | 84b7b8e7 | bellard | if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
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296 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
297 | 61382a50 | bellard | res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user); |
298 | b92e5a22 | bellard | } else {
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299 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
300 | b92e5a22 | bellard | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); |
301 | b92e5a22 | bellard | } |
302 | b92e5a22 | bellard | return res;
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303 | b92e5a22 | bellard | } |
304 | b92e5a22 | bellard | #endif
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305 | b92e5a22 | bellard | |
306 | 84b7b8e7 | bellard | #if ACCESS_TYPE != 3 |
307 | 84b7b8e7 | bellard | |
308 | e16c53fa | bellard | /* generic store macro */
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309 | e16c53fa | bellard | |
310 | c27004ec | bellard | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
311 | b92e5a22 | bellard | { |
312 | b92e5a22 | bellard | int index;
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313 | c27004ec | bellard | target_ulong addr; |
314 | c27004ec | bellard | unsigned long physaddr; |
315 | 61382a50 | bellard | int is_user;
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316 | 61382a50 | bellard | |
317 | c27004ec | bellard | addr = ptr; |
318 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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319 | 61382a50 | bellard | is_user = CPU_MEM_INDEX; |
320 | 84b7b8e7 | bellard | if (__builtin_expect(env->tlb_table[is_user][index].addr_write !=
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321 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
322 | 61382a50 | bellard | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user); |
323 | b92e5a22 | bellard | } else {
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324 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
325 | b92e5a22 | bellard | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); |
326 | b92e5a22 | bellard | } |
327 | b92e5a22 | bellard | } |
328 | b92e5a22 | bellard | |
329 | 84b7b8e7 | bellard | #endif /* ACCESS_TYPE != 3 */ |
330 | 84b7b8e7 | bellard | |
331 | 84b7b8e7 | bellard | #endif /* !asm */ |
332 | 84b7b8e7 | bellard | |
333 | 84b7b8e7 | bellard | #if ACCESS_TYPE != 3 |
334 | e16c53fa | bellard | |
335 | 2d603d22 | bellard | #if DATA_SIZE == 8 |
336 | 3f87bf69 | bellard | static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr) |
337 | 2d603d22 | bellard | { |
338 | 2d603d22 | bellard | union {
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339 | 3f87bf69 | bellard | float64 d; |
340 | 2d603d22 | bellard | uint64_t i; |
341 | 2d603d22 | bellard | } u; |
342 | 2d603d22 | bellard | u.i = glue(ldq, MEMSUFFIX)(ptr); |
343 | 2d603d22 | bellard | return u.d;
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344 | 2d603d22 | bellard | } |
345 | 2d603d22 | bellard | |
346 | 3f87bf69 | bellard | static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v) |
347 | 2d603d22 | bellard | { |
348 | 2d603d22 | bellard | union {
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349 | 3f87bf69 | bellard | float64 d; |
350 | 2d603d22 | bellard | uint64_t i; |
351 | 2d603d22 | bellard | } u; |
352 | 2d603d22 | bellard | u.d = v; |
353 | 2d603d22 | bellard | glue(stq, MEMSUFFIX)(ptr, u.i); |
354 | 2d603d22 | bellard | } |
355 | 2d603d22 | bellard | #endif /* DATA_SIZE == 8 */ |
356 | 2d603d22 | bellard | |
357 | 2d603d22 | bellard | #if DATA_SIZE == 4 |
358 | 3f87bf69 | bellard | static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr) |
359 | 2d603d22 | bellard | { |
360 | 2d603d22 | bellard | union {
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361 | 3f87bf69 | bellard | float32 f; |
362 | 2d603d22 | bellard | uint32_t i; |
363 | 2d603d22 | bellard | } u; |
364 | 2d603d22 | bellard | u.i = glue(ldl, MEMSUFFIX)(ptr); |
365 | 2d603d22 | bellard | return u.f;
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366 | 2d603d22 | bellard | } |
367 | 2d603d22 | bellard | |
368 | 3f87bf69 | bellard | static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) |
369 | 2d603d22 | bellard | { |
370 | 2d603d22 | bellard | union {
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371 | 3f87bf69 | bellard | float32 f; |
372 | 2d603d22 | bellard | uint32_t i; |
373 | 2d603d22 | bellard | } u; |
374 | 2d603d22 | bellard | u.f = v; |
375 | 2d603d22 | bellard | glue(stl, MEMSUFFIX)(ptr, u.i); |
376 | 2d603d22 | bellard | } |
377 | 2d603d22 | bellard | #endif /* DATA_SIZE == 4 */ |
378 | 2d603d22 | bellard | |
379 | 84b7b8e7 | bellard | #endif /* ACCESS_TYPE != 3 */ |
380 | 84b7b8e7 | bellard | |
381 | b92e5a22 | bellard | #undef RES_TYPE
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382 | b92e5a22 | bellard | #undef DATA_TYPE
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383 | b92e5a22 | bellard | #undef DATA_STYPE
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384 | b92e5a22 | bellard | #undef SUFFIX
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385 | 61382a50 | bellard | #undef USUFFIX
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386 | b92e5a22 | bellard | #undef DATA_SIZE
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387 | 61382a50 | bellard | #undef CPU_MEM_INDEX
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388 | 61382a50 | bellard | #undef MMUSUFFIX
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389 | 84b7b8e7 | bellard | #undef ADDR_READ |