Revision ead9360e target-mips/fop_template.c
| b/target-mips/fop_template.c | ||
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| 24 | 24 |
#define OP_WLOAD_FREG(treg, tregname, FREG) \ |
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void glue(glue(op_load_fpr_,tregname), FREG) (void) \ |
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{ \
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treg = env->fpr[FREG].fs[FP_ENDIAN_IDX]; \
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|
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treg = env->fpu->fpr[FREG].fs[FP_ENDIAN_IDX]; \
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RETURN(); \ |
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} |
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|
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#define OP_WSTORE_FREG(treg, tregname, FREG) \ |
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void glue(glue(op_store_fpr_,tregname), FREG) (void) \ |
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{ \
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env->fpr[FREG].fs[FP_ENDIAN_IDX] = treg; \
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env->fpu->fpr[FREG].fs[FP_ENDIAN_IDX] = treg; \
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|
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RETURN(); \ |
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} |
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|
| ... | ... | |
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void glue(glue(op_load_fpr_,tregname), FREG) (void) \ |
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{ \
|
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if (env->hflags & MIPS_HFLAG_F64) \ |
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treg = env->fpr[FREG].fd; \
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treg = env->fpu->fpr[FREG].fd; \
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|
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else \ |
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treg = (uint64_t)(env->fpr[FREG | 1].fs[FP_ENDIAN_IDX]) << 32 | \ |
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env->fpr[FREG & ~1].fs[FP_ENDIAN_IDX]; \ |
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treg = (uint64_t)(env->fpu->fpr[FREG | 1].fs[FP_ENDIAN_IDX]) << 32 | \
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env->fpu->fpr[FREG & ~1].fs[FP_ENDIAN_IDX]; \
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|
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RETURN(); \ |
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} |
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|
| ... | ... | |
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void glue(glue(op_store_fpr_,tregname), FREG) (void) \ |
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{ \
|
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if (env->hflags & MIPS_HFLAG_F64) \ |
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env->fpr[FREG].fd = treg; \
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|
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env->fpu->fpr[FREG].fd = treg; \
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|
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else { \
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env->fpr[FREG | 1].fs[FP_ENDIAN_IDX] = treg >> 32; \ |
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env->fpr[FREG & ~1].fs[FP_ENDIAN_IDX] = treg; \
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env->fpu->fpr[FREG | 1].fs[FP_ENDIAN_IDX] = treg >> 32; \
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env->fpu->fpr[FREG & ~1].fs[FP_ENDIAN_IDX] = treg; \
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|
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} \ |
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RETURN(); \ |
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} |
| ... | ... | |
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#define OP_PSLOAD_FREG(treg, tregname, FREG) \ |
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void glue(glue(op_load_fpr_,tregname), FREG) (void) \ |
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{ \
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treg = env->fpr[FREG].fs[!FP_ENDIAN_IDX]; \
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treg = env->fpu->fpr[FREG].fs[!FP_ENDIAN_IDX]; \
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RETURN(); \ |
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} |
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|
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#define OP_PSSTORE_FREG(treg, tregname, FREG) \ |
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void glue(glue(op_store_fpr_,tregname), FREG) (void) \ |
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{ \
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env->fpr[FREG].fs[!FP_ENDIAN_IDX] = treg; \
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env->fpu->fpr[FREG].fs[!FP_ENDIAN_IDX] = treg; \
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RETURN(); \ |
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} |
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