Revision eb66e6a9

b/target-s390x/insn-data.def
132 132
    C(0xc60e, CLGFRL,  RIL_b, GIE, r1_o, mri2_32u, 0, 0, 0, cmpu64)
133 133
    C(0xc607, CLHRL,   RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu32)
134 134
    C(0xc606, CLGHRL,  RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu64)
135
/* COMPARE LOGICAL LONG EXTENDED */
136
    C(0xa900, CLCLE,   RS_a,  Z,   0, a2, 0, 0, clcle, 0)
135 137

  
136 138
/* CONVERT TO DECIMAL */
137 139
    C(0x4e00, CVD,     RX_a,  Z,   r1_o, a2, 0, 0, cvd, 0)
......
291 293
    C(0xeb52, MVIY,    SIY,   LD,  la1, i2, 0, m1_8, mov2, 0)
292 294
/* MOVE LONG */
293 295
    C(0x0e00, MVCL,    RR_a,  Z,   0, 0, 0, 0, mvcl, 0)
296
/* MOVE LONG EXTENDED */
297
    C(0xa800, MVCLE,   RS_a,  Z,   0, a2, 0, 0, mvcle, 0)
294 298

  
295 299
/* MULTIPLY */
296 300
    C(0x1c00, MR,      RR_a,  Z,   r1p1_32s, r2_32s, new, r1_D32, mul, 0)
b/target-s390x/translate.c
2233 2233
    LOG_DISAS("opc 0x%x\n", opc);
2234 2234

  
2235 2235
    switch (opc) {
2236
    case 0xa8: /* MVCLE   R1,R3,D2(B2)     [RS] */
2237
        insn = ld_code4(env, s->pc);
2238
        decode_rs(s, insn, &r1, &r3, &b2, &d2);
2239
        tmp = get_address(s, 0, b2, d2);
2240
        tmp32_1 = tcg_const_i32(r1);
2241
        tmp32_2 = tcg_const_i32(r3);
2242
        potential_page_fault(s);
2243
        gen_helper_mvcle(cc_op, cpu_env, tmp32_1, tmp, tmp32_2);
2244
        set_cc_static(s);
2245
        tcg_temp_free_i64(tmp);
2246
        tcg_temp_free_i32(tmp32_1);
2247
        tcg_temp_free_i32(tmp32_2);
2248
        break;
2249
    case 0xa9: /* CLCLE   R1,R3,D2(B2)     [RS] */
2250
        insn = ld_code4(env, s->pc);
2251
        decode_rs(s, insn, &r1, &r3, &b2, &d2);
2252
        tmp = get_address(s, 0, b2, d2);
2253
        tmp32_1 = tcg_const_i32(r1);
2254
        tmp32_2 = tcg_const_i32(r3);
2255
        potential_page_fault(s);
2256
        gen_helper_clcle(cc_op, cpu_env, tmp32_1, tmp, tmp32_2);
2257
        set_cc_static(s);
2258
        tcg_temp_free_i64(tmp);
2259
        tcg_temp_free_i32(tmp32_1);
2260
        tcg_temp_free_i32(tmp32_2);
2261
        break;
2262 2236
#ifndef CONFIG_USER_ONLY
2263 2237
    case 0xae: /* SIGP   R1,R3,D2(B2)     [RS] */
2264 2238
        check_privileged(s);
......
3028 3002
    return help_branch(s, &c, is_imm, imm, o->in2);
3029 3003
}
3030 3004

  
3005
static ExitStatus op_clcle(DisasContext *s, DisasOps *o)
3006
{
3007
    TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
3008
    TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
3009
    potential_page_fault(s);
3010
    gen_helper_clcle(cc_op, cpu_env, r1, o->in2, r3);
3011
    tcg_temp_free_i32(r1);
3012
    tcg_temp_free_i32(r3);
3013
    set_cc_static(s);
3014
    return NO_EXIT;
3015
}
3016

  
3031 3017
static ExitStatus op_cvd(DisasContext *s, DisasOps *o)
3032 3018
{
3033 3019
    TCGv_i64 t1 = tcg_temp_new_i64();
......
3348 3334
    return NO_EXIT;
3349 3335
}
3350 3336

  
3337
static ExitStatus op_mvcle(DisasContext *s, DisasOps *o)
3338
{
3339
    TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
3340
    TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
3341
    potential_page_fault(s);
3342
    gen_helper_mvcle(cc_op, cpu_env, r1, o->in2, r3);
3343
    tcg_temp_free_i32(r1);
3344
    tcg_temp_free_i32(r3);
3345
    set_cc_static(s);
3346
    return NO_EXIT;
3347
}
3348

  
3351 3349
static ExitStatus op_mul(DisasContext *s, DisasOps *o)
3352 3350
{
3353 3351
    tcg_gen_mul_i64(o->out, o->in1, o->in2);

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