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/*
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 *  CRIS helper routines
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 *
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 *  Copyright (c) 2007 AXIS Communications
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 *  Written by Edgar E. Iglesias
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include <assert.h>
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#include "exec.h"
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#include "mmu.h"
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#include "helper.h"
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#define D(x)
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#if !defined(CONFIG_USER_ONLY)
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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/* Try to fill the TLB and return an exception if error. If retaddr is
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   NULL, it means that the function was called in C code (i.e. not
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   from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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{
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    TranslationBlock *tb;
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    CPUState *saved_env;
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    unsigned long pc;
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    int ret;
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    /* XXX: hack to restore env in all cases, even if not called from
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       generated code */
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    saved_env = env;
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    env = cpu_single_env;
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    D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__, 
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             env->pc, env->debug1, retaddr));
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    ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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    if (unlikely(ret)) {
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        if (retaddr) {
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            /* now we have a real cpu fault */
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            pc = (unsigned long)retaddr;
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            tb = tb_find_pc(pc);
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            if (tb) {
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                /* the PC is inside the translated code. It means that we have
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                   a virtual CPU fault */
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                cpu_restore_state(tb, env, pc, NULL);
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                /* Evaluate flags after retranslation.  */
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                helper_top_evaluate_flags();
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            }
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        }
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        cpu_loop_exit();
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    }
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    env = saved_env;
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}
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#endif
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void helper_raise_exception(uint32_t index)
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{
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        env->exception_index = index;
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        cpu_loop_exit();
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}
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void helper_tlb_flush_pid(uint32_t pid)
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{
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#if !defined(CONFIG_USER_ONLY)
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        cris_mmu_flush_pid(env, pid);
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#endif
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}
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void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
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{
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        (fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1)); 
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}
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void helper_dummy(void)
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{
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}
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/* Used by the tlb decoder.  */
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#define EXTRACT_FIELD(src, start, end) \
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            (((src) >> start) & ((1 << (end - start + 1)) - 1))
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void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
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{
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        uint32_t srs;
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        srs = env->pregs[PR_SRS];
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        srs &= 3;
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        env->sregs[srs][sreg] = env->regs[reg];
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#if !defined(CONFIG_USER_ONLY)
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        if (srs == 1 || srs == 2) {
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                if (sreg == 6) {
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                        /* Writes to tlb-hi write to mm_cause as a side 
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                           effect.  */
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                        env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
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                        env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
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                }
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                else if (sreg == 5) {
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                        uint32_t set;
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                        uint32_t idx;
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                        uint32_t lo, hi;
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                        uint32_t vaddr;
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                        int tlb_v;
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                        idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
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                        set >>= 4;
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                        set &= 3;
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                        idx &= 15;
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                        /* We've just made a write to tlb_lo.  */
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                        lo = env->sregs[SFR_RW_MM_TLB_LO];
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                        /* Writes are done via r_mm_cause.  */
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                        hi = env->sregs[SFR_R_MM_CAUSE];
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                        vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
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                                              13, 31);
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                        vaddr <<= TARGET_PAGE_BITS;
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                        tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
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                                            3, 3);
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                        env->tlbsets[srs - 1][set][idx].lo = lo;
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                        env->tlbsets[srs - 1][set][idx].hi = hi;
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                        D(fprintf(logfile, 
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                                  "tlb flush vaddr=%x v=%d pc=%x\n", 
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                                  vaddr, tlb_v, env->pc));
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                        tlb_flush_page(env, vaddr);
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                }
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        }
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#endif
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}
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void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
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{
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        uint32_t srs;
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        env->pregs[PR_SRS] &= 3;
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        srs = env->pregs[PR_SRS];
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#if !defined(CONFIG_USER_ONLY)
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        if (srs == 1 || srs == 2)
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        {
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                uint32_t set;
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                uint32_t idx;
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                uint32_t lo, hi;
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                idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
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                set >>= 4;
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                set &= 3;
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                idx &= 15;
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                /* Update the mirror regs.  */
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                hi = env->tlbsets[srs - 1][set][idx].hi;
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                lo = env->tlbsets[srs - 1][set][idx].lo;
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                env->sregs[SFR_RW_MM_TLB_HI] = hi;
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                env->sregs[SFR_RW_MM_TLB_LO] = lo;
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        }
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#endif
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        env->regs[reg] = env->sregs[srs][sreg];
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        RETURN();
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}
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static void cris_ccs_rshift(CPUState *env)
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{
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        uint32_t ccs;
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        /* Apply the ccs shift.  */
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        ccs = env->pregs[PR_CCS];
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        ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
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        if (ccs & U_FLAG)
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        {
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                /* Enter user mode.  */
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                env->ksp = env->regs[R_SP];
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                env->regs[R_SP] = env->pregs[PR_USP];
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        }
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        env->pregs[PR_CCS] = ccs;
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}
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void helper_rfe(void)
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{
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        int rflag = env->pregs[PR_CCS] & R_FLAG;
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        D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n", 
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                 env->pregs[PR_ERP], env->pregs[PR_PID],
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                 env->pregs[PR_CCS],
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                 env->btarget));
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        cris_ccs_rshift(env);
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        /* RFE sets the P_FLAG only if the R_FLAG is not set.  */
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        if (!rflag)
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                env->pregs[PR_CCS] |= P_FLAG;
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}
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void helper_rfn(void)
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{
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        int rflag = env->pregs[PR_CCS] & R_FLAG;
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        D(fprintf(logfile, "rfn: erp=%x pid=%x ccs=%x btarget=%x\n", 
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                 env->pregs[PR_ERP], env->pregs[PR_PID],
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                 env->pregs[PR_CCS],
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                 env->btarget));
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        cris_ccs_rshift(env);
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        /* Set the P_FLAG only if the R_FLAG is not set.  */
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        if (!rflag)
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                env->pregs[PR_CCS] |= P_FLAG;
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    /* Always set the M flag.  */
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    env->pregs[PR_CCS] |= M_FLAG;
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}
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void helper_store(uint32_t a0)
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{
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        if (env->pregs[PR_CCS] & P_FLAG )
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        {
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                cpu_abort(env, "cond_store_failed! pc=%x a0=%x\n",
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                          env->pc, a0);
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        }
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}
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void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
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                          int is_asi)
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{
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        D(printf("%s addr=%x w=%d ex=%d asi=%d\n", 
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                __func__, addr, is_write, is_exec, is_asi));
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}
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static void evaluate_flags_writeback(uint32_t flags)
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{
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        int x;
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        /* Extended arithmetics, leave the z flag alone.  */
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        x = env->cc_x;
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        if ((x || env->cc_op == CC_OP_ADDC)
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            && flags & Z_FLAG)
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                env->cc_mask &= ~Z_FLAG;
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        /* all insn clear the x-flag except setf or clrf.  */
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        env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG);
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        flags &= env->cc_mask;
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        env->pregs[PR_CCS] |= flags;
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}
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void helper_evaluate_flags_muls(void)
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{
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        uint32_t src;
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        uint32_t dst;
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        uint32_t res;
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        uint32_t flags = 0;
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        int64_t tmp;
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        int32_t mof;
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        int dneg;
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        src = env->cc_src;
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        dst = env->cc_dest;
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        res = env->cc_result;
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        dneg = ((int32_t)res) < 0;
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        mof = env->pregs[PR_MOF];
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        tmp = mof;
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        tmp <<= 32;
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        tmp |= res;
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        if (tmp == 0)
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                flags |= Z_FLAG;
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        else if (tmp < 0)
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                flags |= N_FLAG;
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        if ((dneg && mof != -1)
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            || (!dneg && mof != 0))
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                flags |= V_FLAG;
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        evaluate_flags_writeback(flags);
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}
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void  helper_evaluate_flags_mulu(void)
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{
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        uint32_t src;
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        uint32_t dst;
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        uint32_t res;
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        uint32_t flags = 0;
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        uint64_t tmp;
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        uint32_t mof;
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        src = env->cc_src;
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        dst = env->cc_dest;
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        res = env->cc_result;
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        mof = env->pregs[PR_MOF];
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        tmp = mof;
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        tmp <<= 32;
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        tmp |= res;
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        if (tmp == 0)
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                flags |= Z_FLAG;
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        else if (tmp >> 63)
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                flags |= N_FLAG;
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        if (mof)
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                flags |= V_FLAG;
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        evaluate_flags_writeback(flags);
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}
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void  helper_evaluate_flags_mcp(void)
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{
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        uint32_t src;
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        uint32_t dst;
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        uint32_t res;
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        uint32_t flags = 0;
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        src = env->cc_src;
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        dst = env->cc_dest;
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        res = env->cc_result;
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        if ((res & 0x80000000L) != 0L)
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        {
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                flags |= N_FLAG;
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                if (((src & 0x80000000L) == 0L)
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                    && ((dst & 0x80000000L) == 0L))
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                {
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                        flags |= V_FLAG;
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                }
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                else if (((src & 0x80000000L) != 0L) &&
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                         ((dst & 0x80000000L) != 0L))
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                {
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                        flags |= R_FLAG;
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                }
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        }
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        else
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        {
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                if (res == 0L)
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                        flags |= Z_FLAG;
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                if (((src & 0x80000000L) != 0L)
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                    && ((dst & 0x80000000L) != 0L))
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                        flags |= V_FLAG;
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                if ((dst & 0x80000000L) != 0L
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                    || (src & 0x80000000L) != 0L)
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                        flags |= R_FLAG;
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        }
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        evaluate_flags_writeback(flags);
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}
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void  helper_evaluate_flags_alu_4(void)
372 b41f7df0 edgar_igl
{
373 b41f7df0 edgar_igl
        uint32_t src;
374 b41f7df0 edgar_igl
        uint32_t dst;
375 b41f7df0 edgar_igl
        uint32_t res;
376 b41f7df0 edgar_igl
        uint32_t flags = 0;
377 b41f7df0 edgar_igl
378 b41f7df0 edgar_igl
        src = env->cc_src;
379 b41f7df0 edgar_igl
        dst = env->cc_dest;
380 30abcfc7 edgar_igl
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        /* Reconstruct the result.  */
382 30abcfc7 edgar_igl
        switch (env->cc_op)
383 30abcfc7 edgar_igl
        {
384 30abcfc7 edgar_igl
                case CC_OP_SUB:
385 30abcfc7 edgar_igl
                        res = dst - src;
386 30abcfc7 edgar_igl
                        break;
387 30abcfc7 edgar_igl
                case CC_OP_ADD:
388 30abcfc7 edgar_igl
                        res = dst + src;
389 30abcfc7 edgar_igl
                        break;
390 30abcfc7 edgar_igl
                default:
391 30abcfc7 edgar_igl
                        res = env->cc_result;
392 30abcfc7 edgar_igl
                        break;
393 30abcfc7 edgar_igl
        }
394 30abcfc7 edgar_igl
395 30abcfc7 edgar_igl
        if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
396 30abcfc7 edgar_igl
                src = ~src;
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        if ((res & 0x80000000L) != 0L)
399 b41f7df0 edgar_igl
        {
400 b41f7df0 edgar_igl
                flags |= N_FLAG;
401 b41f7df0 edgar_igl
                if (((src & 0x80000000L) == 0L)
402 b41f7df0 edgar_igl
                    && ((dst & 0x80000000L) == 0L))
403 b41f7df0 edgar_igl
                {
404 b41f7df0 edgar_igl
                        flags |= V_FLAG;
405 b41f7df0 edgar_igl
                }
406 b41f7df0 edgar_igl
                else if (((src & 0x80000000L) != 0L) &&
407 b41f7df0 edgar_igl
                         ((dst & 0x80000000L) != 0L))
408 b41f7df0 edgar_igl
                {
409 b41f7df0 edgar_igl
                        flags |= C_FLAG;
410 b41f7df0 edgar_igl
                }
411 b41f7df0 edgar_igl
        }
412 b41f7df0 edgar_igl
        else
413 b41f7df0 edgar_igl
        {
414 b41f7df0 edgar_igl
                if (res == 0L)
415 b41f7df0 edgar_igl
                        flags |= Z_FLAG;
416 b41f7df0 edgar_igl
                if (((src & 0x80000000L) != 0L)
417 b41f7df0 edgar_igl
                    && ((dst & 0x80000000L) != 0L))
418 b41f7df0 edgar_igl
                        flags |= V_FLAG;
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                if ((dst & 0x80000000L) != 0L
420 b41f7df0 edgar_igl
                    || (src & 0x80000000L) != 0L)
421 b41f7df0 edgar_igl
                        flags |= C_FLAG;
422 b41f7df0 edgar_igl
        }
423 b41f7df0 edgar_igl
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        if (env->cc_op == CC_OP_SUB
425 b41f7df0 edgar_igl
            || env->cc_op == CC_OP_CMP) {
426 b41f7df0 edgar_igl
                flags ^= C_FLAG;
427 b41f7df0 edgar_igl
        }
428 b41f7df0 edgar_igl
        evaluate_flags_writeback(flags);
429 b41f7df0 edgar_igl
}
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void  helper_evaluate_flags_move_4 (void)
432 b41f7df0 edgar_igl
{
433 b41f7df0 edgar_igl
        uint32_t res;
434 b41f7df0 edgar_igl
        uint32_t flags = 0;
435 b41f7df0 edgar_igl
436 b41f7df0 edgar_igl
        res = env->cc_result;
437 b41f7df0 edgar_igl
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        if ((int32_t)res < 0)
439 b41f7df0 edgar_igl
                flags |= N_FLAG;
440 b41f7df0 edgar_igl
        else if (res == 0L)
441 b41f7df0 edgar_igl
                flags |= Z_FLAG;
442 b41f7df0 edgar_igl
443 b41f7df0 edgar_igl
        evaluate_flags_writeback(flags);
444 b41f7df0 edgar_igl
}
445 b41f7df0 edgar_igl
void  helper_evaluate_flags_move_2 (void)
446 b41f7df0 edgar_igl
{
447 b41f7df0 edgar_igl
        uint32_t src;
448 b41f7df0 edgar_igl
        uint32_t flags = 0;
449 b41f7df0 edgar_igl
        uint16_t res;
450 b41f7df0 edgar_igl
451 b41f7df0 edgar_igl
        src = env->cc_src;
452 b41f7df0 edgar_igl
        res = env->cc_result;
453 b41f7df0 edgar_igl
454 b41f7df0 edgar_igl
        if ((int16_t)res < 0L)
455 b41f7df0 edgar_igl
                flags |= N_FLAG;
456 b41f7df0 edgar_igl
        else if (res == 0)
457 b41f7df0 edgar_igl
                flags |= Z_FLAG;
458 b41f7df0 edgar_igl
459 b41f7df0 edgar_igl
        evaluate_flags_writeback(flags);
460 b41f7df0 edgar_igl
}
461 b41f7df0 edgar_igl
462 b41f7df0 edgar_igl
/* TODO: This is expensive. We could split things up and only evaluate part of
463 b41f7df0 edgar_igl
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
464 b41f7df0 edgar_igl
void helper_evaluate_flags (void)
465 b41f7df0 edgar_igl
{
466 b41f7df0 edgar_igl
        uint32_t src;
467 b41f7df0 edgar_igl
        uint32_t dst;
468 b41f7df0 edgar_igl
        uint32_t res;
469 b41f7df0 edgar_igl
        uint32_t flags = 0;
470 b41f7df0 edgar_igl
471 b41f7df0 edgar_igl
        src = env->cc_src;
472 b41f7df0 edgar_igl
        dst = env->cc_dest;
473 b41f7df0 edgar_igl
        res = env->cc_result;
474 b41f7df0 edgar_igl
475 30abcfc7 edgar_igl
        if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
476 30abcfc7 edgar_igl
                src = ~src;
477 b41f7df0 edgar_igl
478 b41f7df0 edgar_igl
        /* Now, evaluate the flags. This stuff is based on
479 b41f7df0 edgar_igl
           Per Zander's CRISv10 simulator.  */
480 b41f7df0 edgar_igl
        switch (env->cc_size)
481 b41f7df0 edgar_igl
        {
482 b41f7df0 edgar_igl
                case 1:
483 b41f7df0 edgar_igl
                        if ((res & 0x80L) != 0L)
484 b41f7df0 edgar_igl
                        {
485 b41f7df0 edgar_igl
                                flags |= N_FLAG;
486 b41f7df0 edgar_igl
                                if (((src & 0x80L) == 0L)
487 b41f7df0 edgar_igl
                                    && ((dst & 0x80L) == 0L))
488 b41f7df0 edgar_igl
                                {
489 b41f7df0 edgar_igl
                                        flags |= V_FLAG;
490 b41f7df0 edgar_igl
                                }
491 b41f7df0 edgar_igl
                                else if (((src & 0x80L) != 0L)
492 b41f7df0 edgar_igl
                                         && ((dst & 0x80L) != 0L))
493 b41f7df0 edgar_igl
                                {
494 b41f7df0 edgar_igl
                                        flags |= C_FLAG;
495 b41f7df0 edgar_igl
                                }
496 b41f7df0 edgar_igl
                        }
497 b41f7df0 edgar_igl
                        else
498 b41f7df0 edgar_igl
                        {
499 b41f7df0 edgar_igl
                                if ((res & 0xFFL) == 0L)
500 b41f7df0 edgar_igl
                                {
501 b41f7df0 edgar_igl
                                        flags |= Z_FLAG;
502 b41f7df0 edgar_igl
                                }
503 b41f7df0 edgar_igl
                                if (((src & 0x80L) != 0L)
504 b41f7df0 edgar_igl
                                    && ((dst & 0x80L) != 0L))
505 b41f7df0 edgar_igl
                                {
506 b41f7df0 edgar_igl
                                        flags |= V_FLAG;
507 b41f7df0 edgar_igl
                                }
508 b41f7df0 edgar_igl
                                if ((dst & 0x80L) != 0L
509 b41f7df0 edgar_igl
                                    || (src & 0x80L) != 0L)
510 b41f7df0 edgar_igl
                                {
511 b41f7df0 edgar_igl
                                        flags |= C_FLAG;
512 b41f7df0 edgar_igl
                                }
513 b41f7df0 edgar_igl
                        }
514 b41f7df0 edgar_igl
                        break;
515 b41f7df0 edgar_igl
                case 2:
516 b41f7df0 edgar_igl
                        if ((res & 0x8000L) != 0L)
517 b41f7df0 edgar_igl
                        {
518 b41f7df0 edgar_igl
                                flags |= N_FLAG;
519 b41f7df0 edgar_igl
                                if (((src & 0x8000L) == 0L)
520 b41f7df0 edgar_igl
                                    && ((dst & 0x8000L) == 0L))
521 b41f7df0 edgar_igl
                                {
522 b41f7df0 edgar_igl
                                        flags |= V_FLAG;
523 b41f7df0 edgar_igl
                                }
524 b41f7df0 edgar_igl
                                else if (((src & 0x8000L) != 0L)
525 b41f7df0 edgar_igl
                                         && ((dst & 0x8000L) != 0L))
526 b41f7df0 edgar_igl
                                {
527 b41f7df0 edgar_igl
                                        flags |= C_FLAG;
528 b41f7df0 edgar_igl
                                }
529 b41f7df0 edgar_igl
                        }
530 b41f7df0 edgar_igl
                        else
531 b41f7df0 edgar_igl
                        {
532 b41f7df0 edgar_igl
                                if ((res & 0xFFFFL) == 0L)
533 b41f7df0 edgar_igl
                                {
534 b41f7df0 edgar_igl
                                        flags |= Z_FLAG;
535 b41f7df0 edgar_igl
                                }
536 b41f7df0 edgar_igl
                                if (((src & 0x8000L) != 0L)
537 b41f7df0 edgar_igl
                                    && ((dst & 0x8000L) != 0L))
538 b41f7df0 edgar_igl
                                {
539 b41f7df0 edgar_igl
                                        flags |= V_FLAG;
540 b41f7df0 edgar_igl
                                }
541 b41f7df0 edgar_igl
                                if ((dst & 0x8000L) != 0L
542 b41f7df0 edgar_igl
                                    || (src & 0x8000L) != 0L)
543 b41f7df0 edgar_igl
                                {
544 b41f7df0 edgar_igl
                                        flags |= C_FLAG;
545 b41f7df0 edgar_igl
                                }
546 b41f7df0 edgar_igl
                        }
547 b41f7df0 edgar_igl
                        break;
548 b41f7df0 edgar_igl
                case 4:
549 b41f7df0 edgar_igl
                        if ((res & 0x80000000L) != 0L)
550 b41f7df0 edgar_igl
                        {
551 b41f7df0 edgar_igl
                                flags |= N_FLAG;
552 b41f7df0 edgar_igl
                                if (((src & 0x80000000L) == 0L)
553 b41f7df0 edgar_igl
                                    && ((dst & 0x80000000L) == 0L))
554 b41f7df0 edgar_igl
                                {
555 b41f7df0 edgar_igl
                                        flags |= V_FLAG;
556 b41f7df0 edgar_igl
                                }
557 b41f7df0 edgar_igl
                                else if (((src & 0x80000000L) != 0L) &&
558 b41f7df0 edgar_igl
                                         ((dst & 0x80000000L) != 0L))
559 b41f7df0 edgar_igl
                                {
560 b41f7df0 edgar_igl
                                        flags |= C_FLAG;
561 b41f7df0 edgar_igl
                                }
562 b41f7df0 edgar_igl
                        }
563 b41f7df0 edgar_igl
                        else
564 b41f7df0 edgar_igl
                        {
565 b41f7df0 edgar_igl
                                if (res == 0L)
566 b41f7df0 edgar_igl
                                        flags |= Z_FLAG;
567 b41f7df0 edgar_igl
                                if (((src & 0x80000000L) != 0L)
568 b41f7df0 edgar_igl
                                    && ((dst & 0x80000000L) != 0L))
569 b41f7df0 edgar_igl
                                        flags |= V_FLAG;
570 b41f7df0 edgar_igl
                                if ((dst & 0x80000000L) != 0L
571 b41f7df0 edgar_igl
                                    || (src & 0x80000000L) != 0L)
572 b41f7df0 edgar_igl
                                        flags |= C_FLAG;
573 b41f7df0 edgar_igl
                        }
574 b41f7df0 edgar_igl
                        break;
575 b41f7df0 edgar_igl
                default:
576 b41f7df0 edgar_igl
                        break;
577 b41f7df0 edgar_igl
        }
578 b41f7df0 edgar_igl
579 b41f7df0 edgar_igl
        if (env->cc_op == CC_OP_SUB
580 b41f7df0 edgar_igl
            || env->cc_op == CC_OP_CMP) {
581 b41f7df0 edgar_igl
                flags ^= C_FLAG;
582 b41f7df0 edgar_igl
        }
583 b41f7df0 edgar_igl
        evaluate_flags_writeback(flags);
584 b41f7df0 edgar_igl
}
585 30abcfc7 edgar_igl
586 30abcfc7 edgar_igl
void helper_top_evaluate_flags(void)
587 30abcfc7 edgar_igl
{
588 30abcfc7 edgar_igl
        switch (env->cc_op)
589 30abcfc7 edgar_igl
        {
590 30abcfc7 edgar_igl
                case CC_OP_MCP:
591 30abcfc7 edgar_igl
                        helper_evaluate_flags_mcp();
592 30abcfc7 edgar_igl
                        break;
593 30abcfc7 edgar_igl
                case CC_OP_MULS:
594 30abcfc7 edgar_igl
                        helper_evaluate_flags_muls();
595 30abcfc7 edgar_igl
                        break;
596 30abcfc7 edgar_igl
                case CC_OP_MULU:
597 30abcfc7 edgar_igl
                        helper_evaluate_flags_mulu();
598 30abcfc7 edgar_igl
                        break;
599 30abcfc7 edgar_igl
                case CC_OP_MOVE:
600 30abcfc7 edgar_igl
                case CC_OP_AND:
601 30abcfc7 edgar_igl
                case CC_OP_OR:
602 30abcfc7 edgar_igl
                case CC_OP_XOR:
603 30abcfc7 edgar_igl
                case CC_OP_ASR:
604 30abcfc7 edgar_igl
                case CC_OP_LSR:
605 30abcfc7 edgar_igl
                case CC_OP_LSL:
606 30abcfc7 edgar_igl
                        switch (env->cc_size)
607 30abcfc7 edgar_igl
                        {
608 30abcfc7 edgar_igl
                                case 4:
609 30abcfc7 edgar_igl
                                        helper_evaluate_flags_move_4();
610 30abcfc7 edgar_igl
                                        break;
611 30abcfc7 edgar_igl
                                case 2:
612 30abcfc7 edgar_igl
                                        helper_evaluate_flags_move_2();
613 30abcfc7 edgar_igl
                                        break;
614 30abcfc7 edgar_igl
                                default:
615 30abcfc7 edgar_igl
                                        helper_evaluate_flags();
616 30abcfc7 edgar_igl
                                        break;
617 30abcfc7 edgar_igl
                        }
618 30abcfc7 edgar_igl
                        break;
619 30abcfc7 edgar_igl
                case CC_OP_FLAGS:
620 30abcfc7 edgar_igl
                        /* live.  */
621 30abcfc7 edgar_igl
                        break;
622 30abcfc7 edgar_igl
                default:
623 30abcfc7 edgar_igl
                {
624 30abcfc7 edgar_igl
                        switch (env->cc_size)
625 30abcfc7 edgar_igl
                        {
626 30abcfc7 edgar_igl
                                case 4:
627 30abcfc7 edgar_igl
                                        helper_evaluate_flags_alu_4();
628 30abcfc7 edgar_igl
                                        break;
629 30abcfc7 edgar_igl
                                default:
630 30abcfc7 edgar_igl
                                        helper_evaluate_flags();
631 30abcfc7 edgar_igl
                                        break;
632 30abcfc7 edgar_igl
                        }
633 30abcfc7 edgar_igl
                }
634 30abcfc7 edgar_igl
                break;
635 30abcfc7 edgar_igl
        }
636 30abcfc7 edgar_igl
}