Archipelago » qemu

    uint16_t csr[128];

    uint16_t bcr[32];

    uint64_t timer;

    uint8_t buffer[4096];

    int tx_busy;

    qemu_irq irq;

    if (CSR_STOP(s) || CSR_SPND(s))

        return 0;

    return sizeof(s->buffer)-16;

}

        qemu_put_be16s(f, &s->bcr[i]);

    qemu_put_be64s(f, &s->timer);

    qemu_put_sbe32(f, s->xmit_pos);

    qemu_put_buffer(f, s->buffer, 4096);

    qemu_put_sbe32(f, s->tx_busy);

    qemu_put_timer(f, s->poll_timer);

static int pcnet_load(QEMUFile *f, void *opaque, int version_id)

{

    PCNetState *s = opaque;

        return -EINVAL;

    qemu_get_sbe32s(f, &s->rap);

        qemu_get_be16s(f, &s->bcr[i]);

    qemu_get_be64s(f, &s->timer);

    qemu_get_sbe32s(f, &s->xmit_pos);

    qemu_get_buffer(f, s->buffer, 4096);

    qemu_get_sbe32s(f, &s->tx_busy);

    qemu_get_timer(f, s->poll_timer);

    PCIPCNetState *s = opaque;

    int ret;

    ret = pci_device_load(&s->pci_dev, f);

    if (ret < 0)

        return ret;

    s->phys_mem_read = pci_physical_memory_read;

    s->phys_mem_write = pci_physical_memory_write;

    return pcnet_common_init(&pci_dev->qdev, s, pci_pcnet_cleanup);

}

    s->phys_mem_read = ledma_memory_read;

    s->phys_mem_write = ledma_memory_write;

    return pcnet_common_init(&dev->qdev, s, lance_cleanup);

}