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1 | 502a5395 | pbrook | /*
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2 | 502a5395 | pbrook | * QEMU PREP PCI host
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3 | 502a5395 | pbrook | *
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4 | 502a5395 | pbrook | * Copyright (c) 2006 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 502a5395 | pbrook | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 502a5395 | pbrook | * of this software and associated documentation files (the "Software"), to deal
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8 | 502a5395 | pbrook | * in the Software without restriction, including without limitation the rights
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9 | 502a5395 | pbrook | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 502a5395 | pbrook | * copies of the Software, and to permit persons to whom the Software is
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11 | 502a5395 | pbrook | * furnished to do so, subject to the following conditions:
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12 | 502a5395 | pbrook | *
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13 | 502a5395 | pbrook | * The above copyright notice and this permission notice shall be included in
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14 | 502a5395 | pbrook | * all copies or substantial portions of the Software.
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15 | 502a5395 | pbrook | *
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16 | 502a5395 | pbrook | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 502a5395 | pbrook | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 502a5395 | pbrook | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 502a5395 | pbrook | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 502a5395 | pbrook | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 502a5395 | pbrook | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 502a5395 | pbrook | * THE SOFTWARE.
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23 | 502a5395 | pbrook | */
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24 | 502a5395 | pbrook | |
25 | 87ecb68b | pbrook | #include "hw.h" |
26 | 87ecb68b | pbrook | #include "pci.h" |
27 | 502a5395 | pbrook | #include "pci_host.h" |
28 | 18e08a55 | Michael S. Tsirkin | #include "prep_pci.h" |
29 | 502a5395 | pbrook | |
30 | 502a5395 | pbrook | typedef PCIHostState PREPPCIState;
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31 | 502a5395 | pbrook | |
32 | c227f099 | Anthony Liguori | static inline uint32_t PPC_PCIIO_config(target_phys_addr_t addr) |
33 | 502a5395 | pbrook | { |
34 | 502a5395 | pbrook | int i;
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35 | 502a5395 | pbrook | |
36 | 502a5395 | pbrook | for(i = 0; i < 11; i++) { |
37 | 502a5395 | pbrook | if ((addr & (1 << (11 + i))) != 0) |
38 | 502a5395 | pbrook | break;
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39 | 502a5395 | pbrook | } |
40 | 502a5395 | pbrook | return (addr & 0x7ff) | (i << 11); |
41 | 502a5395 | pbrook | } |
42 | 502a5395 | pbrook | |
43 | c227f099 | Anthony Liguori | static void PPC_PCIIO_writeb (void *opaque, target_phys_addr_t addr, uint32_t val) |
44 | 502a5395 | pbrook | { |
45 | 502a5395 | pbrook | PREPPCIState *s = opaque; |
46 | 502a5395 | pbrook | pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 1);
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47 | 502a5395 | pbrook | } |
48 | 502a5395 | pbrook | |
49 | c227f099 | Anthony Liguori | static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr, uint32_t val) |
50 | 502a5395 | pbrook | { |
51 | 502a5395 | pbrook | PREPPCIState *s = opaque; |
52 | 502a5395 | pbrook | val = bswap16(val); |
53 | 502a5395 | pbrook | pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 2);
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54 | 502a5395 | pbrook | } |
55 | 502a5395 | pbrook | |
56 | c227f099 | Anthony Liguori | static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr, uint32_t val) |
57 | 502a5395 | pbrook | { |
58 | 502a5395 | pbrook | PREPPCIState *s = opaque; |
59 | 502a5395 | pbrook | val = bswap32(val); |
60 | 502a5395 | pbrook | pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 4);
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61 | 502a5395 | pbrook | } |
62 | 502a5395 | pbrook | |
63 | c227f099 | Anthony Liguori | static uint32_t PPC_PCIIO_readb (void *opaque, target_phys_addr_t addr) |
64 | 502a5395 | pbrook | { |
65 | 502a5395 | pbrook | PREPPCIState *s = opaque; |
66 | 502a5395 | pbrook | uint32_t val; |
67 | 502a5395 | pbrook | val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 1);
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68 | 502a5395 | pbrook | return val;
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69 | 502a5395 | pbrook | } |
70 | 502a5395 | pbrook | |
71 | c227f099 | Anthony Liguori | static uint32_t PPC_PCIIO_readw (void *opaque, target_phys_addr_t addr) |
72 | 502a5395 | pbrook | { |
73 | 502a5395 | pbrook | PREPPCIState *s = opaque; |
74 | 502a5395 | pbrook | uint32_t val; |
75 | 502a5395 | pbrook | val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 2);
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76 | 502a5395 | pbrook | val = bswap16(val); |
77 | 502a5395 | pbrook | return val;
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78 | 502a5395 | pbrook | } |
79 | 502a5395 | pbrook | |
80 | c227f099 | Anthony Liguori | static uint32_t PPC_PCIIO_readl (void *opaque, target_phys_addr_t addr) |
81 | 502a5395 | pbrook | { |
82 | 502a5395 | pbrook | PREPPCIState *s = opaque; |
83 | 502a5395 | pbrook | uint32_t val; |
84 | 502a5395 | pbrook | val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 4);
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85 | 502a5395 | pbrook | val = bswap32(val); |
86 | 502a5395 | pbrook | return val;
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87 | 502a5395 | pbrook | } |
88 | 502a5395 | pbrook | |
89 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const PPC_PCIIO_write[] = { |
90 | 502a5395 | pbrook | &PPC_PCIIO_writeb, |
91 | 502a5395 | pbrook | &PPC_PCIIO_writew, |
92 | 502a5395 | pbrook | &PPC_PCIIO_writel, |
93 | 502a5395 | pbrook | }; |
94 | 502a5395 | pbrook | |
95 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const PPC_PCIIO_read[] = { |
96 | 502a5395 | pbrook | &PPC_PCIIO_readb, |
97 | 502a5395 | pbrook | &PPC_PCIIO_readw, |
98 | 502a5395 | pbrook | &PPC_PCIIO_readl, |
99 | 502a5395 | pbrook | }; |
100 | 502a5395 | pbrook | |
101 | d2b59317 | pbrook | static int prep_map_irq(PCIDevice *pci_dev, int irq_num) |
102 | 502a5395 | pbrook | { |
103 | 80b3ada7 | pbrook | return (irq_num + (pci_dev->devfn >> 3)) & 1; |
104 | d2b59317 | pbrook | } |
105 | d2b59317 | pbrook | |
106 | 5d4e84c8 | Juan Quintela | static void prep_set_irq(void *opaque, int irq_num, int level) |
107 | d2b59317 | pbrook | { |
108 | 5d4e84c8 | Juan Quintela | qemu_irq *pic = opaque; |
109 | 5d4e84c8 | Juan Quintela | |
110 | 8c9d7f83 | j_mayer | qemu_set_irq(pic[(irq_num & 1) ? 11 : 9] , level); |
111 | 502a5395 | pbrook | } |
112 | 502a5395 | pbrook | |
113 | d537cf6c | pbrook | PCIBus *pci_prep_init(qemu_irq *pic) |
114 | 502a5395 | pbrook | { |
115 | 502a5395 | pbrook | PREPPCIState *s; |
116 | 502a5395 | pbrook | PCIDevice *d; |
117 | 502a5395 | pbrook | int PPC_io_memory;
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118 | 502a5395 | pbrook | |
119 | 502a5395 | pbrook | s = qemu_mallocz(sizeof(PREPPCIState));
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120 | 02e2da45 | Paul Brook | s->bus = pci_register_bus(NULL, "pci", |
121 | 02e2da45 | Paul Brook | prep_set_irq, prep_map_irq, pic, 0, 4); |
122 | 502a5395 | pbrook | |
123 | f08b32fe | Isaku Yamahata | pci_host_conf_register_ioport(0xcf8, s);
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124 | 502a5395 | pbrook | |
125 | 4f5e19e6 | Isaku Yamahata | pci_host_data_register_ioport(0xcfc, s);
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126 | 502a5395 | pbrook | |
127 | 1eed09cb | Avi Kivity | PPC_io_memory = cpu_register_io_memory(PPC_PCIIO_read, |
128 | 2507c12a | Alexander Graf | PPC_PCIIO_write, s, |
129 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
130 | 502a5395 | pbrook | cpu_register_physical_memory(0x80800000, 0x00400000, PPC_io_memory); |
131 | 502a5395 | pbrook | |
132 | 5fafdf24 | ths | /* PCI host bridge */
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133 | 5fafdf24 | ths | d = pci_register_device(s->bus, "PREP Host Bridge - Motorola Raven",
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134 | 502a5395 | pbrook | sizeof(PCIDevice), 0, NULL, NULL); |
135 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA); |
136 | deb54399 | aliguori | pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_RAVEN); |
137 | 502a5395 | pbrook | d->config[0x08] = 0x00; // revision |
138 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
139 | 502a5395 | pbrook | d->config[0x0C] = 0x08; // cache_line_size |
140 | 502a5395 | pbrook | d->config[0x0D] = 0x10; // latency_timer |
141 | 502a5395 | pbrook | d->config[0x34] = 0x00; // capabilities_pointer |
142 | 502a5395 | pbrook | |
143 | 502a5395 | pbrook | return s->bus;
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144 | 502a5395 | pbrook | } |