Revision f0967a1a

b/target-i386/Makefile.objs
7 7
obj-$(CONFIG_LINUX_USER) += ioport-user.o
8 8
obj-$(CONFIG_BSD_USER) += ioport-user.o
9 9

  
10
$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
11 10
$(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
12 11
$(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
13 12
$(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
b/target-i386/cc_helper.c
18 18
 */
19 19

  
20 20
#include "cpu.h"
21
#include "dyngen-exec.h"
22 21
#include "helper.h"
23 22

  
24 23
const uint8_t parity_table[256] = {
......
76 75

  
77 76
#endif
78 77

  
79
static int compute_all_eflags(void)
78
static int compute_all_eflags(CPUX86State *env)
80 79
{
81 80
    return CC_SRC;
82 81
}
83 82

  
84
static int compute_c_eflags(void)
83
static int compute_c_eflags(CPUX86State *env)
85 84
{
86 85
    return CC_SRC & CC_C;
87 86
}
88 87

  
89
uint32_t helper_cc_compute_all(int op)
88
uint32_t helper_cc_compute_all(CPUX86State *env, int op)
90 89
{
91 90
    switch (op) {
92 91
    default: /* should never happen */
93 92
        return 0;
94 93

  
95 94
    case CC_OP_EFLAGS:
96
        return compute_all_eflags();
95
        return compute_all_eflags(env);
97 96

  
98 97
    case CC_OP_MULB:
99
        return compute_all_mulb();
98
        return compute_all_mulb(env);
100 99
    case CC_OP_MULW:
101
        return compute_all_mulw();
100
        return compute_all_mulw(env);
102 101
    case CC_OP_MULL:
103
        return compute_all_mull();
102
        return compute_all_mull(env);
104 103

  
105 104
    case CC_OP_ADDB:
106
        return compute_all_addb();
105
        return compute_all_addb(env);
107 106
    case CC_OP_ADDW:
108
        return compute_all_addw();
107
        return compute_all_addw(env);
109 108
    case CC_OP_ADDL:
110
        return compute_all_addl();
109
        return compute_all_addl(env);
111 110

  
112 111
    case CC_OP_ADCB:
113
        return compute_all_adcb();
112
        return compute_all_adcb(env);
114 113
    case CC_OP_ADCW:
115
        return compute_all_adcw();
114
        return compute_all_adcw(env);
116 115
    case CC_OP_ADCL:
117
        return compute_all_adcl();
116
        return compute_all_adcl(env);
118 117

  
119 118
    case CC_OP_SUBB:
120
        return compute_all_subb();
119
        return compute_all_subb(env);
121 120
    case CC_OP_SUBW:
122
        return compute_all_subw();
121
        return compute_all_subw(env);
123 122
    case CC_OP_SUBL:
124
        return compute_all_subl();
123
        return compute_all_subl(env);
125 124

  
126 125
    case CC_OP_SBBB:
127
        return compute_all_sbbb();
126
        return compute_all_sbbb(env);
128 127
    case CC_OP_SBBW:
129
        return compute_all_sbbw();
128
        return compute_all_sbbw(env);
130 129
    case CC_OP_SBBL:
131
        return compute_all_sbbl();
130
        return compute_all_sbbl(env);
132 131

  
133 132
    case CC_OP_LOGICB:
134
        return compute_all_logicb();
133
        return compute_all_logicb(env);
135 134
    case CC_OP_LOGICW:
136
        return compute_all_logicw();
135
        return compute_all_logicw(env);
137 136
    case CC_OP_LOGICL:
138
        return compute_all_logicl();
137
        return compute_all_logicl(env);
139 138

  
140 139
    case CC_OP_INCB:
141
        return compute_all_incb();
140
        return compute_all_incb(env);
142 141
    case CC_OP_INCW:
143
        return compute_all_incw();
142
        return compute_all_incw(env);
144 143
    case CC_OP_INCL:
145
        return compute_all_incl();
144
        return compute_all_incl(env);
146 145

  
147 146
    case CC_OP_DECB:
148
        return compute_all_decb();
147
        return compute_all_decb(env);
149 148
    case CC_OP_DECW:
150
        return compute_all_decw();
149
        return compute_all_decw(env);
151 150
    case CC_OP_DECL:
152
        return compute_all_decl();
151
        return compute_all_decl(env);
153 152

  
154 153
    case CC_OP_SHLB:
155
        return compute_all_shlb();
154
        return compute_all_shlb(env);
156 155
    case CC_OP_SHLW:
157
        return compute_all_shlw();
156
        return compute_all_shlw(env);
158 157
    case CC_OP_SHLL:
159
        return compute_all_shll();
158
        return compute_all_shll(env);
160 159

  
161 160
    case CC_OP_SARB:
162
        return compute_all_sarb();
161
        return compute_all_sarb(env);
163 162
    case CC_OP_SARW:
164
        return compute_all_sarw();
163
        return compute_all_sarw(env);
165 164
    case CC_OP_SARL:
166
        return compute_all_sarl();
165
        return compute_all_sarl(env);
167 166

  
168 167
#ifdef TARGET_X86_64
169 168
    case CC_OP_MULQ:
170
        return compute_all_mulq();
169
        return compute_all_mulq(env);
171 170

  
172 171
    case CC_OP_ADDQ:
173
        return compute_all_addq();
172
        return compute_all_addq(env);
174 173

  
175 174
    case CC_OP_ADCQ:
176
        return compute_all_adcq();
175
        return compute_all_adcq(env);
177 176

  
178 177
    case CC_OP_SUBQ:
179
        return compute_all_subq();
178
        return compute_all_subq(env);
180 179

  
181 180
    case CC_OP_SBBQ:
182
        return compute_all_sbbq();
181
        return compute_all_sbbq(env);
183 182

  
184 183
    case CC_OP_LOGICQ:
185
        return compute_all_logicq();
184
        return compute_all_logicq(env);
186 185

  
187 186
    case CC_OP_INCQ:
188
        return compute_all_incq();
187
        return compute_all_incq(env);
189 188

  
190 189
    case CC_OP_DECQ:
191
        return compute_all_decq();
190
        return compute_all_decq(env);
192 191

  
193 192
    case CC_OP_SHLQ:
194
        return compute_all_shlq();
193
        return compute_all_shlq(env);
195 194

  
196 195
    case CC_OP_SARQ:
197
        return compute_all_sarq();
196
        return compute_all_sarq(env);
198 197
#endif
199 198
    }
200 199
}
201 200

  
202
uint32_t cpu_cc_compute_all(CPUX86State *env1, int op)
201
uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
203 202
{
204
    CPUX86State *saved_env;
205
    uint32_t ret;
206

  
207
    saved_env = env;
208
    env = env1;
209
    ret = helper_cc_compute_all(op);
210
    env = saved_env;
211
    return ret;
203
    return helper_cc_compute_all(env, op);
212 204
}
213 205

  
214
uint32_t helper_cc_compute_c(int op)
206
uint32_t helper_cc_compute_c(CPUX86State *env, int op)
215 207
{
216 208
    switch (op) {
217 209
    default: /* should never happen */
218 210
        return 0;
219 211

  
220 212
    case CC_OP_EFLAGS:
221
        return compute_c_eflags();
213
        return compute_c_eflags(env);
222 214

  
223 215
    case CC_OP_MULB:
224
        return compute_c_mull();
216
        return compute_c_mull(env);
225 217
    case CC_OP_MULW:
226
        return compute_c_mull();
218
        return compute_c_mull(env);
227 219
    case CC_OP_MULL:
228
        return compute_c_mull();
220
        return compute_c_mull(env);
229 221

  
230 222
    case CC_OP_ADDB:
231
        return compute_c_addb();
223
        return compute_c_addb(env);
232 224
    case CC_OP_ADDW:
233
        return compute_c_addw();
225
        return compute_c_addw(env);
234 226
    case CC_OP_ADDL:
235
        return compute_c_addl();
227
        return compute_c_addl(env);
236 228

  
237 229
    case CC_OP_ADCB:
238
        return compute_c_adcb();
230
        return compute_c_adcb(env);
239 231
    case CC_OP_ADCW:
240
        return compute_c_adcw();
232
        return compute_c_adcw(env);
241 233
    case CC_OP_ADCL:
242
        return compute_c_adcl();
234
        return compute_c_adcl(env);
243 235

  
244 236
    case CC_OP_SUBB:
245
        return compute_c_subb();
237
        return compute_c_subb(env);
246 238
    case CC_OP_SUBW:
247
        return compute_c_subw();
239
        return compute_c_subw(env);
248 240
    case CC_OP_SUBL:
249
        return compute_c_subl();
241
        return compute_c_subl(env);
250 242

  
251 243
    case CC_OP_SBBB:
252
        return compute_c_sbbb();
244
        return compute_c_sbbb(env);
253 245
    case CC_OP_SBBW:
254
        return compute_c_sbbw();
246
        return compute_c_sbbw(env);
255 247
    case CC_OP_SBBL:
256
        return compute_c_sbbl();
248
        return compute_c_sbbl(env);
257 249

  
258 250
    case CC_OP_LOGICB:
259 251
        return compute_c_logicb();
......
263 255
        return compute_c_logicl();
264 256

  
265 257
    case CC_OP_INCB:
266
        return compute_c_incl();
258
        return compute_c_incl(env);
267 259
    case CC_OP_INCW:
268
        return compute_c_incl();
260
        return compute_c_incl(env);
269 261
    case CC_OP_INCL:
270
        return compute_c_incl();
262
        return compute_c_incl(env);
271 263

  
272 264
    case CC_OP_DECB:
273
        return compute_c_incl();
265
        return compute_c_incl(env);
274 266
    case CC_OP_DECW:
275
        return compute_c_incl();
267
        return compute_c_incl(env);
276 268
    case CC_OP_DECL:
277
        return compute_c_incl();
269
        return compute_c_incl(env);
278 270

  
279 271
    case CC_OP_SHLB:
280
        return compute_c_shlb();
272
        return compute_c_shlb(env);
281 273
    case CC_OP_SHLW:
282
        return compute_c_shlw();
274
        return compute_c_shlw(env);
283 275
    case CC_OP_SHLL:
284
        return compute_c_shll();
276
        return compute_c_shll(env);
285 277

  
286 278
    case CC_OP_SARB:
287
        return compute_c_sarl();
279
        return compute_c_sarl(env);
288 280
    case CC_OP_SARW:
289
        return compute_c_sarl();
281
        return compute_c_sarl(env);
290 282
    case CC_OP_SARL:
291
        return compute_c_sarl();
283
        return compute_c_sarl(env);
292 284

  
293 285
#ifdef TARGET_X86_64
294 286
    case CC_OP_MULQ:
295
        return compute_c_mull();
287
        return compute_c_mull(env);
296 288

  
297 289
    case CC_OP_ADDQ:
298
        return compute_c_addq();
290
        return compute_c_addq(env);
299 291

  
300 292
    case CC_OP_ADCQ:
301
        return compute_c_adcq();
293
        return compute_c_adcq(env);
302 294

  
303 295
    case CC_OP_SUBQ:
304
        return compute_c_subq();
296
        return compute_c_subq(env);
305 297

  
306 298
    case CC_OP_SBBQ:
307
        return compute_c_sbbq();
299
        return compute_c_sbbq(env);
308 300

  
309 301
    case CC_OP_LOGICQ:
310 302
        return compute_c_logicq();
311 303

  
312 304
    case CC_OP_INCQ:
313
        return compute_c_incl();
305
        return compute_c_incl(env);
314 306

  
315 307
    case CC_OP_DECQ:
316
        return compute_c_incl();
308
        return compute_c_incl(env);
317 309

  
318 310
    case CC_OP_SHLQ:
319
        return compute_c_shlq();
311
        return compute_c_shlq(env);
320 312

  
321 313
    case CC_OP_SARQ:
322
        return compute_c_sarl();
314
        return compute_c_sarl(env);
323 315
#endif
324 316
    }
325 317
}
326 318

  
327
void helper_write_eflags(target_ulong t0, uint32_t update_mask)
319
void helper_write_eflags(CPUX86State *env, target_ulong t0,
320
                         uint32_t update_mask)
328 321
{
329 322
    cpu_load_eflags(env, t0, update_mask);
330 323
}
331 324

  
332
target_ulong helper_read_eflags(void)
325
target_ulong helper_read_eflags(CPUX86State *env)
333 326
{
334 327
    uint32_t eflags;
335 328

  
336
    eflags = helper_cc_compute_all(CC_OP);
329
    eflags = helper_cc_compute_all(env, CC_OP);
337 330
    eflags |= (DF & DF_MASK);
338 331
    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
339 332
    return eflags;
340 333
}
341 334

  
342
void helper_clts(void)
335
void helper_clts(CPUX86State *env)
343 336
{
344 337
    env->cr[0] &= ~CR0_TS_MASK;
345 338
    env->hflags &= ~HF_TS_MASK;
346 339
}
347 340

  
348
void helper_reset_rf(void)
341
void helper_reset_rf(CPUX86State *env)
349 342
{
350 343
    env->eflags &= ~RF_MASK;
351 344
}
352 345

  
353
void helper_cli(void)
346
void helper_cli(CPUX86State *env)
354 347
{
355 348
    env->eflags &= ~IF_MASK;
356 349
}
357 350

  
358
void helper_sti(void)
351
void helper_sti(CPUX86State *env)
359 352
{
360 353
    env->eflags |= IF_MASK;
361 354
}
362 355

  
363 356
#if 0
364 357
/* vm86plus instructions */
365
void helper_cli_vm(void)
358
void helper_cli_vm(CPUX86State *env)
366 359
{
367 360
    env->eflags &= ~VIF_MASK;
368 361
}
369 362

  
370
void helper_sti_vm(void)
363
void helper_sti_vm(CPUX86State *env)
371 364
{
372 365
    env->eflags |= VIF_MASK;
373 366
    if (env->eflags & VIP_MASK) {
......
376 369
}
377 370
#endif
378 371

  
379
void helper_set_inhibit_irq(void)
372
void helper_set_inhibit_irq(CPUX86State *env)
380 373
{
381 374
    env->hflags |= HF_INHIBIT_IRQ_MASK;
382 375
}
383 376

  
384
void helper_reset_inhibit_irq(void)
377
void helper_reset_inhibit_irq(CPUX86State *env)
385 378
{
386 379
    env->hflags &= ~HF_INHIBIT_IRQ_MASK;
387 380
}
b/target-i386/cc_helper_template.h
42 42

  
43 43
/* dynamic flags computation */
44 44

  
45
static int glue(compute_all_add, SUFFIX)(void)
45
static int glue(compute_all_add, SUFFIX)(CPUX86State *env)
46 46
{
47 47
    int cf, pf, af, zf, sf, of;
48 48
    target_long src1, src2;
......
58 58
    return cf | pf | af | zf | sf | of;
59 59
}
60 60

  
61
static int glue(compute_c_add, SUFFIX)(void)
61
static int glue(compute_c_add, SUFFIX)(CPUX86State *env)
62 62
{
63 63
    int cf;
64 64
    target_long src1;
......
68 68
    return cf;
69 69
}
70 70

  
71
static int glue(compute_all_adc, SUFFIX)(void)
71
static int glue(compute_all_adc, SUFFIX)(CPUX86State *env)
72 72
{
73 73
    int cf, pf, af, zf, sf, of;
74 74
    target_long src1, src2;
......
84 84
    return cf | pf | af | zf | sf | of;
85 85
}
86 86

  
87
static int glue(compute_c_adc, SUFFIX)(void)
87
static int glue(compute_c_adc, SUFFIX)(CPUX86State *env)
88 88
{
89 89
    int cf;
90 90
    target_long src1;
......
94 94
    return cf;
95 95
}
96 96

  
97
static int glue(compute_all_sub, SUFFIX)(void)
97
static int glue(compute_all_sub, SUFFIX)(CPUX86State *env)
98 98
{
99 99
    int cf, pf, af, zf, sf, of;
100 100
    target_long src1, src2;
......
110 110
    return cf | pf | af | zf | sf | of;
111 111
}
112 112

  
113
static int glue(compute_c_sub, SUFFIX)(void)
113
static int glue(compute_c_sub, SUFFIX)(CPUX86State *env)
114 114
{
115 115
    int cf;
116 116
    target_long src1, src2;
......
121 121
    return cf;
122 122
}
123 123

  
124
static int glue(compute_all_sbb, SUFFIX)(void)
124
static int glue(compute_all_sbb, SUFFIX)(CPUX86State *env)
125 125
{
126 126
    int cf, pf, af, zf, sf, of;
127 127
    target_long src1, src2;
......
137 137
    return cf | pf | af | zf | sf | of;
138 138
}
139 139

  
140
static int glue(compute_c_sbb, SUFFIX)(void)
140
static int glue(compute_c_sbb, SUFFIX)(CPUX86State *env)
141 141
{
142 142
    int cf;
143 143
    target_long src1, src2;
......
148 148
    return cf;
149 149
}
150 150

  
151
static int glue(compute_all_logic, SUFFIX)(void)
151
static int glue(compute_all_logic, SUFFIX)(CPUX86State *env)
152 152
{
153 153
    int cf, pf, af, zf, sf, of;
154 154

  
......
166 166
    return 0;
167 167
}
168 168

  
169
static int glue(compute_all_inc, SUFFIX)(void)
169
static int glue(compute_all_inc, SUFFIX)(CPUX86State *env)
170 170
{
171 171
    int cf, pf, af, zf, sf, of;
172 172
    target_long src1, src2;
......
183 183
}
184 184

  
185 185
#if DATA_BITS == 32
186
static int glue(compute_c_inc, SUFFIX)(void)
186
static int glue(compute_c_inc, SUFFIX)(CPUX86State *env)
187 187
{
188 188
    return CC_SRC;
189 189
}
190 190
#endif
191 191

  
192
static int glue(compute_all_dec, SUFFIX)(void)
192
static int glue(compute_all_dec, SUFFIX)(CPUX86State *env)
193 193
{
194 194
    int cf, pf, af, zf, sf, of;
195 195
    target_long src1, src2;
......
205 205
    return cf | pf | af | zf | sf | of;
206 206
}
207 207

  
208
static int glue(compute_all_shl, SUFFIX)(void)
208
static int glue(compute_all_shl, SUFFIX)(CPUX86State *env)
209 209
{
210 210
    int cf, pf, af, zf, sf, of;
211 211

  
......
219 219
    return cf | pf | af | zf | sf | of;
220 220
}
221 221

  
222
static int glue(compute_c_shl, SUFFIX)(void)
222
static int glue(compute_c_shl, SUFFIX)(CPUX86State *env)
223 223
{
224 224
    return (CC_SRC >> (DATA_BITS - 1)) & CC_C;
225 225
}
226 226

  
227 227
#if DATA_BITS == 32
228
static int glue(compute_c_sar, SUFFIX)(void)
228
static int glue(compute_c_sar, SUFFIX)(CPUX86State *env)
229 229
{
230 230
    return CC_SRC & 1;
231 231
}
232 232
#endif
233 233

  
234
static int glue(compute_all_sar, SUFFIX)(void)
234
static int glue(compute_all_sar, SUFFIX)(CPUX86State *env)
235 235
{
236 236
    int cf, pf, af, zf, sf, of;
237 237

  
......
246 246
}
247 247

  
248 248
#if DATA_BITS == 32
249
static int glue(compute_c_mul, SUFFIX)(void)
249
static int glue(compute_c_mul, SUFFIX)(CPUX86State *env)
250 250
{
251 251
    int cf;
252 252

  
......
257 257

  
258 258
/* NOTE: we compute the flags like the P4. On olders CPUs, only OF and
259 259
   CF are modified and it is slower to do that. */
260
static int glue(compute_all_mul, SUFFIX)(void)
260
static int glue(compute_all_mul, SUFFIX)(CPUX86State *env)
261 261
{
262 262
    int cf, pf, af, zf, sf, of;
263 263

  
b/target-i386/helper.h
1 1
#include "def-helper.h"
2 2

  
3
DEF_HELPER_FLAGS_1(cc_compute_all, TCG_CALL_PURE, i32, int)
4
DEF_HELPER_FLAGS_1(cc_compute_c, TCG_CALL_PURE, i32, int)
3
DEF_HELPER_FLAGS_2(cc_compute_all, TCG_CALL_PURE, i32, env, int)
4
DEF_HELPER_FLAGS_2(cc_compute_c, TCG_CALL_PURE, i32, env, int)
5 5

  
6 6
DEF_HELPER_0(lock, void)
7 7
DEF_HELPER_0(unlock, void)
8
DEF_HELPER_2(write_eflags, void, tl, i32)
9
DEF_HELPER_0(read_eflags, tl)
8
DEF_HELPER_3(write_eflags, void, env, tl, i32)
9
DEF_HELPER_1(read_eflags, tl, env)
10 10
DEF_HELPER_1(divb_AL, void, tl)
11 11
DEF_HELPER_1(idivb_AL, void, tl)
12 12
DEF_HELPER_1(divw_AX, void, tl)
......
44 44
DEF_HELPER_1(read_crN, tl, int)
45 45
DEF_HELPER_2(write_crN, void, int, tl)
46 46
DEF_HELPER_1(lmsw, void, tl)
47
DEF_HELPER_0(clts, void)
47
DEF_HELPER_1(clts, void, env)
48 48
DEF_HELPER_2(movl_drN_T0, void, int, tl)
49 49
DEF_HELPER_1(invlpg, void, tl)
50 50

  
......
62 62
DEF_HELPER_1(monitor, void, tl)
63 63
DEF_HELPER_1(mwait, void, int)
64 64
DEF_HELPER_0(debug, void)
65
DEF_HELPER_0(reset_rf, void)
65
DEF_HELPER_1(reset_rf, void, env)
66 66
DEF_HELPER_3(raise_interrupt, void, env, int, int)
67 67
DEF_HELPER_2(raise_exception, void, env, int)
68
DEF_HELPER_0(cli, void)
69
DEF_HELPER_0(sti, void)
70
DEF_HELPER_0(set_inhibit_irq, void)
71
DEF_HELPER_0(reset_inhibit_irq, void)
68
DEF_HELPER_1(cli, void, env)
69
DEF_HELPER_1(sti, void, env)
70
DEF_HELPER_1(set_inhibit_irq, void, env)
71
DEF_HELPER_1(reset_inhibit_irq, void, env)
72 72
DEF_HELPER_2(boundw, void, tl, int)
73 73
DEF_HELPER_2(boundl, void, tl, int)
74 74
DEF_HELPER_0(rsm, void)
b/target-i386/int_helper.c
185 185
    int al, ah, af;
186 186
    int eflags;
187 187

  
188
    eflags = helper_cc_compute_all(CC_OP);
188
    eflags = cpu_cc_compute_all(env, CC_OP);
189 189
    af = eflags & CC_A;
190 190
    al = EAX & 0xff;
191 191
    ah = (EAX >> 8) & 0xff;
......
209 209
    int al, ah, af;
210 210
    int eflags;
211 211

  
212
    eflags = helper_cc_compute_all(CC_OP);
212
    eflags = cpu_cc_compute_all(env, CC_OP);
213 213
    af = eflags & CC_A;
214 214
    al = EAX & 0xff;
215 215
    ah = (EAX >> 8) & 0xff;
......
232 232
    int old_al, al, af, cf;
233 233
    int eflags;
234 234

  
235
    eflags = helper_cc_compute_all(CC_OP);
235
    eflags = cpu_cc_compute_all(env, CC_OP);
236 236
    cf = eflags & CC_C;
237 237
    af = eflags & CC_A;
238 238
    old_al = al = EAX & 0xff;
......
259 259
    int al, al1, af, cf;
260 260
    int eflags;
261 261

  
262
    eflags = helper_cc_compute_all(CC_OP);
262
    eflags = cpu_cc_compute_all(env, CC_OP);
263 263
    cf = eflags & CC_C;
264 264
    af = eflags & CC_A;
265 265
    al = EAX & 0xff;
b/target-i386/mem_helper.c
44 44
    uint64_t d;
45 45
    int eflags;
46 46

  
47
    eflags = helper_cc_compute_all(CC_OP);
47
    eflags = cpu_cc_compute_all(env, CC_OP);
48 48
    d = ldq(a0);
49 49
    if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) {
50 50
        stq(a0, ((uint64_t)ECX << 32) | (uint32_t)EBX);
......
68 68
    if ((a0 & 0xf) != 0) {
69 69
        raise_exception(env, EXCP0D_GPF);
70 70
    }
71
    eflags = helper_cc_compute_all(CC_OP);
71
    eflags = cpu_cc_compute_all(env, CC_OP);
72 72
    d0 = ldq(a0);
73 73
    d1 = ldq(a0 + 8);
74 74
    if (d0 == EAX && d1 == EDX) {
b/target-i386/misc_helper.c
102 102
{
103 103
    int eflags;
104 104

  
105
    eflags = helper_cc_compute_all(CC_OP);
105
    eflags = cpu_cc_compute_all(env, CC_OP);
106 106
    if (eflags & CC_O) {
107 107
        raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
108 108
    }
b/target-i386/seg_helper.c
2294 2294
    int rpl, dpl, cpl, type;
2295 2295

  
2296 2296
    selector = selector1 & 0xffff;
2297
    eflags = helper_cc_compute_all(CC_OP);
2297
    eflags = cpu_cc_compute_all(env, CC_OP);
2298 2298
    if ((selector & 0xfffc) == 0) {
2299 2299
        goto fail;
2300 2300
    }
......
2341 2341
    int rpl, dpl, cpl, type;
2342 2342

  
2343 2343
    selector = selector1 & 0xffff;
2344
    eflags = helper_cc_compute_all(CC_OP);
2344
    eflags = cpu_cc_compute_all(env, CC_OP);
2345 2345
    if ((selector & 0xfffc) == 0) {
2346 2346
        goto fail;
2347 2347
    }
......
2390 2390
    int rpl, dpl, cpl;
2391 2391

  
2392 2392
    selector = selector1 & 0xffff;
2393
    eflags = helper_cc_compute_all(CC_OP);
2393
    eflags = cpu_cc_compute_all(env, CC_OP);
2394 2394
    if ((selector & 0xfffc) == 0) {
2395 2395
        goto fail;
2396 2396
    }
......
2428 2428
    int rpl, dpl, cpl;
2429 2429

  
2430 2430
    selector = selector1 & 0xffff;
2431
    eflags = helper_cc_compute_all(CC_OP);
2431
    eflags = cpu_cc_compute_all(env, CC_OP);
2432 2432
    if ((selector & 0xfffc) == 0) {
2433 2433
        goto fail;
2434 2434
    }
b/target-i386/shift_helper_template.h
54 54
    count = rclb_table[count];
55 55
#endif
56 56
    if (count) {
57
        eflags = helper_cc_compute_all(CC_OP);
57
        eflags = helper_cc_compute_all(env, CC_OP);
58 58
        t0 &= DATA_MASK;
59 59
        src = t0;
60 60
        res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1));
......
84 84
    count = rclb_table[count];
85 85
#endif
86 86
    if (count) {
87
        eflags = helper_cc_compute_all(CC_OP);
87
        eflags = helper_cc_compute_all(env, CC_OP);
88 88
        t0 &= DATA_MASK;
89 89
        src = t0;
90 90
        res = (t0 >> count) |
b/target-i386/translate.c
811 811
/* compute eflags.C to reg */
812 812
static void gen_compute_eflags_c(TCGv reg)
813 813
{
814
    gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_cc_op);
814
    gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_env, cpu_cc_op);
815 815
    tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
816 816
}
817 817

  
818 818
/* compute all eflags to cc_src */
819 819
static void gen_compute_eflags(TCGv reg)
820 820
{
821
    gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_cc_op);
821
    gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_env, cpu_cc_op);
822 822
    tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
823 823
}
824 824

  
......
2730 2730
    if (s->cc_op != CC_OP_DYNAMIC)
2731 2731
        gen_op_set_cc_op(s->cc_op);
2732 2732
    if (s->tb->flags & HF_INHIBIT_IRQ_MASK) {
2733
        gen_helper_reset_inhibit_irq();
2733
        gen_helper_reset_inhibit_irq(cpu_env);
2734 2734
    }
2735 2735
    if (s->tb->flags & HF_RF_MASK) {
2736
        gen_helper_reset_rf();
2736
        gen_helper_reset_rf(cpu_env);
2737 2737
    }
2738 2738
    if (s->singlestep_enabled) {
2739 2739
        gen_helper_debug();
......
5143 5143
            /* If several instructions disable interrupts, only the
5144 5144
               _first_ does it */
5145 5145
            if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
5146
                gen_helper_set_inhibit_irq();
5146
                gen_helper_set_inhibit_irq(cpu_env);
5147 5147
            s->tf = 0;
5148 5148
        }
5149 5149
        if (s->is_jmp) {
......
5219 5219
            /* If several instructions disable interrupts, only the
5220 5220
               _first_ does it */
5221 5221
            if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
5222
                gen_helper_set_inhibit_irq();
5222
                gen_helper_set_inhibit_irq(cpu_env);
5223 5223
            s->tf = 0;
5224 5224
        }
5225 5225
        if (s->is_jmp) {
......
6475 6475
        } else {
6476 6476
            if (s->cc_op != CC_OP_DYNAMIC)
6477 6477
                gen_op_set_cc_op(s->cc_op);
6478
            gen_helper_read_eflags(cpu_T[0]);
6478
            gen_helper_read_eflags(cpu_T[0], cpu_env);
6479 6479
            gen_push_T0(s);
6480 6480
        }
6481 6481
        break;
......
6487 6487
            gen_pop_T0(s);
6488 6488
            if (s->cpl == 0) {
6489 6489
                if (s->dflag) {
6490
                    gen_helper_write_eflags(cpu_T[0],
6491
                                       tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK)));
6490
                    gen_helper_write_eflags(cpu_env, cpu_T[0],
6491
                                            tcg_const_i32((TF_MASK | AC_MASK |
6492
                                                           ID_MASK | NT_MASK |
6493
                                                           IF_MASK |
6494
                                                           IOPL_MASK)));
6492 6495
                } else {
6493
                    gen_helper_write_eflags(cpu_T[0],
6494
                                       tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff));
6496
                    gen_helper_write_eflags(cpu_env, cpu_T[0],
6497
                                            tcg_const_i32((TF_MASK | AC_MASK |
6498
                                                           ID_MASK | NT_MASK |
6499
                                                           IF_MASK | IOPL_MASK)
6500
                                                          & 0xffff));
6495 6501
                }
6496 6502
            } else {
6497 6503
                if (s->cpl <= s->iopl) {
6498 6504
                    if (s->dflag) {
6499
                        gen_helper_write_eflags(cpu_T[0],
6500
                                           tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK)));
6505
                        gen_helper_write_eflags(cpu_env, cpu_T[0],
6506
                                                tcg_const_i32((TF_MASK |
6507
                                                               AC_MASK |
6508
                                                               ID_MASK |
6509
                                                               NT_MASK |
6510
                                                               IF_MASK)));
6501 6511
                    } else {
6502
                        gen_helper_write_eflags(cpu_T[0],
6503
                                           tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff));
6512
                        gen_helper_write_eflags(cpu_env, cpu_T[0],
6513
                                                tcg_const_i32((TF_MASK |
6514
                                                               AC_MASK |
6515
                                                               ID_MASK |
6516
                                                               NT_MASK |
6517
                                                               IF_MASK)
6518
                                                              & 0xffff));
6504 6519
                    }
6505 6520
                } else {
6506 6521
                    if (s->dflag) {
6507
                        gen_helper_write_eflags(cpu_T[0],
6508
                                           tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK)));
6522
                        gen_helper_write_eflags(cpu_env, cpu_T[0],
6523
                                           tcg_const_i32((TF_MASK | AC_MASK |
6524
                                                          ID_MASK | NT_MASK)));
6509 6525
                    } else {
6510
                        gen_helper_write_eflags(cpu_T[0],
6511
                                           tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff));
6526
                        gen_helper_write_eflags(cpu_env, cpu_T[0],
6527
                                           tcg_const_i32((TF_MASK | AC_MASK |
6528
                                                          ID_MASK | NT_MASK)
6529
                                                         & 0xffff));
6512 6530
                    }
6513 6531
                }
6514 6532
            }
......
6814 6832
    case 0xfa: /* cli */
6815 6833
        if (!s->vm86) {
6816 6834
            if (s->cpl <= s->iopl) {
6817
                gen_helper_cli();
6835
                gen_helper_cli(cpu_env);
6818 6836
            } else {
6819 6837
                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
6820 6838
            }
6821 6839
        } else {
6822 6840
            if (s->iopl == 3) {
6823
                gen_helper_cli();
6841
                gen_helper_cli(cpu_env);
6824 6842
            } else {
6825 6843
                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
6826 6844
            }
......
6830 6848
        if (!s->vm86) {
6831 6849
            if (s->cpl <= s->iopl) {
6832 6850
            gen_sti:
6833
                gen_helper_sti();
6851
                gen_helper_sti(cpu_env);
6834 6852
                /* interruptions are enabled only the first insn after sti */
6835 6853
                /* If several instructions disable interrupts, only the
6836 6854
                   _first_ does it */
6837 6855
                if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
6838
                    gen_helper_set_inhibit_irq();
6856
                    gen_helper_set_inhibit_irq(cpu_env);
6839 6857
                /* give a chance to handle pending irqs */
6840 6858
                gen_jmp_im(s->pc - s->cs_base);
6841 6859
                gen_eob(s);
......
7578 7596
            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
7579 7597
        } else {
7580 7598
            gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
7581
            gen_helper_clts();
7599
            gen_helper_clts(cpu_env);
7582 7600
            /* abort block because static cpu state changed */
7583 7601
            gen_jmp_im(s->pc - s->cs_base);
7584 7602
            gen_eob(s);

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