root / target-i386 / ops_sse_header.h @ f0da3757
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| 1 | 5af45186 | bellard | /*
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| 2 | 222a3336 | balrog | * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
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| 3 | 5af45186 | bellard | *
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| 4 | 5af45186 | bellard | * Copyright (c) 2005 Fabrice Bellard
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| 5 | 5af45186 | bellard | *
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| 6 | 5af45186 | bellard | * This library is free software; you can redistribute it and/or
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| 7 | 5af45186 | bellard | * modify it under the terms of the GNU Lesser General Public
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| 8 | 5af45186 | bellard | * License as published by the Free Software Foundation; either
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| 9 | 5af45186 | bellard | * version 2 of the License, or (at your option) any later version.
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| 10 | 5af45186 | bellard | *
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| 11 | 5af45186 | bellard | * This library is distributed in the hope that it will be useful,
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| 12 | 5af45186 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | 5af45186 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 14 | 5af45186 | bellard | * Lesser General Public License for more details.
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| 15 | 5af45186 | bellard | *
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| 16 | 5af45186 | bellard | * You should have received a copy of the GNU Lesser General Public
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| 17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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| 18 | 5af45186 | bellard | */
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| 19 | 5af45186 | bellard | #if SHIFT == 0 |
| 20 | 5af45186 | bellard | #define Reg MMXReg
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| 21 | 5af45186 | bellard | #define SUFFIX _mmx
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| 22 | 5af45186 | bellard | #else
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| 23 | 5af45186 | bellard | #define Reg XMMReg
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| 24 | 5af45186 | bellard | #define SUFFIX _xmm
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| 25 | 5af45186 | bellard | #endif
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| 26 | 5af45186 | bellard | |
| 27 | a7812ae4 | pbrook | #define dh_alias_Reg ptr
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| 28 | a7812ae4 | pbrook | #define dh_alias_XMMReg ptr
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| 29 | a7812ae4 | pbrook | #define dh_alias_MMXReg ptr
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| 30 | a7812ae4 | pbrook | #define dh_ctype_Reg Reg *
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| 31 | a7812ae4 | pbrook | #define dh_ctype_XMMReg XMMReg *
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| 32 | a7812ae4 | pbrook | #define dh_ctype_MMXReg MMXReg *
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| 33 | 2bece2c8 | Richard Henderson | #define dh_is_signed_Reg dh_is_signed_ptr
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| 34 | 2bece2c8 | Richard Henderson | #define dh_is_signed_XMMReg dh_is_signed_ptr
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| 35 | 2bece2c8 | Richard Henderson | #define dh_is_signed_MMXReg dh_is_signed_ptr
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| 36 | a7812ae4 | pbrook | |
| 37 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psrlw, SUFFIX), void, env, Reg, Reg)
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| 38 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psraw, SUFFIX), void, env, Reg, Reg)
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| 39 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psllw, SUFFIX), void, env, Reg, Reg)
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| 40 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psrld, SUFFIX), void, env, Reg, Reg)
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| 41 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psrad, SUFFIX), void, env, Reg, Reg)
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| 42 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pslld, SUFFIX), void, env, Reg, Reg)
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| 43 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psrlq, SUFFIX), void, env, Reg, Reg)
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| 44 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psllq, SUFFIX), void, env, Reg, Reg)
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| 45 | 5af45186 | bellard | |
| 46 | 5af45186 | bellard | #if SHIFT == 1 |
| 47 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psrldq, SUFFIX), void, env, Reg, Reg)
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| 48 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
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| 49 | 5af45186 | bellard | #endif
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| 50 | 5af45186 | bellard | |
| 51 | 5af45186 | bellard | #define SSE_HELPER_B(name, F)\
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| 52 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
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| 53 | 5af45186 | bellard | |
| 54 | 5af45186 | bellard | #define SSE_HELPER_W(name, F)\
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| 55 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
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| 56 | 5af45186 | bellard | |
| 57 | 5af45186 | bellard | #define SSE_HELPER_L(name, F)\
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| 58 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
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| 59 | 5af45186 | bellard | |
| 60 | 5af45186 | bellard | #define SSE_HELPER_Q(name, F)\
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| 61 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
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| 62 | 5af45186 | bellard | |
| 63 | a7812ae4 | pbrook | SSE_HELPER_B(paddb, FADD) |
| 64 | a7812ae4 | pbrook | SSE_HELPER_W(paddw, FADD) |
| 65 | a7812ae4 | pbrook | SSE_HELPER_L(paddl, FADD) |
| 66 | a7812ae4 | pbrook | SSE_HELPER_Q(paddq, FADD) |
| 67 | 5af45186 | bellard | |
| 68 | a7812ae4 | pbrook | SSE_HELPER_B(psubb, FSUB) |
| 69 | a7812ae4 | pbrook | SSE_HELPER_W(psubw, FSUB) |
| 70 | a7812ae4 | pbrook | SSE_HELPER_L(psubl, FSUB) |
| 71 | a7812ae4 | pbrook | SSE_HELPER_Q(psubq, FSUB) |
| 72 | 5af45186 | bellard | |
| 73 | a7812ae4 | pbrook | SSE_HELPER_B(paddusb, FADDUB) |
| 74 | a7812ae4 | pbrook | SSE_HELPER_B(paddsb, FADDSB) |
| 75 | a7812ae4 | pbrook | SSE_HELPER_B(psubusb, FSUBUB) |
| 76 | a7812ae4 | pbrook | SSE_HELPER_B(psubsb, FSUBSB) |
| 77 | 5af45186 | bellard | |
| 78 | a7812ae4 | pbrook | SSE_HELPER_W(paddusw, FADDUW) |
| 79 | a7812ae4 | pbrook | SSE_HELPER_W(paddsw, FADDSW) |
| 80 | a7812ae4 | pbrook | SSE_HELPER_W(psubusw, FSUBUW) |
| 81 | a7812ae4 | pbrook | SSE_HELPER_W(psubsw, FSUBSW) |
| 82 | 5af45186 | bellard | |
| 83 | a7812ae4 | pbrook | SSE_HELPER_B(pminub, FMINUB) |
| 84 | a7812ae4 | pbrook | SSE_HELPER_B(pmaxub, FMAXUB) |
| 85 | 5af45186 | bellard | |
| 86 | a7812ae4 | pbrook | SSE_HELPER_W(pminsw, FMINSW) |
| 87 | a7812ae4 | pbrook | SSE_HELPER_W(pmaxsw, FMAXSW) |
| 88 | 5af45186 | bellard | |
| 89 | a7812ae4 | pbrook | SSE_HELPER_Q(pand, FAND) |
| 90 | a7812ae4 | pbrook | SSE_HELPER_Q(pandn, FANDN) |
| 91 | a7812ae4 | pbrook | SSE_HELPER_Q(por, FOR) |
| 92 | a7812ae4 | pbrook | SSE_HELPER_Q(pxor, FXOR) |
| 93 | 5af45186 | bellard | |
| 94 | a7812ae4 | pbrook | SSE_HELPER_B(pcmpgtb, FCMPGTB) |
| 95 | a7812ae4 | pbrook | SSE_HELPER_W(pcmpgtw, FCMPGTW) |
| 96 | a7812ae4 | pbrook | SSE_HELPER_L(pcmpgtl, FCMPGTL) |
| 97 | 5af45186 | bellard | |
| 98 | a7812ae4 | pbrook | SSE_HELPER_B(pcmpeqb, FCMPEQ) |
| 99 | a7812ae4 | pbrook | SSE_HELPER_W(pcmpeqw, FCMPEQ) |
| 100 | a7812ae4 | pbrook | SSE_HELPER_L(pcmpeql, FCMPEQ) |
| 101 | 5af45186 | bellard | |
| 102 | a7812ae4 | pbrook | SSE_HELPER_W(pmullw, FMULLW) |
| 103 | 5af45186 | bellard | #if SHIFT == 0 |
| 104 | a7812ae4 | pbrook | SSE_HELPER_W(pmulhrw, FMULHRW) |
| 105 | 5af45186 | bellard | #endif
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| 106 | a7812ae4 | pbrook | SSE_HELPER_W(pmulhuw, FMULHUW) |
| 107 | a7812ae4 | pbrook | SSE_HELPER_W(pmulhw, FMULHW) |
| 108 | 5af45186 | bellard | |
| 109 | a7812ae4 | pbrook | SSE_HELPER_B(pavgb, FAVG) |
| 110 | a7812ae4 | pbrook | SSE_HELPER_W(pavgw, FAVG) |
| 111 | 5af45186 | bellard | |
| 112 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmuludq, SUFFIX), void, env, Reg, Reg)
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| 113 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmaddwd, SUFFIX), void, env, Reg, Reg)
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| 114 | 5af45186 | bellard | |
| 115 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psadbw, SUFFIX), void, env, Reg, Reg)
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| 116 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(maskmov, SUFFIX), void, env, Reg, Reg, tl)
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| 117 | a7812ae4 | pbrook | DEF_HELPER_2(glue(movl_mm_T0, SUFFIX), void, Reg, i32)
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| 118 | 5af45186 | bellard | #ifdef TARGET_X86_64
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| 119 | a7812ae4 | pbrook | DEF_HELPER_2(glue(movq_mm_T0, SUFFIX), void, Reg, i64)
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| 120 | 5af45186 | bellard | #endif
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| 121 | 5af45186 | bellard | |
| 122 | 5af45186 | bellard | #if SHIFT == 0 |
| 123 | a7812ae4 | pbrook | DEF_HELPER_3(glue(pshufw, SUFFIX), void, Reg, Reg, int) |
| 124 | 5af45186 | bellard | #else
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| 125 | a7812ae4 | pbrook | DEF_HELPER_3(shufps, void, Reg, Reg, int) |
| 126 | a7812ae4 | pbrook | DEF_HELPER_3(shufpd, void, Reg, Reg, int) |
| 127 | a7812ae4 | pbrook | DEF_HELPER_3(glue(pshufd, SUFFIX), void, Reg, Reg, int) |
| 128 | a7812ae4 | pbrook | DEF_HELPER_3(glue(pshuflw, SUFFIX), void, Reg, Reg, int) |
| 129 | a7812ae4 | pbrook | DEF_HELPER_3(glue(pshufhw, SUFFIX), void, Reg, Reg, int) |
| 130 | 5af45186 | bellard | #endif
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| 131 | 5af45186 | bellard | |
| 132 | 5af45186 | bellard | #if SHIFT == 1 |
| 133 | 5af45186 | bellard | /* FPU ops */
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| 134 | 5af45186 | bellard | /* XXX: not accurate */
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| 135 | 5af45186 | bellard | |
| 136 | d3eb5eae | Blue Swirl | #define SSE_HELPER_S(name, F) \
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| 137 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## ps, void, env, Reg, Reg) \ |
| 138 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## ss, void, env, Reg, Reg) \ |
| 139 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## pd, void, env, Reg, Reg) \ |
| 140 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## sd, void, env, Reg, Reg) |
| 141 | 437a88a5 | bellard | |
| 142 | 437a88a5 | bellard | SSE_HELPER_S(add, FPU_ADD) |
| 143 | 437a88a5 | bellard | SSE_HELPER_S(sub, FPU_SUB) |
| 144 | 437a88a5 | bellard | SSE_HELPER_S(mul, FPU_MUL) |
| 145 | 437a88a5 | bellard | SSE_HELPER_S(div, FPU_DIV) |
| 146 | 437a88a5 | bellard | SSE_HELPER_S(min, FPU_MIN) |
| 147 | 437a88a5 | bellard | SSE_HELPER_S(max, FPU_MAX) |
| 148 | 437a88a5 | bellard | SSE_HELPER_S(sqrt, FPU_SQRT) |
| 149 | 437a88a5 | bellard | |
| 150 | 437a88a5 | bellard | |
| 151 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtps2pd, void, env, Reg, Reg)
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| 152 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtpd2ps, void, env, Reg, Reg)
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| 153 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtss2sd, void, env, Reg, Reg)
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| 154 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtsd2ss, void, env, Reg, Reg)
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| 155 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtdq2ps, void, env, Reg, Reg)
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| 156 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtdq2pd, void, env, Reg, Reg)
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| 157 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtpi2ps, void, env, XMMReg, MMXReg)
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| 158 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtpi2pd, void, env, XMMReg, MMXReg)
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| 159 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtsi2ss, void, env, XMMReg, i32)
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| 160 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtsi2sd, void, env, XMMReg, i32)
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| 161 | 5af45186 | bellard | |
| 162 | 5af45186 | bellard | #ifdef TARGET_X86_64
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| 163 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtsq2ss, void, env, XMMReg, i64)
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| 164 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtsq2sd, void, env, XMMReg, i64)
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| 165 | 5af45186 | bellard | #endif
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| 166 | 5af45186 | bellard | |
| 167 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtps2dq, void, env, XMMReg, XMMReg)
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| 168 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtpd2dq, void, env, XMMReg, XMMReg)
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| 169 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtps2pi, void, env, MMXReg, XMMReg)
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| 170 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvtpd2pi, void, env, MMXReg, XMMReg)
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| 171 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvtss2si, s32, env, XMMReg) |
| 172 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvtsd2si, s32, env, XMMReg) |
| 173 | 5af45186 | bellard | #ifdef TARGET_X86_64
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| 174 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvtss2sq, s64, env, XMMReg) |
| 175 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvtsd2sq, s64, env, XMMReg) |
| 176 | 5af45186 | bellard | #endif
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| 177 | 5af45186 | bellard | |
| 178 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvttps2dq, void, env, XMMReg, XMMReg)
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| 179 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvttpd2dq, void, env, XMMReg, XMMReg)
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| 180 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvttps2pi, void, env, MMXReg, XMMReg)
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| 181 | d3eb5eae | Blue Swirl | DEF_HELPER_3(cvttpd2pi, void, env, MMXReg, XMMReg)
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| 182 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvttss2si, s32, env, XMMReg) |
| 183 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvttsd2si, s32, env, XMMReg) |
| 184 | 5af45186 | bellard | #ifdef TARGET_X86_64
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| 185 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvttss2sq, s64, env, XMMReg) |
| 186 | d3eb5eae | Blue Swirl | DEF_HELPER_2(cvttsd2sq, s64, env, XMMReg) |
| 187 | 5af45186 | bellard | #endif
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| 188 | 5af45186 | bellard | |
| 189 | d3eb5eae | Blue Swirl | DEF_HELPER_3(rsqrtps, void, env, XMMReg, XMMReg)
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| 190 | d3eb5eae | Blue Swirl | DEF_HELPER_3(rsqrtss, void, env, XMMReg, XMMReg)
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| 191 | d3eb5eae | Blue Swirl | DEF_HELPER_3(rcpps, void, env, XMMReg, XMMReg)
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| 192 | d3eb5eae | Blue Swirl | DEF_HELPER_3(rcpss, void, env, XMMReg, XMMReg)
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| 193 | d3eb5eae | Blue Swirl | DEF_HELPER_3(extrq_r, void, env, XMMReg, XMMReg)
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| 194 | d3eb5eae | Blue Swirl | DEF_HELPER_4(extrq_i, void, env, XMMReg, int, int) |
| 195 | d3eb5eae | Blue Swirl | DEF_HELPER_3(insertq_r, void, env, XMMReg, XMMReg)
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| 196 | d3eb5eae | Blue Swirl | DEF_HELPER_4(insertq_i, void, env, XMMReg, int, int) |
| 197 | d3eb5eae | Blue Swirl | DEF_HELPER_3(haddps, void, env, XMMReg, XMMReg)
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| 198 | d3eb5eae | Blue Swirl | DEF_HELPER_3(haddpd, void, env, XMMReg, XMMReg)
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| 199 | d3eb5eae | Blue Swirl | DEF_HELPER_3(hsubps, void, env, XMMReg, XMMReg)
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| 200 | d3eb5eae | Blue Swirl | DEF_HELPER_3(hsubpd, void, env, XMMReg, XMMReg)
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| 201 | d3eb5eae | Blue Swirl | DEF_HELPER_3(addsubps, void, env, XMMReg, XMMReg)
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| 202 | d3eb5eae | Blue Swirl | DEF_HELPER_3(addsubpd, void, env, XMMReg, XMMReg)
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| 203 | d3eb5eae | Blue Swirl | |
| 204 | d3eb5eae | Blue Swirl | #define SSE_HELPER_CMP(name, F) \
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| 205 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## ps, void, env, Reg, Reg) \ |
| 206 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## ss, void, env, Reg, Reg) \ |
| 207 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## pd, void, env, Reg, Reg) \ |
| 208 | d3eb5eae | Blue Swirl | DEF_HELPER_3(name ## sd, void, env, Reg, Reg) |
| 209 | 437a88a5 | bellard | |
| 210 | 437a88a5 | bellard | SSE_HELPER_CMP(cmpeq, FPU_CMPEQ) |
| 211 | 437a88a5 | bellard | SSE_HELPER_CMP(cmplt, FPU_CMPLT) |
| 212 | 437a88a5 | bellard | SSE_HELPER_CMP(cmple, FPU_CMPLE) |
| 213 | 437a88a5 | bellard | SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD) |
| 214 | 437a88a5 | bellard | SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ) |
| 215 | 437a88a5 | bellard | SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT) |
| 216 | 437a88a5 | bellard | SSE_HELPER_CMP(cmpnle, FPU_CMPNLE) |
| 217 | 437a88a5 | bellard | SSE_HELPER_CMP(cmpord, FPU_CMPORD) |
| 218 | 437a88a5 | bellard | |
| 219 | d3eb5eae | Blue Swirl | DEF_HELPER_3(ucomiss, void, env, Reg, Reg)
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| 220 | d3eb5eae | Blue Swirl | DEF_HELPER_3(comiss, void, env, Reg, Reg)
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| 221 | d3eb5eae | Blue Swirl | DEF_HELPER_3(ucomisd, void, env, Reg, Reg)
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| 222 | d3eb5eae | Blue Swirl | DEF_HELPER_3(comisd, void, env, Reg, Reg)
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| 223 | d3eb5eae | Blue Swirl | DEF_HELPER_2(movmskps, i32, env, Reg) |
| 224 | d3eb5eae | Blue Swirl | DEF_HELPER_2(movmskpd, i32, env, Reg) |
| 225 | 5af45186 | bellard | #endif
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| 226 | 5af45186 | bellard | |
| 227 | d3eb5eae | Blue Swirl | DEF_HELPER_2(glue(pmovmskb, SUFFIX), i32, env, Reg) |
| 228 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(packsswb, SUFFIX), void, env, Reg, Reg)
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| 229 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(packuswb, SUFFIX), void, env, Reg, Reg)
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| 230 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(packssdw, SUFFIX), void, env, Reg, Reg)
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| 231 | d3eb5eae | Blue Swirl | #define UNPCK_OP(base_name, base) \
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| 232 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(punpck ## base_name ## bw, SUFFIX), void, env, Reg, Reg) \ |
| 233 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(punpck ## base_name ## wd, SUFFIX), void, env, Reg, Reg) \ |
| 234 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(punpck ## base_name ## dq, SUFFIX), void, env, Reg, Reg) |
| 235 | 5af45186 | bellard | |
| 236 | 437a88a5 | bellard | UNPCK_OP(l, 0)
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| 237 | 437a88a5 | bellard | UNPCK_OP(h, 1)
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| 238 | 5af45186 | bellard | |
| 239 | 5af45186 | bellard | #if SHIFT == 1 |
| 240 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(punpcklqdq, SUFFIX), void, env, Reg, Reg)
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| 241 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(punpckhqdq, SUFFIX), void, env, Reg, Reg)
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| 242 | 5af45186 | bellard | #endif
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| 243 | 5af45186 | bellard | |
| 244 | 5af45186 | bellard | /* 3DNow! float ops */
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| 245 | 5af45186 | bellard | #if SHIFT == 0 |
| 246 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pi2fd, void, env, MMXReg, MMXReg)
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| 247 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pi2fw, void, env, MMXReg, MMXReg)
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| 248 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pf2id, void, env, MMXReg, MMXReg)
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| 249 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pf2iw, void, env, MMXReg, MMXReg)
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| 250 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfacc, void, env, MMXReg, MMXReg)
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| 251 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfadd, void, env, MMXReg, MMXReg)
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| 252 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfcmpeq, void, env, MMXReg, MMXReg)
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| 253 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfcmpge, void, env, MMXReg, MMXReg)
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| 254 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfcmpgt, void, env, MMXReg, MMXReg)
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| 255 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfmax, void, env, MMXReg, MMXReg)
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| 256 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfmin, void, env, MMXReg, MMXReg)
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| 257 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfmul, void, env, MMXReg, MMXReg)
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| 258 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfnacc, void, env, MMXReg, MMXReg)
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| 259 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfpnacc, void, env, MMXReg, MMXReg)
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| 260 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfrcp, void, env, MMXReg, MMXReg)
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| 261 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfrsqrt, void, env, MMXReg, MMXReg)
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| 262 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfsub, void, env, MMXReg, MMXReg)
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| 263 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pfsubr, void, env, MMXReg, MMXReg)
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| 264 | d3eb5eae | Blue Swirl | DEF_HELPER_3(pswapd, void, env, MMXReg, MMXReg)
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| 265 | 5af45186 | bellard | #endif
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| 266 | 5af45186 | bellard | |
| 267 | 4242b1bd | balrog | /* SSSE3 op helpers */
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| 268 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(phaddw, SUFFIX), void, env, Reg, Reg)
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| 269 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(phaddd, SUFFIX), void, env, Reg, Reg)
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| 270 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(phaddsw, SUFFIX), void, env, Reg, Reg)
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| 271 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(phsubw, SUFFIX), void, env, Reg, Reg)
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| 272 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(phsubd, SUFFIX), void, env, Reg, Reg)
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| 273 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(phsubsw, SUFFIX), void, env, Reg, Reg)
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| 274 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pabsb, SUFFIX), void, env, Reg, Reg)
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| 275 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pabsw, SUFFIX), void, env, Reg, Reg)
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| 276 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pabsd, SUFFIX), void, env, Reg, Reg)
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| 277 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmaddubsw, SUFFIX), void, env, Reg, Reg)
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| 278 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmulhrsw, SUFFIX), void, env, Reg, Reg)
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| 279 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pshufb, SUFFIX), void, env, Reg, Reg)
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| 280 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psignb, SUFFIX), void, env, Reg, Reg)
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| 281 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psignw, SUFFIX), void, env, Reg, Reg)
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| 282 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(psignd, SUFFIX), void, env, Reg, Reg)
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| 283 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(palignr, SUFFIX), void, env, Reg, Reg, s32)
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| 284 | 4242b1bd | balrog | |
| 285 | 222a3336 | balrog | /* SSE4.1 op helpers */
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| 286 | 222a3336 | balrog | #if SHIFT == 1 |
| 287 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pblendvb, SUFFIX), void, env, Reg, Reg)
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| 288 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(blendvps, SUFFIX), void, env, Reg, Reg)
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| 289 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(blendvpd, SUFFIX), void, env, Reg, Reg)
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| 290 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(ptest, SUFFIX), void, env, Reg, Reg)
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| 291 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovsxbw, SUFFIX), void, env, Reg, Reg)
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| 292 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovsxbd, SUFFIX), void, env, Reg, Reg)
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| 293 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovsxbq, SUFFIX), void, env, Reg, Reg)
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| 294 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovsxwd, SUFFIX), void, env, Reg, Reg)
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| 295 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovsxwq, SUFFIX), void, env, Reg, Reg)
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| 296 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovsxdq, SUFFIX), void, env, Reg, Reg)
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| 297 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovzxbw, SUFFIX), void, env, Reg, Reg)
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| 298 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovzxbd, SUFFIX), void, env, Reg, Reg)
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| 299 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovzxbq, SUFFIX), void, env, Reg, Reg)
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| 300 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovzxwd, SUFFIX), void, env, Reg, Reg)
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| 301 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovzxwq, SUFFIX), void, env, Reg, Reg)
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| 302 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmovzxdq, SUFFIX), void, env, Reg, Reg)
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| 303 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmuldq, SUFFIX), void, env, Reg, Reg)
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| 304 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pcmpeqq, SUFFIX), void, env, Reg, Reg)
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| 305 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(packusdw, SUFFIX), void, env, Reg, Reg)
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| 306 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pminsb, SUFFIX), void, env, Reg, Reg)
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| 307 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pminsd, SUFFIX), void, env, Reg, Reg)
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| 308 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pminuw, SUFFIX), void, env, Reg, Reg)
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| 309 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pminud, SUFFIX), void, env, Reg, Reg)
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| 310 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmaxsb, SUFFIX), void, env, Reg, Reg)
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| 311 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmaxsd, SUFFIX), void, env, Reg, Reg)
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| 312 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmaxuw, SUFFIX), void, env, Reg, Reg)
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| 313 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmaxud, SUFFIX), void, env, Reg, Reg)
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| 314 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pmulld, SUFFIX), void, env, Reg, Reg)
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| 315 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(phminposuw, SUFFIX), void, env, Reg, Reg)
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| 316 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(roundps, SUFFIX), void, env, Reg, Reg, i32)
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| 317 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(roundpd, SUFFIX), void, env, Reg, Reg, i32)
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| 318 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(roundss, SUFFIX), void, env, Reg, Reg, i32)
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| 319 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(roundsd, SUFFIX), void, env, Reg, Reg, i32)
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| 320 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(blendps, SUFFIX), void, env, Reg, Reg, i32)
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| 321 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(blendpd, SUFFIX), void, env, Reg, Reg, i32)
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| 322 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(pblendw, SUFFIX), void, env, Reg, Reg, i32)
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| 323 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(dpps, SUFFIX), void, env, Reg, Reg, i32)
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| 324 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(dppd, SUFFIX), void, env, Reg, Reg, i32)
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| 325 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(mpsadbw, SUFFIX), void, env, Reg, Reg, i32)
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| 326 | 222a3336 | balrog | #endif
|
| 327 | 222a3336 | balrog | |
| 328 | 222a3336 | balrog | /* SSE4.2 op helpers */
|
| 329 | 222a3336 | balrog | #if SHIFT == 1 |
| 330 | d3eb5eae | Blue Swirl | DEF_HELPER_3(glue(pcmpgtq, SUFFIX), void, env, Reg, Reg)
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| 331 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(pcmpestri, SUFFIX), void, env, Reg, Reg, i32)
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| 332 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(pcmpestrm, SUFFIX), void, env, Reg, Reg, i32)
|
| 333 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(pcmpistri, SUFFIX), void, env, Reg, Reg, i32)
|
| 334 | d3eb5eae | Blue Swirl | DEF_HELPER_4(glue(pcmpistrm, SUFFIX), void, env, Reg, Reg, i32)
|
| 335 | a7812ae4 | pbrook | DEF_HELPER_3(crc32, tl, i32, tl, i32) |
| 336 | d3eb5eae | Blue Swirl | DEF_HELPER_3(popcnt, tl, env, tl, i32) |
| 337 | 222a3336 | balrog | #endif
|
| 338 | 222a3336 | balrog | |
| 339 | 5af45186 | bellard | #undef SHIFT
|
| 340 | 5af45186 | bellard | #undef Reg
|
| 341 | 5af45186 | bellard | #undef SUFFIX
|
| 342 | 5af45186 | bellard | |
| 343 | 5af45186 | bellard | #undef SSE_HELPER_B
|
| 344 | 5af45186 | bellard | #undef SSE_HELPER_W
|
| 345 | 5af45186 | bellard | #undef SSE_HELPER_L
|
| 346 | 5af45186 | bellard | #undef SSE_HELPER_Q
|
| 347 | 5af45186 | bellard | #undef SSE_HELPER_S
|
| 348 | 5af45186 | bellard | #undef SSE_HELPER_CMP
|
| 349 | 5af45186 | bellard | #undef UNPCK_OP |