Revision f0da3757 tcg/hppa/tcg-target.c
| b/tcg/hppa/tcg-target.c | ||
|---|---|---|
| 912 | 912 |
tcg_out_mov(s, TCG_TYPE_I32, ret, scratch); |
| 913 | 913 |
} |
| 914 | 914 |
|
| 915 |
static void tcg_out_movcond(TCGContext *s, int cond, TCGArg ret, |
|
| 916 |
TCGArg c1, TCGArg c2, int c2const, |
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| 917 |
TCGArg v1, int v1const) |
|
| 918 |
{
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|
| 919 |
tcg_out_comclr(s, tcg_invert_cond(cond), TCG_REG_R0, c1, c2, c2const); |
|
| 920 |
if (v1const) {
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|
| 921 |
tcg_out_movi(s, TCG_TYPE_I32, ret, v1); |
|
| 922 |
} else {
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| 923 |
tcg_out_mov(s, TCG_TYPE_I32, ret, v1); |
|
| 924 |
} |
|
| 925 |
} |
|
| 926 |
|
|
| 915 | 927 |
#if defined(CONFIG_SOFTMMU) |
| 916 | 928 |
#include "../../softmmu_defs.h" |
| 917 | 929 |
|
| ... | ... | |
| 1520 | 1532 |
args[3], const_args[3], args[4], const_args[4]); |
| 1521 | 1533 |
break; |
| 1522 | 1534 |
|
| 1535 |
case INDEX_op_movcond_i32: |
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| 1536 |
tcg_out_movcond(s, args[5], args[0], args[1], args[2], const_args[2], |
|
| 1537 |
args[3], const_args[3]); |
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| 1538 |
break; |
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| 1539 |
|
|
| 1523 | 1540 |
case INDEX_op_add2_i32: |
| 1524 | 1541 |
tcg_out_add2(s, args[0], args[1], args[2], args[3], |
| 1525 | 1542 |
args[4], args[5], const_args[4]); |
| ... | ... | |
| 1628 | 1645 |
{ INDEX_op_setcond_i32, { "r", "rZ", "rI" } },
|
| 1629 | 1646 |
{ INDEX_op_setcond2_i32, { "r", "rZ", "rZ", "rI", "rI" } },
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| 1630 | 1647 |
|
| 1648 |
/* ??? We can actually support a signed 14-bit arg3, but we |
|
| 1649 |
only have existing constraints for a signed 11-bit. */ |
|
| 1650 |
{ INDEX_op_movcond_i32, { "r", "rZ", "rI", "rI", "0" } },
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| 1651 |
|
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| 1631 | 1652 |
{ INDEX_op_add2_i32, { "r", "r", "rZ", "rZ", "rI", "rZ" } },
|
| 1632 | 1653 |
{ INDEX_op_sub2_i32, { "r", "r", "rI", "rZ", "rK", "rZ" } },
|
| 1633 | 1654 |
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