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1 | 87ecb68b | pbrook | #ifndef QEMU_CHAR_H
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2 | 87ecb68b | pbrook | #define QEMU_CHAR_H
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3 | 87ecb68b | pbrook | |
4 | 87ecb68b | pbrook | /* character device */
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5 | 87ecb68b | pbrook | |
6 | 87ecb68b | pbrook | #define CHR_EVENT_BREAK 0 /* serial break char */ |
7 | 87ecb68b | pbrook | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
8 | 87ecb68b | pbrook | #define CHR_EVENT_RESET 2 /* new connection established */ |
9 | 87ecb68b | pbrook | |
10 | 87ecb68b | pbrook | |
11 | 87ecb68b | pbrook | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 |
12 | 87ecb68b | pbrook | typedef struct { |
13 | 87ecb68b | pbrook | int speed;
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14 | 87ecb68b | pbrook | int parity;
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15 | 87ecb68b | pbrook | int data_bits;
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16 | 87ecb68b | pbrook | int stop_bits;
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17 | 87ecb68b | pbrook | } QEMUSerialSetParams; |
18 | 87ecb68b | pbrook | |
19 | 87ecb68b | pbrook | #define CHR_IOCTL_SERIAL_SET_BREAK 2 |
20 | 87ecb68b | pbrook | |
21 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_READ_DATA 3 |
22 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_WRITE_DATA 4 |
23 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_READ_CONTROL 5 |
24 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_WRITE_CONTROL 6 |
25 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_READ_STATUS 7 |
26 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_EPP_READ_ADDR 8 |
27 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_EPP_READ 9 |
28 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10 |
29 | 87ecb68b | pbrook | #define CHR_IOCTL_PP_EPP_WRITE 11 |
30 | 563e3c6e | aurel32 | #define CHR_IOCTL_PP_DATA_DIR 12 |
31 | 87ecb68b | pbrook | |
32 | f0664048 | aurel32 | #define CHR_IOCTL_SERIAL_SET_TIOCM 13 |
33 | f0664048 | aurel32 | #define CHR_IOCTL_SERIAL_GET_TIOCM 14 |
34 | 81174dae | aliguori | |
35 | 81174dae | aliguori | #define CHR_TIOCM_CTS 0x020 |
36 | 81174dae | aliguori | #define CHR_TIOCM_CAR 0x040 |
37 | 81174dae | aliguori | #define CHR_TIOCM_DSR 0x100 |
38 | 81174dae | aliguori | #define CHR_TIOCM_RI 0x080 |
39 | 81174dae | aliguori | #define CHR_TIOCM_DTR 0x002 |
40 | 81174dae | aliguori | #define CHR_TIOCM_RTS 0x004 |
41 | 81174dae | aliguori | |
42 | 87ecb68b | pbrook | typedef void IOEventHandler(void *opaque, int event); |
43 | 87ecb68b | pbrook | |
44 | 87ecb68b | pbrook | struct CharDriverState {
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45 | 87ecb68b | pbrook | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
46 | 87ecb68b | pbrook | void (*chr_update_read_handler)(struct CharDriverState *s); |
47 | 87ecb68b | pbrook | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
48 | 87ecb68b | pbrook | IOEventHandler *chr_event; |
49 | 87ecb68b | pbrook | IOCanRWHandler *chr_can_read; |
50 | 87ecb68b | pbrook | IOReadHandler *chr_read; |
51 | 87ecb68b | pbrook | void *handler_opaque;
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52 | 87ecb68b | pbrook | void (*chr_send_event)(struct CharDriverState *chr, int event); |
53 | 87ecb68b | pbrook | void (*chr_close)(struct CharDriverState *chr); |
54 | bd9bdce6 | balrog | void (*chr_accept_input)(struct CharDriverState *chr); |
55 | 87ecb68b | pbrook | void *opaque;
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56 | 87ecb68b | pbrook | int focus;
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57 | 87ecb68b | pbrook | QEMUBH *bh; |
58 | 87ecb68b | pbrook | }; |
59 | 87ecb68b | pbrook | |
60 | 87ecb68b | pbrook | CharDriverState *qemu_chr_open(const char *filename); |
61 | 9596ebb7 | pbrook | void qemu_chr_close(CharDriverState *chr);
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62 | 87ecb68b | pbrook | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
63 | 87ecb68b | pbrook | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); |
64 | 87ecb68b | pbrook | void qemu_chr_send_event(CharDriverState *s, int event); |
65 | 87ecb68b | pbrook | void qemu_chr_add_handlers(CharDriverState *s,
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66 | 87ecb68b | pbrook | IOCanRWHandler *fd_can_read, |
67 | 87ecb68b | pbrook | IOReadHandler *fd_read, |
68 | 87ecb68b | pbrook | IOEventHandler *fd_event, |
69 | 87ecb68b | pbrook | void *opaque);
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70 | 87ecb68b | pbrook | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
71 | 87ecb68b | pbrook | void qemu_chr_reset(CharDriverState *s);
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72 | 87ecb68b | pbrook | int qemu_chr_can_read(CharDriverState *s);
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73 | 87ecb68b | pbrook | void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len); |
74 | bd9bdce6 | balrog | void qemu_chr_accept_input(CharDriverState *s);
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75 | 87ecb68b | pbrook | |
76 | 87ecb68b | pbrook | /* async I/O support */
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77 | 87ecb68b | pbrook | |
78 | 87ecb68b | pbrook | int qemu_set_fd_handler2(int fd, |
79 | 87ecb68b | pbrook | IOCanRWHandler *fd_read_poll, |
80 | 87ecb68b | pbrook | IOHandler *fd_read, |
81 | 87ecb68b | pbrook | IOHandler *fd_write, |
82 | 87ecb68b | pbrook | void *opaque);
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83 | 87ecb68b | pbrook | int qemu_set_fd_handler(int fd, |
84 | 87ecb68b | pbrook | IOHandler *fd_read, |
85 | 87ecb68b | pbrook | IOHandler *fd_write, |
86 | 87ecb68b | pbrook | void *opaque);
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87 | 87ecb68b | pbrook | |
88 | 87ecb68b | pbrook | #endif |