Revision f3902383 hw/unin_pci.c
b/hw/unin_pci.c | ||
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#include "ppc_mac.h" |
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#include "pci.h" |
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/* debug UniNorth */ |
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//#define DEBUG_UNIN |
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#ifdef DEBUG_UNIN |
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#define UNIN_DPRINTF(fmt, args...) \ |
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do { printf("UNIN: " fmt , ##args); } while (0) |
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#else |
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#define UNIN_DPRINTF(fmt, args...) |
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#endif |
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typedef target_phys_addr_t pci_addr_t; |
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#include "pci_host.h" |
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... | ... | |
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UNINState *s = opaque; |
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int i; |
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UNIN_DPRINTF("config_writel addr " TARGET_FMT_plx " val %x\n", addr, val); |
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#ifdef TARGET_WORDS_BIGENDIAN |
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val = bswap32(val); |
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#endif |
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#ifdef TARGET_WORDS_BIGENDIAN |
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val = bswap32(val); |
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#endif |
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UNIN_DPRINTF("config_readl addr " TARGET_FMT_plx " val %x\n", addr, val); |
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return val; |
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} |
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qemu_set_irq(pic[irq_num + 8], level); |
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} |
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static void pci_unin_save(QEMUFile* f, void *opaque) |
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{ |
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PCIDevice *d = opaque; |
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pci_device_save(d, f); |
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} |
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static int pci_unin_load(QEMUFile* f, void *opaque, int version_id) |
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{ |
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PCIDevice *d = opaque; |
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if (version_id != 1) |
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return -EINVAL; |
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return pci_device_load(d, f); |
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} |
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static void pci_unin_reset(void *opaque) |
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{ |
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} |
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PCIBus *pci_pmac_init(qemu_irq *pic) |
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{ |
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UNINState *s; |
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d->config[0x0E] = 0x00; // header_type |
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d->config[0x34] = 0x00; // capabilities_pointer |
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#endif |
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register_savevm("uninorth", 0, 1, pci_unin_save, pci_unin_load, d); |
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qemu_register_reset(pci_unin_reset, d); |
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pci_unin_reset(d); |
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return s->bus; |
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} |
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