root / hw / ide / cmd646.c @ f49db805
History | View | Annotate | Download (8.3 kB)
1 | 4c3df0ec | Juan Quintela | /*
|
---|---|---|---|
2 | 4c3df0ec | Juan Quintela | * QEMU IDE Emulation: PCI cmd646 support.
|
3 | 4c3df0ec | Juan Quintela | *
|
4 | 4c3df0ec | Juan Quintela | * Copyright (c) 2003 Fabrice Bellard
|
5 | 4c3df0ec | Juan Quintela | * Copyright (c) 2006 Openedhand Ltd.
|
6 | 4c3df0ec | Juan Quintela | *
|
7 | 4c3df0ec | Juan Quintela | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
8 | 4c3df0ec | Juan Quintela | * of this software and associated documentation files (the "Software"), to deal
|
9 | 4c3df0ec | Juan Quintela | * in the Software without restriction, including without limitation the rights
|
10 | 4c3df0ec | Juan Quintela | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
11 | 4c3df0ec | Juan Quintela | * copies of the Software, and to permit persons to whom the Software is
|
12 | 4c3df0ec | Juan Quintela | * furnished to do so, subject to the following conditions:
|
13 | 4c3df0ec | Juan Quintela | *
|
14 | 4c3df0ec | Juan Quintela | * The above copyright notice and this permission notice shall be included in
|
15 | 4c3df0ec | Juan Quintela | * all copies or substantial portions of the Software.
|
16 | 4c3df0ec | Juan Quintela | *
|
17 | 4c3df0ec | Juan Quintela | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
18 | 4c3df0ec | Juan Quintela | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
19 | 4c3df0ec | Juan Quintela | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
20 | 4c3df0ec | Juan Quintela | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
21 | 4c3df0ec | Juan Quintela | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
22 | 4c3df0ec | Juan Quintela | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
23 | 4c3df0ec | Juan Quintela | * THE SOFTWARE.
|
24 | 4c3df0ec | Juan Quintela | */
|
25 | 4c3df0ec | Juan Quintela | #include <hw/hw.h> |
26 | 4c3df0ec | Juan Quintela | #include <hw/pc.h> |
27 | 4c3df0ec | Juan Quintela | #include <hw/pci.h> |
28 | 4c3df0ec | Juan Quintela | #include <hw/isa.h> |
29 | 4c3df0ec | Juan Quintela | #include "block.h" |
30 | 4c3df0ec | Juan Quintela | #include "block_int.h" |
31 | 4c3df0ec | Juan Quintela | #include "sysemu.h" |
32 | 4c3df0ec | Juan Quintela | #include "dma.h" |
33 | 4c3df0ec | Juan Quintela | |
34 | 4c3df0ec | Juan Quintela | #include <hw/ide/pci.h> |
35 | 4c3df0ec | Juan Quintela | |
36 | 4c3df0ec | Juan Quintela | /* CMD646 specific */
|
37 | 4c3df0ec | Juan Quintela | #define MRDMODE 0x71 |
38 | 4c3df0ec | Juan Quintela | #define MRDMODE_INTR_CH0 0x04 |
39 | 4c3df0ec | Juan Quintela | #define MRDMODE_INTR_CH1 0x08 |
40 | 4c3df0ec | Juan Quintela | #define MRDMODE_BLK_CH0 0x10 |
41 | 4c3df0ec | Juan Quintela | #define MRDMODE_BLK_CH1 0x20 |
42 | 4c3df0ec | Juan Quintela | #define UDIDETCR0 0x73 |
43 | 4c3df0ec | Juan Quintela | #define UDIDETCR1 0x7B |
44 | 4c3df0ec | Juan Quintela | |
45 | 4c3df0ec | Juan Quintela | static void cmd646_update_irq(PCIIDEState *d); |
46 | 4c3df0ec | Juan Quintela | |
47 | 4c3df0ec | Juan Quintela | static void ide_map(PCIDevice *pci_dev, int region_num, |
48 | 6e355d90 | Isaku Yamahata | pcibus_t addr, pcibus_t size, int type)
|
49 | 4c3df0ec | Juan Quintela | { |
50 | 4c3df0ec | Juan Quintela | PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, pci_dev); |
51 | 4c3df0ec | Juan Quintela | IDEBus *bus; |
52 | 4c3df0ec | Juan Quintela | |
53 | 4c3df0ec | Juan Quintela | if (region_num <= 3) { |
54 | 4c3df0ec | Juan Quintela | bus = &d->bus[(region_num >> 1)];
|
55 | 4c3df0ec | Juan Quintela | if (region_num & 1) { |
56 | 4c3df0ec | Juan Quintela | register_ioport_read(addr + 2, 1, 1, ide_status_read, bus); |
57 | 4c3df0ec | Juan Quintela | register_ioport_write(addr + 2, 1, 1, ide_cmd_write, bus); |
58 | 4c3df0ec | Juan Quintela | } else {
|
59 | 4c3df0ec | Juan Quintela | register_ioport_write(addr, 8, 1, ide_ioport_write, bus); |
60 | 4c3df0ec | Juan Quintela | register_ioport_read(addr, 8, 1, ide_ioport_read, bus); |
61 | 4c3df0ec | Juan Quintela | |
62 | 4c3df0ec | Juan Quintela | /* data ports */
|
63 | 4c3df0ec | Juan Quintela | register_ioport_write(addr, 2, 2, ide_data_writew, bus); |
64 | 4c3df0ec | Juan Quintela | register_ioport_read(addr, 2, 2, ide_data_readw, bus); |
65 | 4c3df0ec | Juan Quintela | register_ioport_write(addr, 4, 4, ide_data_writel, bus); |
66 | 4c3df0ec | Juan Quintela | register_ioport_read(addr, 4, 4, ide_data_readl, bus); |
67 | 4c3df0ec | Juan Quintela | } |
68 | 4c3df0ec | Juan Quintela | } |
69 | 4c3df0ec | Juan Quintela | } |
70 | 4c3df0ec | Juan Quintela | |
71 | 61f58e59 | Juan Quintela | static PCIIDEState *pci_from_bm(BMDMAState *bm)
|
72 | 61f58e59 | Juan Quintela | { |
73 | 61f58e59 | Juan Quintela | if (bm->unit == 0) { |
74 | 61f58e59 | Juan Quintela | return container_of(bm, PCIIDEState, bmdma[0]); |
75 | 61f58e59 | Juan Quintela | } else {
|
76 | 61f58e59 | Juan Quintela | return container_of(bm, PCIIDEState, bmdma[1]); |
77 | 61f58e59 | Juan Quintela | } |
78 | 61f58e59 | Juan Quintela | } |
79 | 61f58e59 | Juan Quintela | |
80 | 4c3df0ec | Juan Quintela | static uint32_t bmdma_readb(void *opaque, uint32_t addr) |
81 | 4c3df0ec | Juan Quintela | { |
82 | 4c3df0ec | Juan Quintela | BMDMAState *bm = opaque; |
83 | 61f58e59 | Juan Quintela | PCIIDEState *pci_dev = pci_from_bm(bm); |
84 | 4c3df0ec | Juan Quintela | uint32_t val; |
85 | 4c3df0ec | Juan Quintela | |
86 | 4c3df0ec | Juan Quintela | switch(addr & 3) { |
87 | 4c3df0ec | Juan Quintela | case 0: |
88 | 4c3df0ec | Juan Quintela | val = bm->cmd; |
89 | 4c3df0ec | Juan Quintela | break;
|
90 | 4c3df0ec | Juan Quintela | case 1: |
91 | 58c0e732 | Juan Quintela | val = pci_dev->dev.config[MRDMODE]; |
92 | 4c3df0ec | Juan Quintela | break;
|
93 | 4c3df0ec | Juan Quintela | case 2: |
94 | 4c3df0ec | Juan Quintela | val = bm->status; |
95 | 4c3df0ec | Juan Quintela | break;
|
96 | 4c3df0ec | Juan Quintela | case 3: |
97 | 0cde1b4c | Juan Quintela | if (bm->unit == 0) { |
98 | 58c0e732 | Juan Quintela | val = pci_dev->dev.config[UDIDETCR0]; |
99 | 4c3df0ec | Juan Quintela | } else {
|
100 | 58c0e732 | Juan Quintela | val = pci_dev->dev.config[UDIDETCR1]; |
101 | 4c3df0ec | Juan Quintela | } |
102 | 4c3df0ec | Juan Quintela | break;
|
103 | 4c3df0ec | Juan Quintela | default:
|
104 | 4c3df0ec | Juan Quintela | val = 0xff;
|
105 | 4c3df0ec | Juan Quintela | break;
|
106 | 4c3df0ec | Juan Quintela | } |
107 | 4c3df0ec | Juan Quintela | #ifdef DEBUG_IDE
|
108 | 4c3df0ec | Juan Quintela | printf("bmdma: readb 0x%02x : 0x%02x\n", addr, val);
|
109 | 4c3df0ec | Juan Quintela | #endif
|
110 | 4c3df0ec | Juan Quintela | return val;
|
111 | 4c3df0ec | Juan Quintela | } |
112 | 4c3df0ec | Juan Quintela | |
113 | 4c3df0ec | Juan Quintela | static void bmdma_writeb(void *opaque, uint32_t addr, uint32_t val) |
114 | 4c3df0ec | Juan Quintela | { |
115 | 4c3df0ec | Juan Quintela | BMDMAState *bm = opaque; |
116 | 61f58e59 | Juan Quintela | PCIIDEState *pci_dev = pci_from_bm(bm); |
117 | 4c3df0ec | Juan Quintela | #ifdef DEBUG_IDE
|
118 | 4c3df0ec | Juan Quintela | printf("bmdma: writeb 0x%02x : 0x%02x\n", addr, val);
|
119 | 4c3df0ec | Juan Quintela | #endif
|
120 | 4c3df0ec | Juan Quintela | switch(addr & 3) { |
121 | 4c3df0ec | Juan Quintela | case 1: |
122 | 58c0e732 | Juan Quintela | pci_dev->dev.config[MRDMODE] = |
123 | 58c0e732 | Juan Quintela | (pci_dev->dev.config[MRDMODE] & ~0x30) | (val & 0x30); |
124 | 58c0e732 | Juan Quintela | cmd646_update_irq(pci_dev); |
125 | 4c3df0ec | Juan Quintela | break;
|
126 | 4c3df0ec | Juan Quintela | case 2: |
127 | 4c3df0ec | Juan Quintela | bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06); |
128 | 4c3df0ec | Juan Quintela | break;
|
129 | 4c3df0ec | Juan Quintela | case 3: |
130 | 0cde1b4c | Juan Quintela | if (bm->unit == 0) |
131 | 58c0e732 | Juan Quintela | pci_dev->dev.config[UDIDETCR0] = val; |
132 | 58c0e732 | Juan Quintela | else
|
133 | 58c0e732 | Juan Quintela | pci_dev->dev.config[UDIDETCR1] = val; |
134 | 4c3df0ec | Juan Quintela | break;
|
135 | 4c3df0ec | Juan Quintela | } |
136 | 4c3df0ec | Juan Quintela | } |
137 | 4c3df0ec | Juan Quintela | |
138 | 4c3df0ec | Juan Quintela | static void bmdma_map(PCIDevice *pci_dev, int region_num, |
139 | 6e355d90 | Isaku Yamahata | pcibus_t addr, pcibus_t size, int type)
|
140 | 4c3df0ec | Juan Quintela | { |
141 | 4c3df0ec | Juan Quintela | PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, pci_dev); |
142 | 4c3df0ec | Juan Quintela | int i;
|
143 | 4c3df0ec | Juan Quintela | |
144 | 4c3df0ec | Juan Quintela | for(i = 0;i < 2; i++) { |
145 | 4c3df0ec | Juan Quintela | BMDMAState *bm = &d->bmdma[i]; |
146 | 4c3df0ec | Juan Quintela | d->bus[i].bmdma = bm; |
147 | 4c3df0ec | Juan Quintela | bm->bus = d->bus+i; |
148 | 4c3df0ec | Juan Quintela | qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm); |
149 | 4c3df0ec | Juan Quintela | |
150 | 4c3df0ec | Juan Quintela | register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm); |
151 | 4c3df0ec | Juan Quintela | |
152 | 4c3df0ec | Juan Quintela | register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm); |
153 | 4c3df0ec | Juan Quintela | register_ioport_read(addr, 4, 1, bmdma_readb, bm); |
154 | 4c3df0ec | Juan Quintela | |
155 | 4c3df0ec | Juan Quintela | register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm); |
156 | 4c3df0ec | Juan Quintela | register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm); |
157 | 4c3df0ec | Juan Quintela | register_ioport_write(addr + 4, 4, 2, bmdma_addr_writew, bm); |
158 | 4c3df0ec | Juan Quintela | register_ioport_read(addr + 4, 4, 2, bmdma_addr_readw, bm); |
159 | 4c3df0ec | Juan Quintela | register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm); |
160 | 4c3df0ec | Juan Quintela | register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm); |
161 | 4c3df0ec | Juan Quintela | addr += 8;
|
162 | 4c3df0ec | Juan Quintela | } |
163 | 4c3df0ec | Juan Quintela | } |
164 | 4c3df0ec | Juan Quintela | |
165 | 4c3df0ec | Juan Quintela | /* XXX: call it also when the MRDMODE is changed from the PCI config
|
166 | 4c3df0ec | Juan Quintela | registers */
|
167 | 4c3df0ec | Juan Quintela | static void cmd646_update_irq(PCIIDEState *d) |
168 | 4c3df0ec | Juan Quintela | { |
169 | 4c3df0ec | Juan Quintela | int pci_level;
|
170 | 4c3df0ec | Juan Quintela | pci_level = ((d->dev.config[MRDMODE] & MRDMODE_INTR_CH0) && |
171 | 4c3df0ec | Juan Quintela | !(d->dev.config[MRDMODE] & MRDMODE_BLK_CH0)) || |
172 | 4c3df0ec | Juan Quintela | ((d->dev.config[MRDMODE] & MRDMODE_INTR_CH1) && |
173 | 4c3df0ec | Juan Quintela | !(d->dev.config[MRDMODE] & MRDMODE_BLK_CH1)); |
174 | 4c3df0ec | Juan Quintela | qemu_set_irq(d->dev.irq[0], pci_level);
|
175 | 4c3df0ec | Juan Quintela | } |
176 | 4c3df0ec | Juan Quintela | |
177 | 4c3df0ec | Juan Quintela | /* the PCI irq level is the logical OR of the two channels */
|
178 | 4c3df0ec | Juan Quintela | static void cmd646_set_irq(void *opaque, int channel, int level) |
179 | 4c3df0ec | Juan Quintela | { |
180 | 4c3df0ec | Juan Quintela | PCIIDEState *d = opaque; |
181 | 4c3df0ec | Juan Quintela | int irq_mask;
|
182 | 4c3df0ec | Juan Quintela | |
183 | 4c3df0ec | Juan Quintela | irq_mask = MRDMODE_INTR_CH0 << channel; |
184 | 4c3df0ec | Juan Quintela | if (level)
|
185 | 4c3df0ec | Juan Quintela | d->dev.config[MRDMODE] |= irq_mask; |
186 | 4c3df0ec | Juan Quintela | else
|
187 | 4c3df0ec | Juan Quintela | d->dev.config[MRDMODE] &= ~irq_mask; |
188 | 4c3df0ec | Juan Quintela | cmd646_update_irq(d); |
189 | 4c3df0ec | Juan Quintela | } |
190 | 4c3df0ec | Juan Quintela | |
191 | 4c3df0ec | Juan Quintela | static void cmd646_reset(void *opaque) |
192 | 4c3df0ec | Juan Quintela | { |
193 | 4c3df0ec | Juan Quintela | PCIIDEState *d = opaque; |
194 | 4c3df0ec | Juan Quintela | unsigned int i; |
195 | 4c3df0ec | Juan Quintela | |
196 | 4a643563 | Blue Swirl | for (i = 0; i < 2; i++) { |
197 | 4a643563 | Blue Swirl | ide_bus_reset(&d->bus[i]); |
198 | 4a643563 | Blue Swirl | ide_dma_reset(&d->bmdma[i]); |
199 | 4a643563 | Blue Swirl | } |
200 | 4c3df0ec | Juan Quintela | } |
201 | 4c3df0ec | Juan Quintela | |
202 | 4c3df0ec | Juan Quintela | /* CMD646 PCI IDE controller */
|
203 | 4c3df0ec | Juan Quintela | static int pci_cmd646_ide_initfn(PCIDevice *dev) |
204 | 4c3df0ec | Juan Quintela | { |
205 | 4c3df0ec | Juan Quintela | PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev); |
206 | 4c3df0ec | Juan Quintela | uint8_t *pci_conf = d->dev.config; |
207 | 4c3df0ec | Juan Quintela | qemu_irq *irq; |
208 | 4c3df0ec | Juan Quintela | |
209 | 4c3df0ec | Juan Quintela | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CMD); |
210 | 4c3df0ec | Juan Quintela | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_CMD_646); |
211 | 4c3df0ec | Juan Quintela | |
212 | 4c3df0ec | Juan Quintela | pci_conf[0x08] = 0x07; // IDE controller revision |
213 | 4c3df0ec | Juan Quintela | pci_conf[0x09] = 0x8f; |
214 | 4c3df0ec | Juan Quintela | |
215 | 4c3df0ec | Juan Quintela | pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE); |
216 | 4c3df0ec | Juan Quintela | pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
|
217 | 4c3df0ec | Juan Quintela | |
218 | 4c3df0ec | Juan Quintela | pci_conf[0x51] = 0x04; // enable IDE0 |
219 | 4c3df0ec | Juan Quintela | if (d->secondary) {
|
220 | 4c3df0ec | Juan Quintela | /* XXX: if not enabled, really disable the seconday IDE controller */
|
221 | 4c3df0ec | Juan Quintela | pci_conf[0x51] |= 0x08; /* enable IDE1 */ |
222 | 4c3df0ec | Juan Quintela | } |
223 | 4c3df0ec | Juan Quintela | |
224 | 0392a017 | Isaku Yamahata | pci_register_bar(dev, 0, 0x8, PCI_BASE_ADDRESS_SPACE_IO, ide_map); |
225 | 0392a017 | Isaku Yamahata | pci_register_bar(dev, 1, 0x4, PCI_BASE_ADDRESS_SPACE_IO, ide_map); |
226 | 0392a017 | Isaku Yamahata | pci_register_bar(dev, 2, 0x8, PCI_BASE_ADDRESS_SPACE_IO, ide_map); |
227 | 0392a017 | Isaku Yamahata | pci_register_bar(dev, 3, 0x4, PCI_BASE_ADDRESS_SPACE_IO, ide_map); |
228 | 0392a017 | Isaku Yamahata | pci_register_bar(dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, bmdma_map); |
229 | 4c3df0ec | Juan Quintela | |
230 | 4c3df0ec | Juan Quintela | pci_conf[0x3d] = 0x01; // interrupt on pin 1 |
231 | 4c3df0ec | Juan Quintela | |
232 | 4c3df0ec | Juan Quintela | irq = qemu_allocate_irqs(cmd646_set_irq, d, 2);
|
233 | 4c3df0ec | Juan Quintela | ide_bus_new(&d->bus[0], &d->dev.qdev);
|
234 | 4c3df0ec | Juan Quintela | ide_bus_new(&d->bus[1], &d->dev.qdev);
|
235 | 4c3df0ec | Juan Quintela | ide_init2(&d->bus[0], NULL, NULL, irq[0]); |
236 | 4c3df0ec | Juan Quintela | ide_init2(&d->bus[1], NULL, NULL, irq[1]); |
237 | 4c3df0ec | Juan Quintela | |
238 | 407a4f30 | Juan Quintela | vmstate_register(0, &vmstate_ide_pci, d);
|
239 | 4c3df0ec | Juan Quintela | qemu_register_reset(cmd646_reset, d); |
240 | 4c3df0ec | Juan Quintela | return 0; |
241 | 4c3df0ec | Juan Quintela | } |
242 | 4c3df0ec | Juan Quintela | |
243 | 4c3df0ec | Juan Quintela | void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
|
244 | 4c3df0ec | Juan Quintela | int secondary_ide_enabled)
|
245 | 4c3df0ec | Juan Quintela | { |
246 | 4c3df0ec | Juan Quintela | PCIDevice *dev; |
247 | 4c3df0ec | Juan Quintela | |
248 | 4c3df0ec | Juan Quintela | dev = pci_create(bus, -1, "CMD646 IDE"); |
249 | 4c3df0ec | Juan Quintela | qdev_prop_set_uint32(&dev->qdev, "secondary", secondary_ide_enabled);
|
250 | 4c3df0ec | Juan Quintela | qdev_init_nofail(&dev->qdev); |
251 | 4c3df0ec | Juan Quintela | |
252 | 4c3df0ec | Juan Quintela | pci_ide_create_devs(dev, hd_table); |
253 | 4c3df0ec | Juan Quintela | } |
254 | 4c3df0ec | Juan Quintela | |
255 | 4c3df0ec | Juan Quintela | static PCIDeviceInfo cmd646_ide_info[] = {
|
256 | 4c3df0ec | Juan Quintela | { |
257 | 4c3df0ec | Juan Quintela | .qdev.name = "CMD646 IDE",
|
258 | 4c3df0ec | Juan Quintela | .qdev.size = sizeof(PCIIDEState),
|
259 | 4c3df0ec | Juan Quintela | .init = pci_cmd646_ide_initfn, |
260 | 4c3df0ec | Juan Quintela | .qdev.props = (Property[]) { |
261 | 4c3df0ec | Juan Quintela | DEFINE_PROP_UINT32("secondary", PCIIDEState, secondary, 0), |
262 | 4c3df0ec | Juan Quintela | DEFINE_PROP_END_OF_LIST(), |
263 | 4c3df0ec | Juan Quintela | }, |
264 | 4c3df0ec | Juan Quintela | },{ |
265 | 4c3df0ec | Juan Quintela | /* end of list */
|
266 | 4c3df0ec | Juan Quintela | } |
267 | 4c3df0ec | Juan Quintela | }; |
268 | 4c3df0ec | Juan Quintela | |
269 | 4c3df0ec | Juan Quintela | static void cmd646_ide_register(void) |
270 | 4c3df0ec | Juan Quintela | { |
271 | 4c3df0ec | Juan Quintela | pci_qdev_register_many(cmd646_ide_info); |
272 | 4c3df0ec | Juan Quintela | } |
273 | 4c3df0ec | Juan Quintela | device_init(cmd646_ide_register); |