Revision f4b1a842
| b/hw/sun4u.c | ||
|---|---|---|
| 309 | 309 |
cpu_interrupt(env, CPU_INTERRUPT_TIMER); |
| 310 | 310 |
} |
| 311 | 311 |
|
| 312 |
void cpu_tick_set_count(void *opaque, uint64_t count) |
|
| 313 |
{
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|
| 314 |
ptimer_set_count(opaque, -count); |
|
| 315 |
} |
|
| 316 |
|
|
| 317 |
uint64_t cpu_tick_get_count(void *opaque) |
|
| 318 |
{
|
|
| 319 |
return -ptimer_get_count(opaque); |
|
| 320 |
} |
|
| 321 |
|
|
| 322 |
void cpu_tick_set_limit(void *opaque, uint64_t limit) |
|
| 323 |
{
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|
| 324 |
ptimer_set_limit(opaque, -limit, 0); |
|
| 325 |
} |
|
| 326 |
|
|
| 312 | 327 |
static const int ide_iobase[2] = { 0x1f0, 0x170 };
|
| 313 | 328 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
|
| 314 | 329 |
static const int ide_irq[2] = { 14, 15 };
|
| b/target-sparc/cpu.h | ||
|---|---|---|
| 501 | 501 |
/* sum4m.c, sun4u.c */ |
| 502 | 502 |
void cpu_check_irqs(CPUSPARCState *env); |
| 503 | 503 |
|
| 504 |
#ifdef TARGET_SPARC64 |
|
| 505 |
/* sun4u.c */ |
|
| 506 |
void cpu_tick_set_count(void *opaque, uint64_t count); |
|
| 507 |
uint64_t cpu_tick_get_count(void *opaque); |
|
| 508 |
void cpu_tick_set_limit(void *opaque, uint64_t limit); |
|
| 509 |
#endif |
|
| 510 |
|
|
| 504 | 511 |
#endif |
| b/target-sparc/helper.c | ||
|---|---|---|
| 1412 | 1412 |
#endif |
| 1413 | 1413 |
cpu_fprintf(f, "fsr: 0x%08x\n", env->fsr); |
| 1414 | 1414 |
} |
| 1415 |
|
|
| 1416 |
#ifdef TARGET_SPARC64 |
|
| 1417 |
#if !defined(CONFIG_USER_ONLY) |
|
| 1418 |
#include "qemu-common.h" |
|
| 1419 |
#include "hw/irq.h" |
|
| 1420 |
#include "qemu-timer.h" |
|
| 1421 |
#endif |
|
| 1422 |
|
|
| 1423 |
void helper_tick_set_count(void *opaque, uint64_t count) |
|
| 1424 |
{
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|
| 1425 |
#if !defined(CONFIG_USER_ONLY) |
|
| 1426 |
ptimer_set_count(opaque, -count); |
|
| 1427 |
#endif |
|
| 1428 |
} |
|
| 1429 |
|
|
| 1430 |
uint64_t helper_tick_get_count(void *opaque) |
|
| 1431 |
{
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|
| 1432 |
#if !defined(CONFIG_USER_ONLY) |
|
| 1433 |
return -ptimer_get_count(opaque); |
|
| 1434 |
#else |
|
| 1435 |
return 0; |
|
| 1436 |
#endif |
|
| 1437 |
} |
|
| 1438 |
|
|
| 1439 |
void helper_tick_set_limit(void *opaque, uint64_t limit) |
|
| 1440 |
{
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|
| 1441 |
#if !defined(CONFIG_USER_ONLY) |
|
| 1442 |
ptimer_set_limit(opaque, -limit, 0); |
|
| 1443 |
#endif |
|
| 1444 |
} |
|
| 1445 |
#endif |
|
| b/target-sparc/op_helper.c | ||
|---|---|---|
| 3086 | 3086 |
} |
| 3087 | 3087 |
#endif |
| 3088 | 3088 |
|
| 3089 |
#ifdef TARGET_SPARC64 |
|
| 3090 |
void helper_tick_set_count(void *opaque, uint64_t count) |
|
| 3091 |
{
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|
| 3092 |
#if !defined(CONFIG_USER_ONLY) |
|
| 3093 |
cpu_tick_set_count(opaque, count); |
|
| 3094 |
#endif |
|
| 3095 |
} |
|
| 3096 |
|
|
| 3097 |
uint64_t helper_tick_get_count(void *opaque) |
|
| 3098 |
{
|
|
| 3099 |
#if !defined(CONFIG_USER_ONLY) |
|
| 3100 |
return cpu_tick_get_count(opaque); |
|
| 3101 |
#else |
|
| 3102 |
return 0; |
|
| 3103 |
#endif |
|
| 3104 |
} |
|
| 3105 |
|
|
| 3106 |
void helper_tick_set_limit(void *opaque, uint64_t limit) |
|
| 3107 |
{
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|
| 3108 |
#if !defined(CONFIG_USER_ONLY) |
|
| 3109 |
cpu_tick_set_limit(opaque, limit); |
|
| 3110 |
#endif |
|
| 3111 |
} |
|
| 3112 |
#endif |
|
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