root / hw / char / omap_uart.c @ f53f81e0
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1 | 02d74341 | cmchao | /*
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2 | 02d74341 | cmchao | * TI OMAP processors UART emulation.
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3 | 02d74341 | cmchao | *
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4 | 02d74341 | cmchao | * Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org>
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5 | 02d74341 | cmchao | * Copyright (C) 2007-2009 Nokia Corporation
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6 | 02d74341 | cmchao | *
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7 | 02d74341 | cmchao | * This program is free software; you can redistribute it and/or
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8 | 02d74341 | cmchao | * modify it under the terms of the GNU General Public License as
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9 | 02d74341 | cmchao | * published by the Free Software Foundation; either version 2 or
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10 | 02d74341 | cmchao | * (at your option) version 3 of the License.
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11 | 02d74341 | cmchao | *
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12 | 02d74341 | cmchao | * This program is distributed in the hope that it will be useful,
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13 | 02d74341 | cmchao | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 02d74341 | cmchao | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | 02d74341 | cmchao | * GNU General Public License for more details.
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16 | 02d74341 | cmchao | *
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17 | 02d74341 | cmchao | * You should have received a copy of the GNU General Public License along
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18 | 02d74341 | cmchao | * with this program; if not, see <http://www.gnu.org/licenses/>.
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19 | 02d74341 | cmchao | */
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20 | dccfcd0e | Paolo Bonzini | #include "sysemu/char.h" |
21 | 83c9f4ca | Paolo Bonzini | #include "hw/hw.h" |
22 | 0d09e41a | Paolo Bonzini | #include "hw/arm/omap.h" |
23 | 0d09e41a | Paolo Bonzini | #include "hw/char/serial.h" |
24 | 022c62cb | Paolo Bonzini | #include "exec/address-spaces.h" |
25 | 02d74341 | cmchao | |
26 | 02d74341 | cmchao | /* UARTs */
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27 | 02d74341 | cmchao | struct omap_uart_s {
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28 | aee39503 | Avi Kivity | MemoryRegion iomem; |
29 | a8170e5e | Avi Kivity | hwaddr base; |
30 | 02d74341 | cmchao | SerialState *serial; /* TODO */
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31 | 02d74341 | cmchao | struct omap_target_agent_s *ta;
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32 | 02d74341 | cmchao | omap_clk fclk; |
33 | 02d74341 | cmchao | qemu_irq irq; |
34 | 02d74341 | cmchao | |
35 | 02d74341 | cmchao | uint8_t eblr; |
36 | 02d74341 | cmchao | uint8_t syscontrol; |
37 | 02d74341 | cmchao | uint8_t wkup; |
38 | 02d74341 | cmchao | uint8_t cfps; |
39 | 02d74341 | cmchao | uint8_t mdr[2];
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40 | 02d74341 | cmchao | uint8_t scr; |
41 | 02d74341 | cmchao | uint8_t clksel; |
42 | 02d74341 | cmchao | }; |
43 | 02d74341 | cmchao | |
44 | 02d74341 | cmchao | void omap_uart_reset(struct omap_uart_s *s) |
45 | 02d74341 | cmchao | { |
46 | 02d74341 | cmchao | s->eblr = 0x00;
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47 | 02d74341 | cmchao | s->syscontrol = 0;
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48 | 02d74341 | cmchao | s->wkup = 0x3f;
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49 | 02d74341 | cmchao | s->cfps = 0x69;
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50 | 02d74341 | cmchao | s->clksel = 0;
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51 | 02d74341 | cmchao | } |
52 | 02d74341 | cmchao | |
53 | a8170e5e | Avi Kivity | struct omap_uart_s *omap_uart_init(hwaddr base,
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54 | 02d74341 | cmchao | qemu_irq irq, omap_clk fclk, omap_clk iclk, |
55 | 6a8aabd3 | Stefan Weil | qemu_irq txdma, qemu_irq rxdma, |
56 | 6a8aabd3 | Stefan Weil | const char *label, CharDriverState *chr) |
57 | 02d74341 | cmchao | { |
58 | 02d74341 | cmchao | struct omap_uart_s *s = (struct omap_uart_s *) |
59 | 7267c094 | Anthony Liguori | g_malloc0(sizeof(struct omap_uart_s)); |
60 | 02d74341 | cmchao | |
61 | 02d74341 | cmchao | s->base = base; |
62 | 02d74341 | cmchao | s->fclk = fclk; |
63 | 02d74341 | cmchao | s->irq = irq; |
64 | 39186d8a | Richard Henderson | s->serial = serial_mm_init(get_system_memory(), base, 2, irq,
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65 | 39186d8a | Richard Henderson | omap_clk_getrate(fclk)/16,
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66 | 2ff0c7c3 | Richard Henderson | chr ?: qemu_chr_new(label, "null", NULL), |
67 | fb50cfe4 | Richard Henderson | DEVICE_NATIVE_ENDIAN); |
68 | 02d74341 | cmchao | return s;
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69 | 02d74341 | cmchao | } |
70 | 02d74341 | cmchao | |
71 | a8170e5e | Avi Kivity | static uint64_t omap_uart_read(void *opaque, hwaddr addr, |
72 | aee39503 | Avi Kivity | unsigned size)
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73 | 02d74341 | cmchao | { |
74 | 02d74341 | cmchao | struct omap_uart_s *s = (struct omap_uart_s *) opaque; |
75 | 02d74341 | cmchao | |
76 | aee39503 | Avi Kivity | if (size == 4) { |
77 | aee39503 | Avi Kivity | return omap_badwidth_read8(opaque, addr);
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78 | aee39503 | Avi Kivity | } |
79 | aee39503 | Avi Kivity | |
80 | 02d74341 | cmchao | switch (addr) {
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81 | 02d74341 | cmchao | case 0x20: /* MDR1 */ |
82 | 02d74341 | cmchao | return s->mdr[0]; |
83 | 02d74341 | cmchao | case 0x24: /* MDR2 */ |
84 | 02d74341 | cmchao | return s->mdr[1]; |
85 | 02d74341 | cmchao | case 0x40: /* SCR */ |
86 | 02d74341 | cmchao | return s->scr;
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87 | 02d74341 | cmchao | case 0x44: /* SSR */ |
88 | 02d74341 | cmchao | return 0x0; |
89 | 02d74341 | cmchao | case 0x48: /* EBLR (OMAP2) */ |
90 | 02d74341 | cmchao | return s->eblr;
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91 | 02d74341 | cmchao | case 0x4C: /* OSC_12M_SEL (OMAP1) */ |
92 | 02d74341 | cmchao | return s->clksel;
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93 | 02d74341 | cmchao | case 0x50: /* MVR */ |
94 | 02d74341 | cmchao | return 0x30; |
95 | 02d74341 | cmchao | case 0x54: /* SYSC (OMAP2) */ |
96 | 02d74341 | cmchao | return s->syscontrol;
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97 | 02d74341 | cmchao | case 0x58: /* SYSS (OMAP2) */ |
98 | 02d74341 | cmchao | return 1; |
99 | 02d74341 | cmchao | case 0x5c: /* WER (OMAP2) */ |
100 | 02d74341 | cmchao | return s->wkup;
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101 | 02d74341 | cmchao | case 0x60: /* CFPS (OMAP2) */ |
102 | 02d74341 | cmchao | return s->cfps;
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103 | 02d74341 | cmchao | } |
104 | 02d74341 | cmchao | |
105 | 02d74341 | cmchao | OMAP_BAD_REG(addr); |
106 | 02d74341 | cmchao | return 0; |
107 | 02d74341 | cmchao | } |
108 | 02d74341 | cmchao | |
109 | a8170e5e | Avi Kivity | static void omap_uart_write(void *opaque, hwaddr addr, |
110 | aee39503 | Avi Kivity | uint64_t value, unsigned size)
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111 | 02d74341 | cmchao | { |
112 | 02d74341 | cmchao | struct omap_uart_s *s = (struct omap_uart_s *) opaque; |
113 | 02d74341 | cmchao | |
114 | aee39503 | Avi Kivity | if (size == 4) { |
115 | aee39503 | Avi Kivity | return omap_badwidth_write8(opaque, addr, value);
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116 | aee39503 | Avi Kivity | } |
117 | aee39503 | Avi Kivity | |
118 | 02d74341 | cmchao | switch (addr) {
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119 | 02d74341 | cmchao | case 0x20: /* MDR1 */ |
120 | 02d74341 | cmchao | s->mdr[0] = value & 0x7f; |
121 | 02d74341 | cmchao | break;
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122 | 02d74341 | cmchao | case 0x24: /* MDR2 */ |
123 | 02d74341 | cmchao | s->mdr[1] = value & 0xff; |
124 | 02d74341 | cmchao | break;
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125 | 02d74341 | cmchao | case 0x40: /* SCR */ |
126 | 02d74341 | cmchao | s->scr = value & 0xff;
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127 | 02d74341 | cmchao | break;
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128 | 02d74341 | cmchao | case 0x48: /* EBLR (OMAP2) */ |
129 | 02d74341 | cmchao | s->eblr = value & 0xff;
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130 | 02d74341 | cmchao | break;
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131 | 02d74341 | cmchao | case 0x4C: /* OSC_12M_SEL (OMAP1) */ |
132 | 02d74341 | cmchao | s->clksel = value & 1;
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133 | 02d74341 | cmchao | break;
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134 | 02d74341 | cmchao | case 0x44: /* SSR */ |
135 | 02d74341 | cmchao | case 0x50: /* MVR */ |
136 | 02d74341 | cmchao | case 0x58: /* SYSS (OMAP2) */ |
137 | 02d74341 | cmchao | OMAP_RO_REG(addr); |
138 | 02d74341 | cmchao | break;
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139 | 02d74341 | cmchao | case 0x54: /* SYSC (OMAP2) */ |
140 | 02d74341 | cmchao | s->syscontrol = value & 0x1d;
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141 | 02d74341 | cmchao | if (value & 2) |
142 | 02d74341 | cmchao | omap_uart_reset(s); |
143 | 02d74341 | cmchao | break;
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144 | 02d74341 | cmchao | case 0x5c: /* WER (OMAP2) */ |
145 | 02d74341 | cmchao | s->wkup = value & 0x7f;
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146 | 02d74341 | cmchao | break;
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147 | 02d74341 | cmchao | case 0x60: /* CFPS (OMAP2) */ |
148 | 02d74341 | cmchao | s->cfps = value & 0xff;
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149 | 02d74341 | cmchao | break;
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150 | 02d74341 | cmchao | default:
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151 | 02d74341 | cmchao | OMAP_BAD_REG(addr); |
152 | 02d74341 | cmchao | } |
153 | 02d74341 | cmchao | } |
154 | 02d74341 | cmchao | |
155 | aee39503 | Avi Kivity | static const MemoryRegionOps omap_uart_ops = { |
156 | aee39503 | Avi Kivity | .read = omap_uart_read, |
157 | aee39503 | Avi Kivity | .write = omap_uart_write, |
158 | aee39503 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
159 | 02d74341 | cmchao | }; |
160 | 02d74341 | cmchao | |
161 | aee39503 | Avi Kivity | struct omap_uart_s *omap2_uart_init(MemoryRegion *sysmem,
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162 | aee39503 | Avi Kivity | struct omap_target_agent_s *ta,
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163 | 02d74341 | cmchao | qemu_irq irq, omap_clk fclk, omap_clk iclk, |
164 | 6a8aabd3 | Stefan Weil | qemu_irq txdma, qemu_irq rxdma, |
165 | 6a8aabd3 | Stefan Weil | const char *label, CharDriverState *chr) |
166 | 02d74341 | cmchao | { |
167 | a8170e5e | Avi Kivity | hwaddr base = omap_l4_attach(ta, 0, NULL); |
168 | 02d74341 | cmchao | struct omap_uart_s *s = omap_uart_init(base, irq,
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169 | 6a8aabd3 | Stefan Weil | fclk, iclk, txdma, rxdma, label, chr); |
170 | aee39503 | Avi Kivity | |
171 | 2c9b15ca | Paolo Bonzini | memory_region_init_io(&s->iomem, NULL, &omap_uart_ops, s, "omap.uart", 0x100); |
172 | 02d74341 | cmchao | |
173 | 02d74341 | cmchao | s->ta = ta; |
174 | 02d74341 | cmchao | |
175 | aee39503 | Avi Kivity | memory_region_add_subregion(sysmem, base + 0x20, &s->iomem);
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176 | 02d74341 | cmchao | |
177 | 02d74341 | cmchao | return s;
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178 | 02d74341 | cmchao | } |
179 | 02d74341 | cmchao | |
180 | 02d74341 | cmchao | void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr) |
181 | 02d74341 | cmchao | { |
182 | 02d74341 | cmchao | /* TODO: Should reuse or destroy current s->serial */
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183 | 39186d8a | Richard Henderson | s->serial = serial_mm_init(get_system_memory(), s->base, 2, s->irq,
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184 | 02d74341 | cmchao | omap_clk_getrate(s->fclk) / 16,
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185 | 2ff0c7c3 | Richard Henderson | chr ?: qemu_chr_new("null", "null", NULL), |
186 | fb50cfe4 | Richard Henderson | DEVICE_NATIVE_ENDIAN); |
187 | 02d74341 | cmchao | } |