Revision f5847c91
| b/target-i386/cpu.h | ||
|---|---|---|
| 764 | 764 |
XMMReg xmm_regs[CPU_NB_REGS]; |
| 765 | 765 |
XMMReg xmm_t0; |
| 766 | 766 |
MMXReg mmx_t0; |
| 767 |
target_ulong cc_tmp; /* temporary for rcr/rcl */ |
|
| 768 | 767 |
|
| 769 | 768 |
/* sysenter registers */ |
| 770 | 769 |
uint32_t sysenter_cs; |
| b/target-i386/shift_helper_template.h | ||
|---|---|---|
| 55 | 55 |
count = rclb_table[count]; |
| 56 | 56 |
#endif |
| 57 | 57 |
if (count) {
|
| 58 |
eflags = helper_cc_compute_all(env, CC_OP);
|
|
| 58 |
eflags = env->cc_src;
|
|
| 59 | 59 |
t0 &= DATA_MASK; |
| 60 | 60 |
src = t0; |
| 61 | 61 |
res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1)); |
| ... | ... | |
| 63 | 63 |
res |= t0 >> (DATA_BITS + 1 - count); |
| 64 | 64 |
} |
| 65 | 65 |
t0 = res; |
| 66 |
env->cc_tmp = (eflags & ~(CC_C | CC_O)) |
|
|
| 66 |
env->cc_src = (eflags & ~(CC_C | CC_O)) |
|
|
| 67 | 67 |
(lshift(src ^ t0, 11 - (DATA_BITS - 1)) & CC_O) | |
| 68 | 68 |
((src >> (DATA_BITS - count)) & CC_C); |
| 69 |
} else {
|
|
| 70 |
env->cc_tmp = -1; |
|
| 71 | 69 |
} |
| 72 | 70 |
return t0; |
| 73 | 71 |
} |
| ... | ... | |
| 86 | 84 |
count = rclb_table[count]; |
| 87 | 85 |
#endif |
| 88 | 86 |
if (count) {
|
| 89 |
eflags = helper_cc_compute_all(env, CC_OP);
|
|
| 87 |
eflags = env->cc_src;
|
|
| 90 | 88 |
t0 &= DATA_MASK; |
| 91 | 89 |
src = t0; |
| 92 | 90 |
res = (t0 >> count) | |
| ... | ... | |
| 95 | 93 |
res |= t0 << (DATA_BITS + 1 - count); |
| 96 | 94 |
} |
| 97 | 95 |
t0 = res; |
| 98 |
env->cc_tmp = (eflags & ~(CC_C | CC_O)) |
|
|
| 96 |
env->cc_src = (eflags & ~(CC_C | CC_O)) |
|
|
| 99 | 97 |
(lshift(src ^ t0, 11 - (DATA_BITS - 1)) & CC_O) | |
| 100 | 98 |
((src >> (count - 1)) & CC_C); |
| 101 |
} else {
|
|
| 102 |
env->cc_tmp = -1; |
|
| 103 | 99 |
} |
| 104 | 100 |
return t0; |
| 105 | 101 |
} |
| b/target-i386/translate.c | ||
|---|---|---|
| 51 | 51 |
|
| 52 | 52 |
/* global register indexes */ |
| 53 | 53 |
static TCGv_ptr cpu_env; |
| 54 |
static TCGv cpu_A0, cpu_cc_src, cpu_cc_dst, cpu_cc_tmp;
|
|
| 54 |
static TCGv cpu_A0, cpu_cc_src, cpu_cc_dst; |
|
| 55 | 55 |
static TCGv_i32 cpu_cc_op; |
| 56 | 56 |
static TCGv cpu_regs[CPU_NB_REGS]; |
| 57 | 57 |
/* local temps */ |
| ... | ... | |
| 1706 | 1706 |
static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1, |
| 1707 | 1707 |
int is_right) |
| 1708 | 1708 |
{
|
| 1709 |
int label1; |
|
| 1710 |
|
|
| 1711 | 1709 |
if (s->cc_op != CC_OP_DYNAMIC) |
| 1712 | 1710 |
gen_op_set_cc_op(s->cc_op); |
| 1711 |
gen_compute_eflags(cpu_cc_src); |
|
| 1712 |
tcg_gen_discard_tl(cpu_cc_dst); |
|
| 1713 |
s->cc_op = CC_OP_EFLAGS; |
|
| 1713 | 1714 |
|
| 1714 | 1715 |
/* load */ |
| 1715 | 1716 |
if (op1 == OR_TMP0) |
| ... | ... | |
| 1757 | 1758 |
gen_op_st_T0_A0(ot + s->mem_index); |
| 1758 | 1759 |
else |
| 1759 | 1760 |
gen_op_mov_reg_T0(ot, op1); |
| 1760 |
|
|
| 1761 |
/* update eflags */ |
|
| 1762 |
label1 = gen_new_label(); |
|
| 1763 |
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cc_tmp, -1, label1); |
|
| 1764 |
|
|
| 1765 |
tcg_gen_mov_tl(cpu_cc_src, cpu_cc_tmp); |
|
| 1766 |
tcg_gen_discard_tl(cpu_cc_dst); |
|
| 1767 |
tcg_gen_movi_i32(cpu_cc_op, CC_OP_EFLAGS); |
|
| 1768 |
|
|
| 1769 |
gen_set_label(label1); |
|
| 1770 |
s->cc_op = CC_OP_DYNAMIC; /* cannot predict flags after */ |
|
| 1771 | 1761 |
} |
| 1772 | 1762 |
|
| 1773 | 1763 |
/* XXX: add faster immediate case */ |
| ... | ... | |
| 7763 | 7753 |
"cc_src"); |
| 7764 | 7754 |
cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_dst), |
| 7765 | 7755 |
"cc_dst"); |
| 7766 |
cpu_cc_tmp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_tmp), |
|
| 7767 |
"cc_tmp"); |
|
| 7768 | 7756 |
|
| 7769 | 7757 |
#ifdef TARGET_X86_64 |
| 7770 | 7758 |
cpu_regs[R_EAX] = tcg_global_mem_new_i64(TCG_AREG0, |
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