Revision f5847c91 target-i386/translate.c
| b/target-i386/translate.c | ||
|---|---|---|
| 51 | 51 |
|
| 52 | 52 |
/* global register indexes */ |
| 53 | 53 |
static TCGv_ptr cpu_env; |
| 54 |
static TCGv cpu_A0, cpu_cc_src, cpu_cc_dst, cpu_cc_tmp;
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|
| 54 |
static TCGv cpu_A0, cpu_cc_src, cpu_cc_dst; |
|
| 55 | 55 |
static TCGv_i32 cpu_cc_op; |
| 56 | 56 |
static TCGv cpu_regs[CPU_NB_REGS]; |
| 57 | 57 |
/* local temps */ |
| ... | ... | |
| 1706 | 1706 |
static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1, |
| 1707 | 1707 |
int is_right) |
| 1708 | 1708 |
{
|
| 1709 |
int label1; |
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| 1710 |
|
|
| 1711 | 1709 |
if (s->cc_op != CC_OP_DYNAMIC) |
| 1712 | 1710 |
gen_op_set_cc_op(s->cc_op); |
| 1711 |
gen_compute_eflags(cpu_cc_src); |
|
| 1712 |
tcg_gen_discard_tl(cpu_cc_dst); |
|
| 1713 |
s->cc_op = CC_OP_EFLAGS; |
|
| 1713 | 1714 |
|
| 1714 | 1715 |
/* load */ |
| 1715 | 1716 |
if (op1 == OR_TMP0) |
| ... | ... | |
| 1757 | 1758 |
gen_op_st_T0_A0(ot + s->mem_index); |
| 1758 | 1759 |
else |
| 1759 | 1760 |
gen_op_mov_reg_T0(ot, op1); |
| 1760 |
|
|
| 1761 |
/* update eflags */ |
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label1 = gen_new_label(); |
|
| 1763 |
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cc_tmp, -1, label1); |
|
| 1764 |
|
|
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tcg_gen_mov_tl(cpu_cc_src, cpu_cc_tmp); |
|
| 1766 |
tcg_gen_discard_tl(cpu_cc_dst); |
|
| 1767 |
tcg_gen_movi_i32(cpu_cc_op, CC_OP_EFLAGS); |
|
| 1768 |
|
|
| 1769 |
gen_set_label(label1); |
|
| 1770 |
s->cc_op = CC_OP_DYNAMIC; /* cannot predict flags after */ |
|
| 1771 | 1761 |
} |
| 1772 | 1762 |
|
| 1773 | 1763 |
/* XXX: add faster immediate case */ |
| ... | ... | |
| 7763 | 7753 |
"cc_src"); |
| 7764 | 7754 |
cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_dst), |
| 7765 | 7755 |
"cc_dst"); |
| 7766 |
cpu_cc_tmp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_tmp), |
|
| 7767 |
"cc_tmp"); |
|
| 7768 | 7756 |
|
| 7769 | 7757 |
#ifdef TARGET_X86_64 |
| 7770 | 7758 |
cpu_regs[R_EAX] = tcg_global_mem_new_i64(TCG_AREG0, |
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