Revision f5cbc474
b/hw/escc.c | ||
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719 | 719 |
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720 | 720 |
} |
721 | 721 |
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722 |
int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chr1,
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|
723 |
CharDriverState *chr2, int clock, int it_shift)
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|
722 |
int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
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723 |
CharDriverState *chrB, int clock, int it_shift)
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724 | 724 |
{ |
725 | 725 |
int escc_io_memory, i; |
726 | 726 |
SerialState *s; |
... | ... | |
737 | 737 |
escc_io_memory); |
738 | 738 |
|
739 | 739 |
s->it_shift = it_shift; |
740 |
s->chn[0].chr = chr1;
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741 |
s->chn[1].chr = chr2;
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740 |
s->chn[0].chr = chrB;
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741 |
s->chn[1].chr = chrA;
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742 | 742 |
s->chn[0].disabled = 0; |
743 | 743 |
s->chn[1].disabled = 0; |
744 | 744 |
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b/hw/escc.h | ||
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1 | 1 |
/* escc.c */ |
2 | 2 |
#define ESCC_SIZE 4 |
3 |
int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chr1,
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4 |
CharDriverState *chr2, int clock, int it_shift);
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3 |
int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
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4 |
CharDriverState *chrB, int clock, int it_shift);
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5 | 5 |
|
6 | 6 |
void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq, |
7 | 7 |
int disabled, int clock, int it_shift); |
b/hw/sun4m.c | ||
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1564 | 1564 |
nographic, ESCC_CLOCK, 1); |
1565 | 1565 |
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device |
1566 | 1566 |
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device |
1567 |
escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[1],
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1568 |
serial_hds[0], ESCC_CLOCK, 1);
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1567 |
escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[0],
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1568 |
serial_hds[1], ESCC_CLOCK, 1);
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1569 | 1569 |
|
1570 | 1570 |
slavio_misc = slavio_misc_init(0, 0, hwdef->aux1_base, 0, |
1571 | 1571 |
slavio_irq[hwdef->me_irq], NULL, &fdc_tc); |
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