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1 | 626df76a | bellard | include config.mak |
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2 | 626df76a | bellard | |
3 | 0b0babc6 | bellard | TARGET_BASE_ARCH:=$(TARGET_ARCH) |
4 | 0b0babc6 | bellard | ifeq ($(TARGET_ARCH), x86_64) |
5 | 0b0babc6 | bellard | TARGET_BASE_ARCH:=i386 |
6 | 0b0babc6 | bellard | endif |
7 | 64b3ab24 | bellard | ifeq ($(TARGET_ARCH), sparc64) |
8 | 64b3ab24 | bellard | TARGET_BASE_ARCH:=sparc |
9 | 64b3ab24 | bellard | endif |
10 | 0b0babc6 | bellard | TARGET_PATH=$(SRC_PATH)/target-$(TARGET_BASE_ARCH) |
11 | 85571bc7 | bellard | VPATH=$(SRC_PATH):$(TARGET_PATH):$(SRC_PATH)/hw:$(SRC_PATH)/audio |
12 | 3035f7ff | bellard | DEFINES=-I. -I$(TARGET_PATH) -I$(SRC_PATH) |
13 | 3035f7ff | bellard | ifdef CONFIG_USER_ONLY |
14 | 3035f7ff | bellard | VPATH+=:$(SRC_PATH)/linux-user |
15 | 3035f7ff | bellard | DEFINES+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH) |
16 | 3035f7ff | bellard | endif |
17 | ab2572d7 | bellard | CFLAGS=-Wall -O2 -g -fno-strict-aliasing |
18 | 0b0babc6 | bellard | #CFLAGS+=-Werror |
19 | 626df76a | bellard | LDFLAGS=-g |
20 | 626df76a | bellard | LIBS= |
21 | 626df76a | bellard | HELPER_CFLAGS=$(CFLAGS) |
22 | 67b915a5 | bellard | DYNGEN=../dyngen$(EXESUF) |
23 | 1e43adfc | bellard | # user emulator name |
24 | 808c4954 | bellard | ifeq ($(TARGET_ARCH),arm) |
25 | 808c4954 | bellard | ifeq ($(TARGET_WORDS_BIGENDIAN),yes) |
26 | 808c4954 | bellard | QEMU_USER=qemu-armeb |
27 | 808c4954 | bellard | else |
28 | 808c4954 | bellard | QEMU_USER=qemu-arm |
29 | 808c4954 | bellard | endif |
30 | 808c4954 | bellard | else |
31 | 808c4954 | bellard | QEMU_USER=qemu-$(TARGET_ARCH) |
32 | 808c4954 | bellard | endif |
33 | 1e43adfc | bellard | # system emulator name |
34 | 1e43adfc | bellard | ifdef CONFIG_SOFTMMU |
35 | a541f297 | bellard | ifeq ($(TARGET_ARCH), i386) |
36 | 67b915a5 | bellard | QEMU_SYSTEM=qemu$(EXESUF) |
37 | 0db63474 | bellard | else |
38 | a541f297 | bellard | QEMU_SYSTEM=qemu-system-$(TARGET_ARCH)$(EXESUF) |
39 | a541f297 | bellard | endif |
40 | a541f297 | bellard | else |
41 | 0db63474 | bellard | QEMU_SYSTEM=qemu-fast |
42 | 1e43adfc | bellard | endif |
43 | 1e43adfc | bellard | |
44 | 16e9b7de | bellard | ifdef CONFIG_USER_ONLY |
45 | 1e43adfc | bellard | PROGS=$(QEMU_USER) |
46 | 16e9b7de | bellard | else |
47 | c321f673 | bellard | PROGS+=$(QEMU_SYSTEM) |
48 | de5eaa64 | bellard | ifndef CONFIG_SOFTMMU |
49 | de5eaa64 | bellard | CONFIG_STATIC=y |
50 | de5eaa64 | bellard | endif |
51 | 728c9fd5 | bellard | endif # !CONFIG_USER_ONLY |
52 | 626df76a | bellard | |
53 | 626df76a | bellard | ifdef CONFIG_STATIC |
54 | 626df76a | bellard | LDFLAGS+=-static |
55 | 626df76a | bellard | endif |
56 | 626df76a | bellard | |
57 | 626df76a | bellard | ifeq ($(ARCH),i386) |
58 | 626df76a | bellard | CFLAGS+=-fomit-frame-pointer |
59 | 626df76a | bellard | OP_CFLAGS=$(CFLAGS) -mpreferred-stack-boundary=2 |
60 | 626df76a | bellard | ifeq ($(HAVE_GCC3_OPTIONS),yes) |
61 | 3611a29c | bellard | OP_CFLAGS+= -falign-functions=0 -fno-gcse |
62 | 626df76a | bellard | else |
63 | 626df76a | bellard | OP_CFLAGS+= -malign-functions=0 |
64 | 626df76a | bellard | endif |
65 | 3a4739d6 | bellard | |
66 | 626df76a | bellard | ifdef TARGET_GPROF |
67 | 3a4739d6 | bellard | USE_I386_LD=y |
68 | 3a4739d6 | bellard | endif |
69 | 3a4739d6 | bellard | ifdef CONFIG_STATIC |
70 | 3a4739d6 | bellard | USE_I386_LD=y |
71 | 3a4739d6 | bellard | endif |
72 | 3a4739d6 | bellard | ifdef USE_I386_LD |
73 | 626df76a | bellard | LDFLAGS+=-Wl,-T,$(SRC_PATH)/i386.ld |
74 | 626df76a | bellard | else |
75 | 626df76a | bellard | # WARNING: this LDFLAGS is _very_ tricky : qemu is an ELF shared object |
76 | 626df76a | bellard | # that the kernel ELF loader considers as an executable. I think this |
77 | 626df76a | bellard | # is the simplest way to make it self virtualizable! |
78 | 626df76a | bellard | LDFLAGS+=-Wl,-shared |
79 | 626df76a | bellard | endif |
80 | 626df76a | bellard | endif |
81 | 626df76a | bellard | |
82 | 0b0babc6 | bellard | ifeq ($(ARCH),x86_64) |
83 | bc51c5c9 | bellard | OP_CFLAGS=$(CFLAGS) -falign-functions=0 |
84 | 0b0babc6 | bellard | LDFLAGS+=-Wl,-T,$(SRC_PATH)/x86_64.ld |
85 | bc51c5c9 | bellard | endif |
86 | bc51c5c9 | bellard | |
87 | 626df76a | bellard | ifeq ($(ARCH),ppc) |
88 | 83fb7adf | bellard | CFLAGS+= -D__powerpc__ |
89 | 626df76a | bellard | OP_CFLAGS=$(CFLAGS) |
90 | 626df76a | bellard | LDFLAGS+=-Wl,-T,$(SRC_PATH)/ppc.ld |
91 | 626df76a | bellard | endif |
92 | 626df76a | bellard | |
93 | 626df76a | bellard | ifeq ($(ARCH),s390) |
94 | 626df76a | bellard | OP_CFLAGS=$(CFLAGS) |
95 | 626df76a | bellard | LDFLAGS+=-Wl,-T,$(SRC_PATH)/s390.ld |
96 | 626df76a | bellard | endif |
97 | 626df76a | bellard | |
98 | 626df76a | bellard | ifeq ($(ARCH),sparc) |
99 | 626df76a | bellard | CFLAGS+=-m32 -ffixed-g1 -ffixed-g2 -ffixed-g3 -ffixed-g6 |
100 | 626df76a | bellard | LDFLAGS+=-m32 |
101 | 626df76a | bellard | OP_CFLAGS=$(CFLAGS) -fno-delayed-branch -ffixed-i0 |
102 | 626df76a | bellard | HELPER_CFLAGS=$(CFLAGS) -ffixed-i0 -mflat |
103 | 626df76a | bellard | # -static is used to avoid g1/g3 usage by the dynamic linker |
104 | 626df76a | bellard | LDFLAGS+=-Wl,-T,$(SRC_PATH)/sparc.ld -static |
105 | 626df76a | bellard | endif |
106 | 626df76a | bellard | |
107 | 626df76a | bellard | ifeq ($(ARCH),sparc64) |
108 | 626df76a | bellard | CFLAGS+=-m64 -ffixed-g1 -ffixed-g2 -ffixed-g3 -ffixed-g6 |
109 | 626df76a | bellard | LDFLAGS+=-m64 |
110 | 626df76a | bellard | OP_CFLAGS=$(CFLAGS) -fno-delayed-branch -ffixed-i0 |
111 | 626df76a | bellard | endif |
112 | 626df76a | bellard | |
113 | 626df76a | bellard | ifeq ($(ARCH),alpha) |
114 | 626df76a | bellard | # -msmall-data is not used because we want two-instruction relocations |
115 | 626df76a | bellard | # for the constant constructions |
116 | 626df76a | bellard | OP_CFLAGS=-Wall -O2 -g |
117 | 626df76a | bellard | # Ensure there's only a single GP |
118 | 626df76a | bellard | CFLAGS += -msmall-data |
119 | 626df76a | bellard | LDFLAGS+=-Wl,-T,$(SRC_PATH)/alpha.ld |
120 | 626df76a | bellard | endif |
121 | 626df76a | bellard | |
122 | 626df76a | bellard | ifeq ($(ARCH),ia64) |
123 | b8076a74 | bellard | CFLAGS += -mno-sdata |
124 | 626df76a | bellard | OP_CFLAGS=$(CFLAGS) |
125 | b8076a74 | bellard | LDFLAGS+=-Wl,-G0 -Wl,-T,$(SRC_PATH)/ia64.ld |
126 | 626df76a | bellard | endif |
127 | 626df76a | bellard | |
128 | 626df76a | bellard | ifeq ($(ARCH),arm) |
129 | ba68055e | bellard | OP_CFLAGS=$(CFLAGS) -mno-sched-prolog -fno-omit-frame-pointer |
130 | 626df76a | bellard | LDFLAGS+=-Wl,-T,$(SRC_PATH)/arm.ld |
131 | 626df76a | bellard | endif |
132 | 626df76a | bellard | |
133 | 38e584a0 | bellard | ifeq ($(ARCH),m68k) |
134 | 38e584a0 | bellard | OP_CFLAGS=$(CFLAGS) -fomit-frame-pointer |
135 | 38e584a0 | bellard | LDFLAGS+=-Wl,-T,m68k.ld |
136 | 38e584a0 | bellard | endif |
137 | 38e584a0 | bellard | |
138 | 626df76a | bellard | ifeq ($(HAVE_GCC3_OPTIONS),yes) |
139 | 626df76a | bellard | # very important to generate a return at the end of every operation |
140 | 626df76a | bellard | OP_CFLAGS+=-fno-reorder-blocks -fno-optimize-sibling-calls |
141 | 626df76a | bellard | endif |
142 | 626df76a | bellard | |
143 | 83fb7adf | bellard | ifeq ($(CONFIG_DARWIN),yes) |
144 | 83fb7adf | bellard | OP_CFLAGS+= -mdynamic-no-pic |
145 | e80cfcfc | bellard | LIBS+=-lmx |
146 | 83fb7adf | bellard | endif |
147 | 83fb7adf | bellard | |
148 | 626df76a | bellard | ######################################################### |
149 | 626df76a | bellard | |
150 | d5249393 | bellard | DEFINES+=-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE |
151 | 626df76a | bellard | LIBS+=-lm |
152 | b932caba | bellard | ifndef CONFIG_USER_ONLY |
153 | b932caba | bellard | LIBS+=-lz |
154 | b932caba | bellard | endif |
155 | 67b915a5 | bellard | ifdef CONFIG_WIN32 |
156 | 3db38e87 | bellard | LIBS+=-lwinmm -lws2_32 -liphlpapi |
157 | 67b915a5 | bellard | endif |
158 | 626df76a | bellard | |
159 | 626df76a | bellard | # profiling code |
160 | 626df76a | bellard | ifdef TARGET_GPROF |
161 | 626df76a | bellard | LDFLAGS+=-p |
162 | 626df76a | bellard | main.o: CFLAGS+=-p |
163 | 626df76a | bellard | endif |
164 | 626df76a | bellard | |
165 | 3035f7ff | bellard | OBJS= elfload.o main.o syscall.o mmap.o signal.o path.o osdep.o thunk.o |
166 | 626df76a | bellard | ifeq ($(TARGET_ARCH), i386) |
167 | 626df76a | bellard | OBJS+= vm86.o |
168 | 626df76a | bellard | endif |
169 | f72b519c | bellard | ifeq ($(TARGET_ARCH), arm) |
170 | 158142c2 | bellard | OBJS+=nwfpe/fpa11.o nwfpe/fpa11_cpdo.o \ |
171 | f72b519c | bellard | nwfpe/fpa11_cpdt.o nwfpe/fpa11_cprt.o nwfpe/fpopcode.o nwfpe/single_cpdo.o \ |
172 | a4f81979 | bellard | nwfpe/double_cpdo.o nwfpe/extended_cpdo.o arm-semi.o |
173 | f72b519c | bellard | endif |
174 | 626df76a | bellard | SRCS:= $(OBJS:.o=.c) |
175 | 626df76a | bellard | OBJS+= libqemu.a |
176 | 626df76a | bellard | |
177 | 626df76a | bellard | # cpu emulator library |
178 | 158142c2 | bellard | LIBOBJS=exec.o kqemu.o translate-op.o translate-all.o cpu-exec.o\ |
179 | e3086fbf | bellard | translate.o op.o |
180 | 158142c2 | bellard | ifdef CONFIG_SOFTFLOAT |
181 | 158142c2 | bellard | LIBOBJS+=fpu/softfloat.o |
182 | 158142c2 | bellard | else |
183 | 158142c2 | bellard | LIBOBJS+=fpu/softfloat-native.o |
184 | 158142c2 | bellard | endif |
185 | 158142c2 | bellard | DEFINES+=-I$(SRC_PATH)/fpu |
186 | 626df76a | bellard | |
187 | 626df76a | bellard | ifeq ($(TARGET_ARCH), i386) |
188 | 1e43adfc | bellard | LIBOBJS+=helper.o helper2.o |
189 | f72b519c | bellard | ifeq ($(ARCH), i386) |
190 | f72b519c | bellard | LIBOBJS+=translate-copy.o |
191 | f72b519c | bellard | endif |
192 | 626df76a | bellard | endif |
193 | 626df76a | bellard | |
194 | 0b0babc6 | bellard | ifeq ($(TARGET_ARCH), x86_64) |
195 | 0b0babc6 | bellard | LIBOBJS+=helper.o helper2.o |
196 | 0b0babc6 | bellard | endif |
197 | 0b0babc6 | bellard | |
198 | 67867308 | bellard | ifeq ($(TARGET_ARCH), ppc) |
199 | 728c9fd5 | bellard | LIBOBJS+= op_helper.o helper.o |
200 | 67867308 | bellard | endif |
201 | 67867308 | bellard | |
202 | 6af0bf9c | bellard | ifeq ($(TARGET_ARCH), mips) |
203 | 6af0bf9c | bellard | LIBOBJS+= op_helper.o helper.o |
204 | 6af0bf9c | bellard | endif |
205 | 6af0bf9c | bellard | |
206 | 64b3ab24 | bellard | ifeq ($(TARGET_BASE_ARCH), sparc) |
207 | e95c8d51 | bellard | LIBOBJS+= op_helper.o helper.o |
208 | e95c8d51 | bellard | endif |
209 | e95c8d51 | bellard | |
210 | b7bcbe95 | bellard | ifeq ($(TARGET_BASE_ARCH), arm) |
211 | b7bcbe95 | bellard | LIBOBJS+= op_helper.o |
212 | b7bcbe95 | bellard | endif |
213 | b7bcbe95 | bellard | |
214 | 626df76a | bellard | # NOTE: the disassembler code is only needed for debugging |
215 | 626df76a | bellard | LIBOBJS+=disas.o |
216 | 626df76a | bellard | ifeq ($(findstring i386, $(TARGET_ARCH) $(ARCH)),i386) |
217 | bc51c5c9 | bellard | USE_I386_DIS=y |
218 | bc51c5c9 | bellard | endif |
219 | 0b0babc6 | bellard | ifeq ($(findstring x86_64, $(TARGET_ARCH) $(ARCH)),x86_64) |
220 | bc51c5c9 | bellard | USE_I386_DIS=y |
221 | bc51c5c9 | bellard | endif |
222 | bc51c5c9 | bellard | ifdef USE_I386_DIS |
223 | 626df76a | bellard | LIBOBJS+=i386-dis.o |
224 | 626df76a | bellard | endif |
225 | 626df76a | bellard | ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha) |
226 | 626df76a | bellard | LIBOBJS+=alpha-dis.o |
227 | 626df76a | bellard | endif |
228 | 626df76a | bellard | ifeq ($(findstring ppc, $(TARGET_ARCH) $(ARCH)),ppc) |
229 | 626df76a | bellard | LIBOBJS+=ppc-dis.o |
230 | 626df76a | bellard | endif |
231 | 6af0bf9c | bellard | ifeq ($(findstring mips, $(TARGET_ARCH) $(ARCH)),mips) |
232 | 6af0bf9c | bellard | LIBOBJS+=mips-dis.o |
233 | 6af0bf9c | bellard | endif |
234 | 64b3ab24 | bellard | ifeq ($(findstring sparc, $(TARGET_BASE_ARCH) $(ARCH)),sparc) |
235 | 626df76a | bellard | LIBOBJS+=sparc-dis.o |
236 | 626df76a | bellard | endif |
237 | 626df76a | bellard | ifeq ($(findstring arm, $(TARGET_ARCH) $(ARCH)),arm) |
238 | 626df76a | bellard | LIBOBJS+=arm-dis.o |
239 | 626df76a | bellard | endif |
240 | 626df76a | bellard | |
241 | 626df76a | bellard | ifeq ($(ARCH),ia64) |
242 | 626df76a | bellard | OBJS += ia64-syscall.o |
243 | 626df76a | bellard | endif |
244 | 1fddef4b | bellard | ifdef CONFIG_GDBSTUB |
245 | 1fddef4b | bellard | OBJS+=gdbstub.o |
246 | 1fddef4b | bellard | endif |
247 | 626df76a | bellard | |
248 | 1e43adfc | bellard | all: $(PROGS) |
249 | 626df76a | bellard | |
250 | 1e43adfc | bellard | $(QEMU_USER): $(OBJS) |
251 | 626df76a | bellard | $(CC) $(LDFLAGS) -o $@ $^ $(LIBS) |
252 | 626df76a | bellard | ifeq ($(ARCH),alpha) |
253 | 626df76a | bellard | # Mark as 32 bit binary, i. e. it will be mapped into the low 31 bit of |
254 | 626df76a | bellard | # the address space (31 bit so sign extending doesn't matter) |
255 | 626df76a | bellard | echo -ne '\001\000\000\000' | dd of=qemu bs=1 seek=48 count=4 conv=notrunc |
256 | 626df76a | bellard | endif |
257 | 626df76a | bellard | |
258 | 626df76a | bellard | # must use static linking to avoid leaving stuff in virtual address space |
259 | 6a0f9e82 | bellard | VL_OBJS=vl.o osdep.o block.o readline.o monitor.o pci.o console.o |
260 | de167e41 | bellard | VL_OBJS+=block-cow.o block-qcow.o aes.o block-vmdk.o block-cloop.o block-dmg.o block-bochs.o block-vpc.o block-vvfat.o |
261 | a541f297 | bellard | |
262 | 85571bc7 | bellard | SOUND_HW = sb16.o |
263 | 7372f88d | bellard | AUDIODRV = audio.o noaudio.o wavaudio.o |
264 | fb065187 | bellard | ifdef CONFIG_SDL |
265 | fb065187 | bellard | AUDIODRV += sdlaudio.o |
266 | fb065187 | bellard | endif |
267 | fb065187 | bellard | ifdef CONFIG_OSS |
268 | fb065187 | bellard | AUDIODRV += ossaudio.o |
269 | fb065187 | bellard | endif |
270 | fb065187 | bellard | |
271 | fb065187 | bellard | pc.o: DEFINES := -DUSE_SB16 $(DEFINES) |
272 | 85571bc7 | bellard | |
273 | fb065187 | bellard | ifdef CONFIG_ADLIB |
274 | 85571bc7 | bellard | SOUND_HW += fmopl.o adlib.o |
275 | 85571bc7 | bellard | endif |
276 | 85571bc7 | bellard | |
277 | 102a52e4 | bellard | ifdef CONFIG_FMOD |
278 | 85571bc7 | bellard | AUDIODRV += fmodaudio.o |
279 | 102a52e4 | bellard | audio.o fmodaudio.o: DEFINES := -I$(CONFIG_FMOD_INC) $(DEFINES) |
280 | 102a52e4 | bellard | LIBS += $(CONFIG_FMOD_LIB) |
281 | 85571bc7 | bellard | endif |
282 | 85571bc7 | bellard | |
283 | 0b0babc6 | bellard | ifeq ($(TARGET_BASE_ARCH), i386) |
284 | a541f297 | bellard | # Hardware support |
285 | 85571bc7 | bellard | VL_OBJS+= ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) |
286 | 85571bc7 | bellard | VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o |
287 | 6508fe59 | bellard | VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o |
288 | 67b915a5 | bellard | endif |
289 | 728c9fd5 | bellard | ifeq ($(TARGET_ARCH), ppc) |
290 | 85571bc7 | bellard | VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) |
291 | 64201201 | bellard | VL_OBJS+= mc146818rtc.o serial.o i8259.o i8254.o fdc.o m48t59.o |
292 | e68b9b2b | bellard | VL_OBJS+= ppc_prep.o ppc_chrp.o cuda.o adb.o openpic.o heathrow_pic.o mixeng.o |
293 | a541f297 | bellard | endif |
294 | 6af0bf9c | bellard | ifeq ($(TARGET_ARCH), mips) |
295 | 3de388f6 | bellard | VL_OBJS+= mips_r4k.o dma.o vga.o serial.o ne2000.o i8259.o |
296 | 3de388f6 | bellard | #VL_OBJS+= #ide.o pckbd.o i8254.o fdc.o m48t59.o |
297 | 6af0bf9c | bellard | endif |
298 | 64b3ab24 | bellard | ifeq ($(TARGET_BASE_ARCH), sparc) |
299 | 3475187d | bellard | ifeq ($(TARGET_ARCH), sparc64) |
300 | 3475187d | bellard | VL_OBJS+= sun4u.o m48t08.o magic-load.o slavio_serial.o |
301 | 3475187d | bellard | else |
302 | 3475187d | bellard | VL_OBJS+= sun4m.o tcx.o lance.o iommu.o m48t08.o magic-load.o slavio_intctl.o slavio_timer.o slavio_serial.o slavio_misc.o fdc.o esp.o |
303 | 3475187d | bellard | endif |
304 | e95c8d51 | bellard | endif |
305 | a541f297 | bellard | ifdef CONFIG_GDBSTUB |
306 | a541f297 | bellard | VL_OBJS+=gdbstub.o |
307 | 728c9fd5 | bellard | endif |
308 | 626df76a | bellard | ifdef CONFIG_SDL |
309 | 626df76a | bellard | VL_OBJS+=sdl.o |
310 | de5eaa64 | bellard | endif |
311 | 5b0753e0 | bellard | ifdef CONFIG_COCOA |
312 | 5b0753e0 | bellard | VL_OBJS+=cocoa.o |
313 | 5b0753e0 | bellard | COCOA_LIBS=-F/System/Library/Frameworks -framework Cocoa |
314 | 5b0753e0 | bellard | endif |
315 | 7c1f25b4 | bellard | ifdef CONFIG_SLIRP |
316 | 7c1f25b4 | bellard | DEFINES+=-I$(SRC_PATH)/slirp |
317 | 7c1f25b4 | bellard | SLIRP_OBJS=cksum.o if.o ip_icmp.o ip_input.o ip_output.o \ |
318 | 7c1f25b4 | bellard | slirp.o mbuf.o misc.o sbuf.o socket.o tcp_input.o tcp_output.o \ |
319 | c7f74643 | bellard | tcp_subr.o tcp_timer.o udp.o bootp.o debug.o tftp.o |
320 | 7c1f25b4 | bellard | VL_OBJS+=$(addprefix slirp/, $(SLIRP_OBJS)) |
321 | 626df76a | bellard | endif |
322 | 626df76a | bellard | |
323 | c321f673 | bellard | VL_LDFLAGS= |
324 | c321f673 | bellard | # specific flags are needed for non soft mmu emulator |
325 | c321f673 | bellard | ifdef CONFIG_STATIC |
326 | c321f673 | bellard | VL_LDFLAGS+=-static |
327 | c321f673 | bellard | endif |
328 | de5eaa64 | bellard | ifndef CONFIG_SOFTMMU |
329 | de5eaa64 | bellard | VL_LDFLAGS+=-Wl,-T,$(SRC_PATH)/i386-vl.ld |
330 | de5eaa64 | bellard | endif |
331 | 83fb7adf | bellard | ifndef CONFIG_DARWIN |
332 | 11d9f695 | bellard | ifndef CONFIG_WIN32 |
333 | 11d9f695 | bellard | VL_LIBS=-lutil |
334 | 11d9f695 | bellard | endif |
335 | 83fb7adf | bellard | endif |
336 | e3086fbf | bellard | ifdef TARGET_GPROF |
337 | e3086fbf | bellard | vl.o: CFLAGS+=-p |
338 | e3086fbf | bellard | VL_LDFLAGS+=-p |
339 | e3086fbf | bellard | endif |
340 | c321f673 | bellard | |
341 | b8076a74 | bellard | ifeq ($(ARCH),ia64) |
342 | b8076a74 | bellard | VL_LDFLAGS+=-Wl,-G0 -Wl,-T,$(SRC_PATH)/ia64.ld |
343 | b8076a74 | bellard | endif |
344 | b8076a74 | bellard | |
345 | 1e43adfc | bellard | $(QEMU_SYSTEM): $(VL_OBJS) libqemu.a |
346 | 5b0753e0 | bellard | $(CC) $(VL_LDFLAGS) -o $@ $^ $(LIBS) $(SDL_LIBS) $(COCOA_LIBS) $(VL_LIBS) |
347 | 5b0753e0 | bellard | |
348 | 5b0753e0 | bellard | cocoa.o: cocoa.m |
349 | 5b0753e0 | bellard | $(CC) $(CFLAGS) $(DEFINES) -c -o $@ $< |
350 | 626df76a | bellard | |
351 | 3d11d0eb | bellard | sdl.o: sdl.c keymaps.c sdl_keysym.h |
352 | 626df76a | bellard | $(CC) $(CFLAGS) $(DEFINES) $(SDL_CFLAGS) -c -o $@ $< |
353 | 626df76a | bellard | |
354 | 9f059eca | bellard | sdlaudio.o: sdlaudio.c |
355 | 9f059eca | bellard | $(CC) $(CFLAGS) $(DEFINES) $(SDL_CFLAGS) -c -o $@ $< |
356 | 9f059eca | bellard | |
357 | 626df76a | bellard | depend: $(SRCS) |
358 | 16e9b7de | bellard | $(CC) -MM $(CFLAGS) $(DEFINES) $^ 1>.depend |
359 | 626df76a | bellard | |
360 | 626df76a | bellard | # libqemu |
361 | 626df76a | bellard | |
362 | 626df76a | bellard | libqemu.a: $(LIBOBJS) |
363 | 626df76a | bellard | rm -f $@ |
364 | 626df76a | bellard | $(AR) rcs $@ $(LIBOBJS) |
365 | 626df76a | bellard | |
366 | 1e43adfc | bellard | translate.o: translate.c gen-op.h opc.h cpu.h |
367 | 626df76a | bellard | |
368 | 158142c2 | bellard | translate-all.o: translate-all.c opc.h cpu.h |
369 | 158142c2 | bellard | |
370 | 158142c2 | bellard | translate-op.o: translate-all.c op.h opc.h cpu.h |
371 | 626df76a | bellard | |
372 | 1e43adfc | bellard | op.h: op.o $(DYNGEN) |
373 | 626df76a | bellard | $(DYNGEN) -o $@ $< |
374 | 626df76a | bellard | |
375 | 1e43adfc | bellard | opc.h: op.o $(DYNGEN) |
376 | 626df76a | bellard | $(DYNGEN) -c -o $@ $< |
377 | 626df76a | bellard | |
378 | 1e43adfc | bellard | gen-op.h: op.o $(DYNGEN) |
379 | 626df76a | bellard | $(DYNGEN) -g -o $@ $< |
380 | 626df76a | bellard | |
381 | 1e43adfc | bellard | op.o: op.c |
382 | 626df76a | bellard | $(CC) $(OP_CFLAGS) $(DEFINES) -c -o $@ $< |
383 | 626df76a | bellard | |
384 | 1e43adfc | bellard | helper.o: helper.c |
385 | 626df76a | bellard | $(CC) $(HELPER_CFLAGS) $(DEFINES) -c -o $@ $< |
386 | 626df76a | bellard | |
387 | 0b0babc6 | bellard | ifeq ($(TARGET_BASE_ARCH), i386) |
388 | 664e0f19 | bellard | op.o: op.c opreg_template.h ops_template.h ops_template_mem.h ops_mem.h ops_sse.h |
389 | 1e43adfc | bellard | endif |
390 | 1e43adfc | bellard | |
391 | 1e43adfc | bellard | ifeq ($(TARGET_ARCH), arm) |
392 | 1e43adfc | bellard | op.o: op.c op_template.h |
393 | 1e43adfc | bellard | endif |
394 | 626df76a | bellard | |
395 | 64b3ab24 | bellard | ifeq ($(TARGET_BASE_ARCH), sparc) |
396 | 3475187d | bellard | op.o: op.c op_template.h op_mem.h fop_template.h fbranch_template.h |
397 | 3475187d | bellard | magic_load.o: elf_op.h |
398 | 1e43adfc | bellard | endif |
399 | 626df76a | bellard | |
400 | 728c9fd5 | bellard | ifeq ($(TARGET_ARCH), ppc) |
401 | 728c9fd5 | bellard | op.o: op.c op_template.h op_mem.h |
402 | 728c9fd5 | bellard | op_helper.o: op_helper_mem.h |
403 | 3fc6c082 | bellard | translate.o: translate.c translate_init.c |
404 | 728c9fd5 | bellard | endif |
405 | 728c9fd5 | bellard | |
406 | 6af0bf9c | bellard | ifeq ($(TARGET_ARCH), mips) |
407 | 6af0bf9c | bellard | op.o: op.c op_template.c op_mem.c |
408 | 6af0bf9c | bellard | op_helper.o: op_helper_mem.c |
409 | 6af0bf9c | bellard | endif |
410 | 6af0bf9c | bellard | |
411 | 85571bc7 | bellard | mixeng.o: mixeng.c mixeng.h mixeng_template.h |
412 | 85571bc7 | bellard | |
413 | 626df76a | bellard | %.o: %.c |
414 | 626df76a | bellard | $(CC) $(CFLAGS) $(DEFINES) -c -o $@ $< |
415 | 626df76a | bellard | |
416 | f72b519c | bellard | %.o: %.S |
417 | f72b519c | bellard | $(CC) $(DEFINES) -c -o $@ $< |
418 | f72b519c | bellard | |
419 | 626df76a | bellard | clean: |
420 | e362b55a | bellard | rm -f *.o *.a *~ $(PROGS) gen-op.h opc.h op.h nwfpe/*.o slirp/*.o fpu/*.o |
421 | 1e43adfc | bellard | |
422 | 1e43adfc | bellard | install: all |
423 | 9b14bb04 | bellard | ifneq ($(PROGS),) |
424 | 11d9f695 | bellard | install -m 755 -s $(PROGS) "$(bindir)" |
425 | 9b14bb04 | bellard | endif |
426 | 626df76a | bellard | |
427 | 626df76a | bellard | ifneq ($(wildcard .depend),) |
428 | 626df76a | bellard | include .depend |
429 | 626df76a | bellard | endif |