root / hw / m48t08.c @ f68c781c
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/*
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* QEMU M48T08 NVRAM emulation for Sparc platform
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*
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* Copyright (c) 2003-2004 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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#include "m48t08.h" |
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//#define DEBUG_NVRAM
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#if defined(DEBUG_NVRAM)
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#define NVRAM_PRINTF(fmt, args...) do { printf(fmt , ##args); } while (0) |
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#else
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#define NVRAM_PRINTF(fmt, args...) do { } while (0) |
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#endif
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#define NVRAM_MAX_MEM 0x1ff0 |
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#define NVRAM_MAXADDR 0x1fff |
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struct m48t08_t {
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/* RTC management */
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time_t time_offset; |
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time_t stop_time; |
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/* NVRAM storage */
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uint8_t *buffer; |
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}; |
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/* Fake timer functions */
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/* Generic helpers for BCD */
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static inline uint8_t toBCD (uint8_t value) |
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{ |
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return (((value / 10) % 10) << 4) | (value % 10); |
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} |
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static inline uint8_t fromBCD (uint8_t BCD) |
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{ |
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return ((BCD >> 4) * 10) + (BCD & 0x0F); |
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} |
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/* RTC management helpers */
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static void get_time (m48t08_t *NVRAM, struct tm *tm) |
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{ |
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time_t t; |
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t = time(NULL) + NVRAM->time_offset;
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#ifdef _WIN32
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memcpy(tm,localtime(&t),sizeof(*tm));
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#else
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localtime_r (&t, tm) ; |
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#endif
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} |
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static void set_time (m48t08_t *NVRAM, struct tm *tm) |
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{ |
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time_t now, new_time; |
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new_time = mktime(tm); |
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now = time(NULL);
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NVRAM->time_offset = new_time - now; |
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} |
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/* Direct access to NVRAM */
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void m48t08_write (m48t08_t *NVRAM, uint32_t addr, uint8_t val)
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{ |
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struct tm tm;
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int tmp;
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addr &= NVRAM_MAXADDR; |
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switch (addr) {
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case 0x1FF8: |
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/* control */
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NVRAM->buffer[0x1FF8] = (val & ~0xA0) | 0x90; |
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break;
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case 0x1FF9: |
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/* seconds (BCD) */
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tmp = fromBCD(val & 0x7F);
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if (tmp >= 0 && tmp <= 59) { |
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get_time(NVRAM, &tm); |
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tm.tm_sec = tmp; |
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set_time(NVRAM, &tm); |
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} |
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if ((val & 0x80) ^ (NVRAM->buffer[0x1FF9] & 0x80)) { |
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if (val & 0x80) { |
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NVRAM->stop_time = time(NULL);
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} else {
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NVRAM->time_offset += NVRAM->stop_time - time(NULL);
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NVRAM->stop_time = 0;
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} |
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} |
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NVRAM->buffer[0x1FF9] = val & 0x80; |
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break;
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case 0x1FFA: |
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/* minutes (BCD) */
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tmp = fromBCD(val & 0x7F);
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if (tmp >= 0 && tmp <= 59) { |
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get_time(NVRAM, &tm); |
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tm.tm_min = tmp; |
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set_time(NVRAM, &tm); |
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} |
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break;
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case 0x1FFB: |
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/* hours (BCD) */
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tmp = fromBCD(val & 0x3F);
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if (tmp >= 0 && tmp <= 23) { |
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get_time(NVRAM, &tm); |
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tm.tm_hour = tmp; |
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set_time(NVRAM, &tm); |
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} |
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break;
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case 0x1FFC: |
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/* day of the week / century */
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tmp = fromBCD(val & 0x07);
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get_time(NVRAM, &tm); |
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tm.tm_wday = tmp; |
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set_time(NVRAM, &tm); |
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NVRAM->buffer[0x1FFC] = val & 0x40; |
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break;
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case 0x1FFD: |
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/* date */
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tmp = fromBCD(val & 0x1F);
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if (tmp != 0) { |
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get_time(NVRAM, &tm); |
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tm.tm_mday = tmp; |
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set_time(NVRAM, &tm); |
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} |
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break;
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case 0x1FFE: |
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/* month */
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tmp = fromBCD(val & 0x1F);
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if (tmp >= 1 && tmp <= 12) { |
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get_time(NVRAM, &tm); |
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tm.tm_mon = tmp - 1;
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set_time(NVRAM, &tm); |
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} |
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break;
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case 0x1FFF: |
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/* year */
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tmp = fromBCD(val); |
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if (tmp >= 0 && tmp <= 99) { |
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get_time(NVRAM, &tm); |
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tm.tm_year = fromBCD(val); |
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set_time(NVRAM, &tm); |
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} |
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break;
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default:
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NVRAM->buffer[addr] = val & 0xFF;
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break;
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} |
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} |
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uint8_t m48t08_read (m48t08_t *NVRAM, uint32_t addr) |
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{ |
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struct tm tm;
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uint8_t retval = 0xFF;
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addr &= NVRAM_MAXADDR; |
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switch (addr) {
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case 0x1FF8: |
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/* control */
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goto do_read;
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case 0x1FF9: |
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/* seconds (BCD) */
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get_time(NVRAM, &tm); |
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retval = (NVRAM->buffer[0x1FF9] & 0x80) | toBCD(tm.tm_sec); |
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break;
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case 0x1FFA: |
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/* minutes (BCD) */
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get_time(NVRAM, &tm); |
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retval = toBCD(tm.tm_min); |
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break;
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case 0x1FFB: |
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/* hours (BCD) */
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get_time(NVRAM, &tm); |
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retval = toBCD(tm.tm_hour); |
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break;
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case 0x1FFC: |
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/* day of the week / century */
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get_time(NVRAM, &tm); |
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retval = NVRAM->buffer[0x1FFC] | tm.tm_wday;
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break;
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case 0x1FFD: |
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/* date */
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get_time(NVRAM, &tm); |
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retval = toBCD(tm.tm_mday); |
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break;
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case 0x1FFE: |
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/* month */
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get_time(NVRAM, &tm); |
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retval = toBCD(tm.tm_mon + 1);
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break;
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case 0x1FFF: |
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/* year */
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get_time(NVRAM, &tm); |
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retval = toBCD(tm.tm_year); |
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break;
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default:
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do_read:
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retval = NVRAM->buffer[addr]; |
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break;
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} |
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return retval;
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} |
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static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) |
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{ |
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m48t08_t *NVRAM = opaque; |
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m48t08_write(NVRAM, addr, value); |
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} |
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static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t value) |
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{ |
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m48t08_t *NVRAM = opaque; |
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m48t08_write(NVRAM, addr, value); |
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m48t08_write(NVRAM, addr + 1, value >> 8); |
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} |
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static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
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{ |
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m48t08_t *NVRAM = opaque; |
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m48t08_write(NVRAM, addr, value); |
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m48t08_write(NVRAM, addr + 1, value >> 8); |
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m48t08_write(NVRAM, addr + 2, value >> 16); |
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m48t08_write(NVRAM, addr + 3, value >> 24); |
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} |
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static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr) |
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{ |
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m48t08_t *NVRAM = opaque; |
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uint32_t retval = 0;
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retval = m48t08_read(NVRAM, addr); |
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return retval;
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} |
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static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr) |
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{ |
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m48t08_t *NVRAM = opaque; |
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uint32_t retval = 0;
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retval = m48t08_read(NVRAM, addr) << 8;
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retval |= m48t08_read(NVRAM, addr + 1);
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return retval;
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} |
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static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr) |
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{ |
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m48t08_t *NVRAM = opaque; |
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uint32_t retval = 0;
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retval = m48t08_read(NVRAM, addr) << 24;
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retval |= m48t08_read(NVRAM, addr + 1) << 16; |
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retval |= m48t08_read(NVRAM, addr + 2) << 8; |
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retval |= m48t08_read(NVRAM, addr + 3);
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return retval;
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} |
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static CPUWriteMemoryFunc *nvram_write[] = {
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&nvram_writeb, |
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&nvram_writew, |
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&nvram_writel, |
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}; |
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static CPUReadMemoryFunc *nvram_read[] = {
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&nvram_readb, |
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&nvram_readw, |
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&nvram_readl, |
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}; |
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static void nvram_save(QEMUFile *f, void *opaque) |
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{ |
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m48t08_t *s = opaque; |
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qemu_put_be32s(f, (uint32_t *)&s->time_offset); |
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qemu_put_be32s(f, (uint32_t *)&s->stop_time); |
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qemu_put_buffer(f, s->buffer, 0x2000);
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} |
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static int nvram_load(QEMUFile *f, void *opaque, int version_id) |
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{ |
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m48t08_t *s = opaque; |
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if (version_id != 1) |
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return -EINVAL;
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qemu_get_be32s(f, (uint32_t *)&s->time_offset); |
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qemu_get_be32s(f, (uint32_t *)&s->stop_time); |
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qemu_get_buffer(f, s->buffer, 0x2000);
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return 0; |
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} |
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static void m48t08_reset(void *opaque) |
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{ |
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m48t08_t *s = opaque; |
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s->time_offset = 0;
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s->stop_time = 0;
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} |
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/* Initialisation routine */
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m48t08_t *m48t08_init(uint32_t mem_base, uint16_t size) |
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{ |
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m48t08_t *s; |
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int mem_index;
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s = qemu_mallocz(sizeof(m48t08_t));
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if (!s)
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return NULL; |
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s->buffer = qemu_mallocz(size); |
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if (!s->buffer) {
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qemu_free(s); |
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return NULL; |
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} |
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if (mem_base != 0) { |
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mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
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cpu_register_physical_memory(mem_base, 0x2000, mem_index);
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} |
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register_savevm("nvram", mem_base, 1, nvram_save, nvram_load, s); |
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qemu_register_reset(m48t08_reset, s); |
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return s;
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} |
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#if 0
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struct idprom
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{
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unsigned char id_format; /* Format identifier (always 0x01) */
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unsigned char id_machtype; /* Machine type */
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unsigned char id_ethaddr[6]; /* Hardware ethernet address */
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long id_date; /* Date of manufacture */
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unsigned int id_sernum:24; /* Unique serial number */
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unsigned char id_cksum; /* Checksum - xor of the data bytes */
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unsigned char reserved[16];
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};
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#endif
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