Revision f6bdfcc9 hw/pci.c
| b/hw/pci.c | ||
|---|---|---|
| 558 | 558 |
static void pci_init_w1cmask(PCIDevice *dev) |
| 559 | 559 |
{
|
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/* |
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* Note: It's okay to set w1mask even for readonly bits as |
|
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* Note: It's okay to set w1cmask even for readonly bits as
|
|
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* long as their value is hardwired to 0. |
| 563 | 563 |
*/ |
| 564 | 564 |
pci_set_word(dev->w1cmask + PCI_STATUS, |
| ... | ... | |
| 588 | 588 |
/* PCI_PREF_BASE_UPPER32 and PCI_PREF_LIMIT_UPPER32 */ |
| 589 | 589 |
memset(d->wmask + PCI_PREF_BASE_UPPER32, 0xff, 8); |
| 590 | 590 |
|
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pci_set_word(d->wmask + PCI_BRIDGE_CONTROL, 0xffff); |
|
| 591 |
/* TODO: add this define to pci_regs.h in linux and then in qemu. */ |
|
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#define PCI_BRIDGE_CTL_VGA_16BIT 0x10 /* VGA 16-bit decode */ |
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#define PCI_BRIDGE_CTL_DISCARD 0x100 /* Primary discard timer */ |
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#define PCI_BRIDGE_CTL_SEC_DISCARD 0x200 /* Secondary discard timer */ |
|
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#define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400 /* Discard timer status */ |
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#define PCI_BRIDGE_CTL_DISCARD_SERR 0x800 /* Discard timer SERR# enable */ |
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pci_set_word(d->wmask + PCI_BRIDGE_CONTROL, |
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PCI_BRIDGE_CTL_PARITY | |
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PCI_BRIDGE_CTL_SERR | |
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PCI_BRIDGE_CTL_ISA | |
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PCI_BRIDGE_CTL_VGA | |
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PCI_BRIDGE_CTL_VGA_16BIT | |
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PCI_BRIDGE_CTL_MASTER_ABORT | |
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PCI_BRIDGE_CTL_BUS_RESET | |
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PCI_BRIDGE_CTL_FAST_BACK | |
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PCI_BRIDGE_CTL_DISCARD | |
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PCI_BRIDGE_CTL_SEC_DISCARD | |
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PCI_BRIDGE_CTL_DISCARD_STATUS | |
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PCI_BRIDGE_CTL_DISCARD_SERR); |
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/* Below does not do anything as we never set this bit, put here for |
|
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* completeness. */ |
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pci_set_word(d->w1cmask + PCI_BRIDGE_CONTROL, |
|
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PCI_BRIDGE_CTL_DISCARD_STATUS); |
|
| 592 | 614 |
} |
| 593 | 615 |
|
| 594 | 616 |
static int pci_init_multifunction(PCIBus *bus, PCIDevice *dev) |
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