root / hw / syborg_serial.c @ f7b4f61f
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/*
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* Syborg serial port
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*
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* Copyright (c) 2008 CodeSourcery
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "sysbus.h" |
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#include "qemu-char.h" |
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#include "syborg.h" |
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//#define DEBUG_SYBORG_SERIAL
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#ifdef DEBUG_SYBORG_SERIAL
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#define DPRINTF(fmt, ...) \
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do { printf("syborg_serial: " fmt , ##args); } while (0) |
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "syborg_serial: error: " fmt , ## __VA_ARGS__); \ |
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exit(1);} while (0) |
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#else
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#define DPRINTF(fmt, ...) do {} while(0) |
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "syborg_serial: error: " fmt , ## __VA_ARGS__);} while (0) |
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#endif
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enum {
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SERIAL_ID = 0,
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SERIAL_DATA = 1,
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SERIAL_FIFO_COUNT = 2,
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SERIAL_INT_ENABLE = 3,
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SERIAL_DMA_TX_ADDR = 4,
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SERIAL_DMA_TX_COUNT = 5, /* triggers dma */ |
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SERIAL_DMA_RX_ADDR = 6,
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SERIAL_DMA_RX_COUNT = 7, /* triggers dma */ |
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SERIAL_FIFO_SIZE = 8
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}; |
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#define SERIAL_INT_FIFO (1u << 0) |
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#define SERIAL_INT_DMA_TX (1u << 1) |
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#define SERIAL_INT_DMA_RX (1u << 2) |
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typedef struct { |
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SysBusDevice busdev; |
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uint32_t int_enable; |
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uint32_t fifo_size; |
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uint32_t *read_fifo; |
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int read_pos;
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int read_count;
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CharDriverState *chr; |
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qemu_irq irq; |
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uint32_t dma_tx_ptr; |
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uint32_t dma_rx_ptr; |
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uint32_t dma_rx_size; |
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} SyborgSerialState; |
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static void syborg_serial_update(SyborgSerialState *s) |
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{ |
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int level;
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level = 0;
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if ((s->int_enable & SERIAL_INT_FIFO) && s->read_count)
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level = 1;
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if (s->int_enable & SERIAL_INT_DMA_TX)
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level = 1;
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if ((s->int_enable & SERIAL_INT_DMA_RX) && s->dma_rx_size == 0) |
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level = 1;
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qemu_set_irq(s->irq, level); |
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} |
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static uint32_t fifo_pop(SyborgSerialState *s)
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{ |
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const uint32_t c = s->read_fifo[s->read_pos];
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s->read_count--; |
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s->read_pos++; |
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if (s->read_pos == s->fifo_size)
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s->read_pos = 0;
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DPRINTF("FIFO pop %x (%d)\n", c, s->read_count);
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return c;
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} |
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static void fifo_push(SyborgSerialState *s, uint32_t new_value) |
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{ |
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int slot;
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DPRINTF("FIFO push %x (%d)\n", new_value, s->read_count);
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slot = s->read_pos + s->read_count; |
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if (slot >= s->fifo_size)
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slot -= s->fifo_size; |
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s->read_fifo[slot] = new_value; |
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s->read_count++; |
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} |
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static void do_dma_tx(SyborgSerialState *s, uint32_t count) |
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{ |
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unsigned char ch; |
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if (count == 0) |
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return;
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if (s->chr != NULL) { |
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/* optimize later. Now, 1 byte per iteration */
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while (count--) {
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cpu_physical_memory_read(s->dma_tx_ptr, &ch, 1);
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qemu_chr_write(s->chr, &ch, 1);
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s->dma_tx_ptr++; |
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} |
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} else {
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s->dma_tx_ptr += count; |
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} |
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/* QEMU char backends do not have a nonblocking mode, so we transmit all
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the data imediately and the interrupt status will be unchanged. */
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} |
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/* Initiate RX DMA, and transfer data from the FIFO. */
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static void dma_rx_start(SyborgSerialState *s, uint32_t len) |
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{ |
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uint32_t dest; |
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unsigned char ch; |
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dest = s->dma_rx_ptr; |
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if (s->read_count < len) {
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s->dma_rx_size = len - s->read_count; |
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len = s->read_count; |
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} else {
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s->dma_rx_size = 0;
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} |
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while (len--) {
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ch = fifo_pop(s); |
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cpu_physical_memory_write(dest, &ch, 1);
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dest++; |
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} |
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s->dma_rx_ptr = dest; |
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syborg_serial_update(s); |
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} |
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static uint32_t syborg_serial_read(void *opaque, target_phys_addr_t offset) |
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{ |
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SyborgSerialState *s = (SyborgSerialState *)opaque; |
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uint32_t c; |
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offset &= 0xfff;
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DPRINTF("read 0x%x\n", (int)offset); |
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switch(offset >> 2) { |
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case SERIAL_ID:
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return SYBORG_ID_SERIAL;
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case SERIAL_DATA:
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if (s->read_count > 0) |
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c = fifo_pop(s); |
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else
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c = -1;
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syborg_serial_update(s); |
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return c;
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case SERIAL_FIFO_COUNT:
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return s->read_count;
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case SERIAL_INT_ENABLE:
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return s->int_enable;
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case SERIAL_DMA_TX_ADDR:
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return s->dma_tx_ptr;
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case SERIAL_DMA_TX_COUNT:
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return 0; |
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case SERIAL_DMA_RX_ADDR:
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return s->dma_rx_ptr;
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case SERIAL_DMA_RX_COUNT:
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return s->dma_rx_size;
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case SERIAL_FIFO_SIZE:
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return s->fifo_size;
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default:
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cpu_abort(cpu_single_env, "syborg_serial_read: Bad offset %x\n",
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(int)offset);
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return 0; |
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} |
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} |
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static void syborg_serial_write(void *opaque, target_phys_addr_t offset, |
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uint32_t value) |
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{ |
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SyborgSerialState *s = (SyborgSerialState *)opaque; |
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unsigned char ch; |
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offset &= 0xfff;
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DPRINTF("Write 0x%x=0x%x\n", (int)offset, value); |
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switch (offset >> 2) { |
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case SERIAL_DATA:
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ch = value; |
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if (s->chr)
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qemu_chr_write(s->chr, &ch, 1);
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break;
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case SERIAL_INT_ENABLE:
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s->int_enable = value; |
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syborg_serial_update(s); |
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break;
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case SERIAL_DMA_TX_ADDR:
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s->dma_tx_ptr = value; |
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break;
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case SERIAL_DMA_TX_COUNT:
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do_dma_tx(s, value); |
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break;
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case SERIAL_DMA_RX_ADDR:
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/* For safety, writes to this register cancel any pending DMA. */
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s->dma_rx_size = 0;
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s->dma_rx_ptr = value; |
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break;
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case SERIAL_DMA_RX_COUNT:
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dma_rx_start(s, value); |
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break;
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default:
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cpu_abort(cpu_single_env, "syborg_serial_write: Bad offset %x\n",
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(int)offset);
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break;
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} |
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} |
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static int syborg_serial_can_receive(void *opaque) |
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{ |
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SyborgSerialState *s = (SyborgSerialState *)opaque; |
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if (s->dma_rx_size)
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return s->dma_rx_size;
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return s->fifo_size - s->read_count;
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} |
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static void syborg_serial_receive(void *opaque, const uint8_t *buf, int size) |
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{ |
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SyborgSerialState *s = (SyborgSerialState *)opaque; |
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if (s->dma_rx_size) {
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/* Place it in the DMA buffer. */
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cpu_physical_memory_write(s->dma_rx_ptr, buf, size); |
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s->dma_rx_size -= size; |
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s->dma_rx_ptr += size; |
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} else {
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while (size--)
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fifo_push(s, *buf); |
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} |
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syborg_serial_update(s); |
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} |
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static void syborg_serial_event(void *opaque, int event) |
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{ |
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/* TODO: Report BREAK events? */
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} |
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static CPUReadMemoryFunc * const syborg_serial_readfn[] = { |
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syborg_serial_read, |
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syborg_serial_read, |
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syborg_serial_read |
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}; |
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static CPUWriteMemoryFunc * const syborg_serial_writefn[] = { |
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syborg_serial_write, |
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syborg_serial_write, |
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syborg_serial_write |
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}; |
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static void syborg_serial_save(QEMUFile *f, void *opaque) |
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{ |
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SyborgSerialState *s = opaque; |
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int i;
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qemu_put_be32(f, s->fifo_size); |
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qemu_put_be32(f, s->int_enable); |
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qemu_put_be32(f, s->read_pos); |
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qemu_put_be32(f, s->read_count); |
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qemu_put_be32(f, s->dma_tx_ptr); |
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qemu_put_be32(f, s->dma_rx_ptr); |
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qemu_put_be32(f, s->dma_rx_size); |
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for (i = 0; i < s->fifo_size; i++) { |
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qemu_put_be32(f, s->read_fifo[i]); |
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} |
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} |
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static int syborg_serial_load(QEMUFile *f, void *opaque, int version_id) |
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{ |
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SyborgSerialState *s = opaque; |
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int i;
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if (version_id != 1) |
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return -EINVAL;
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i = qemu_get_be32(f); |
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if (s->fifo_size != i)
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return -EINVAL;
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s->int_enable = qemu_get_be32(f); |
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s->read_pos = qemu_get_be32(f); |
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s->read_count = qemu_get_be32(f); |
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s->dma_tx_ptr = qemu_get_be32(f); |
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s->dma_rx_ptr = qemu_get_be32(f); |
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s->dma_rx_size = qemu_get_be32(f); |
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for (i = 0; i < s->fifo_size; i++) { |
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s->read_fifo[i] = qemu_get_be32(f); |
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} |
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return 0; |
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} |
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static int syborg_serial_init(SysBusDevice *dev) |
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{ |
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SyborgSerialState *s = FROM_SYSBUS(SyborgSerialState, dev); |
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int iomemtype;
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sysbus_init_irq(dev, &s->irq); |
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iomemtype = cpu_register_io_memory(syborg_serial_readfn, |
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syborg_serial_writefn, s); |
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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s->chr = qdev_init_chardev(&dev->qdev); |
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if (s->chr) {
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qemu_chr_add_handlers(s->chr, syborg_serial_can_receive, |
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syborg_serial_receive, syborg_serial_event, s); |
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} |
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if (s->fifo_size <= 0) { |
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fprintf(stderr, "syborg_serial: fifo too small\n");
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s->fifo_size = 16;
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} |
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s->read_fifo = qemu_mallocz(s->fifo_size * sizeof(s->read_fifo[0])); |
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register_savevm("syborg_serial", -1, 1, |
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syborg_serial_save, syborg_serial_load, s); |
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return 0; |
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} |
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static SysBusDeviceInfo syborg_serial_info = {
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.init = syborg_serial_init, |
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.qdev.name = "syborg,serial",
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.qdev.size = sizeof(SyborgSerialState),
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.qdev.props = (Property[]) { |
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DEFINE_PROP_UINT32("fifo-size", SyborgSerialState, fifo_size, 16), |
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DEFINE_PROP_END_OF_LIST(), |
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} |
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}; |
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static void syborg_serial_register_devices(void) |
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{ |
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sysbus_register_withprop(&syborg_serial_info); |
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} |
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device_init(syborg_serial_register_devices) |