Statistics
| Branch: | Revision:

root / tcg / arm / tcg-target.h @ f878d2d2

History | View | Annotate | Download (2.6 kB)

1 811d4cf4 balrog
/*
2 811d4cf4 balrog
 * Tiny Code Generator for QEMU
3 811d4cf4 balrog
 *
4 811d4cf4 balrog
 * Copyright (c) 2008 Fabrice Bellard
5 811d4cf4 balrog
 * Copyright (c) 2008 Andrzej Zaborowski
6 811d4cf4 balrog
 *
7 811d4cf4 balrog
 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 811d4cf4 balrog
 * of this software and associated documentation files (the "Software"), to deal
9 811d4cf4 balrog
 * in the Software without restriction, including without limitation the rights
10 811d4cf4 balrog
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 811d4cf4 balrog
 * copies of the Software, and to permit persons to whom the Software is
12 811d4cf4 balrog
 * furnished to do so, subject to the following conditions:
13 811d4cf4 balrog
 *
14 811d4cf4 balrog
 * The above copyright notice and this permission notice shall be included in
15 811d4cf4 balrog
 * all copies or substantial portions of the Software.
16 811d4cf4 balrog
 *
17 811d4cf4 balrog
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 811d4cf4 balrog
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 811d4cf4 balrog
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 811d4cf4 balrog
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 811d4cf4 balrog
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 811d4cf4 balrog
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 811d4cf4 balrog
 * THE SOFTWARE.
24 811d4cf4 balrog
 */
25 811d4cf4 balrog
#define TCG_TARGET_ARM 1
26 811d4cf4 balrog
27 811d4cf4 balrog
#define TCG_TARGET_REG_BITS 32
28 811d4cf4 balrog
#undef TCG_TARGET_WORDS_BIGENDIAN
29 811d4cf4 balrog
#undef TCG_TARGET_HAS_div_i32
30 811d4cf4 balrog
#undef TCG_TARGET_HAS_div_i64
31 66896cb8 aurel32
#undef TCG_TARGET_HAS_bswap32_i32
32 811d4cf4 balrog
#define TCG_TARGET_HAS_ext8s_i32
33 811d4cf4 balrog
#define TCG_TARGET_HAS_ext16s_i32
34 650bbb36 balrog
#define TCG_TARGET_HAS_neg_i32
35 650bbb36 balrog
#undef TCG_TARGET_HAS_neg_i64
36 f878d2d2 Laurent Desnogues
#define TCG_TARGET_HAS_not_i32
37 811d4cf4 balrog
#undef TCG_TARGET_STACK_GROWSUP
38 811d4cf4 balrog
39 811d4cf4 balrog
enum {
40 811d4cf4 balrog
    TCG_REG_R0 = 0,
41 811d4cf4 balrog
    TCG_REG_R1,
42 811d4cf4 balrog
    TCG_REG_R2,
43 811d4cf4 balrog
    TCG_REG_R3,
44 811d4cf4 balrog
    TCG_REG_R4,
45 811d4cf4 balrog
    TCG_REG_R5,
46 811d4cf4 balrog
    TCG_REG_R6,
47 811d4cf4 balrog
    TCG_REG_R7,
48 811d4cf4 balrog
    TCG_REG_R8,
49 811d4cf4 balrog
    TCG_REG_R9,
50 811d4cf4 balrog
    TCG_REG_R10,
51 811d4cf4 balrog
    TCG_REG_R11,
52 811d4cf4 balrog
    TCG_REG_R12,
53 811d4cf4 balrog
    TCG_REG_R13,
54 811d4cf4 balrog
    TCG_REG_R14,
55 811d4cf4 balrog
};
56 811d4cf4 balrog
57 2d69f359 Paul Brook
#define TCG_TARGET_NB_REGS 15
58 2d69f359 Paul Brook
59 cb4e581f Laurent Desnogues
#define TCG_CT_CONST_ARM 0x100
60 cb4e581f Laurent Desnogues
61 811d4cf4 balrog
/* used for function call generation */
62 bedba0cd balrog
#define TCG_REG_CALL_STACK                TCG_REG_R13
63 bedba0cd balrog
#define TCG_TARGET_STACK_ALIGN                8
64 bedba0cd balrog
#define TCG_TARGET_CALL_STACK_OFFSET        0
65 811d4cf4 balrog
66 379f6698 Paul Brook
#define TCG_TARGET_HAS_GUEST_BASE
67 379f6698 Paul Brook
68 811d4cf4 balrog
enum {
69 811d4cf4 balrog
    /* Note: must be synced with dyngen-exec.h */
70 811d4cf4 balrog
    TCG_AREG0 = TCG_REG_R7,
71 811d4cf4 balrog
    TCG_AREG1 = TCG_REG_R4,
72 811d4cf4 balrog
    TCG_AREG2 = TCG_REG_R5,
73 811d4cf4 balrog
};
74 811d4cf4 balrog
75 811d4cf4 balrog
static inline void flush_icache_range(unsigned long start, unsigned long stop)
76 811d4cf4 balrog
{
77 3233f0d4 balrog
#if QEMU_GNUC_PREREQ(4, 1)
78 2d69f359 Paul Brook
    __builtin___clear_cache((char *) start, (char *) stop);
79 3233f0d4 balrog
#else
80 811d4cf4 balrog
    register unsigned long _beg __asm ("a1") = start;
81 811d4cf4 balrog
    register unsigned long _end __asm ("a2") = stop;
82 811d4cf4 balrog
    register unsigned long _flg __asm ("a3") = 0;
83 811d4cf4 balrog
    __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
84 3233f0d4 balrog
#endif
85 811d4cf4 balrog
}