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1 | b92e5a22 | bellard | /*
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2 | b92e5a22 | bellard | * Software MMU support
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3 | 5fafdf24 | ths | *
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4 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | b92e5a22 | bellard | *
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6 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
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7 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
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9 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | b92e5a22 | bellard | *
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11 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
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12 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | b92e5a22 | bellard | * Lesser General Public License for more details.
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15 | b92e5a22 | bellard | *
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16 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | b92e5a22 | bellard | * License along with this library; if not, write to the Free Software
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18 | b92e5a22 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | b92e5a22 | bellard | */
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20 | b92e5a22 | bellard | #define DATA_SIZE (1 << SHIFT) |
21 | b92e5a22 | bellard | |
22 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
23 | b92e5a22 | bellard | #define SUFFIX q
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24 | 61382a50 | bellard | #define USUFFIX q
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25 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
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26 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
27 | b92e5a22 | bellard | #define SUFFIX l
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28 | 61382a50 | bellard | #define USUFFIX l
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29 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
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30 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
31 | b92e5a22 | bellard | #define SUFFIX w
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32 | 61382a50 | bellard | #define USUFFIX uw
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33 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
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34 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
35 | b92e5a22 | bellard | #define SUFFIX b
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36 | 61382a50 | bellard | #define USUFFIX ub
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37 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
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38 | b92e5a22 | bellard | #else
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39 | b92e5a22 | bellard | #error unsupported data size
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40 | b92e5a22 | bellard | #endif
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41 | b92e5a22 | bellard | |
42 | b769d8fe | bellard | #ifdef SOFTMMU_CODE_ACCESS
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43 | b769d8fe | bellard | #define READ_ACCESS_TYPE 2 |
44 | 84b7b8e7 | bellard | #define ADDR_READ addr_code
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45 | b769d8fe | bellard | #else
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46 | b769d8fe | bellard | #define READ_ACCESS_TYPE 0 |
47 | 84b7b8e7 | bellard | #define ADDR_READ addr_read
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48 | b769d8fe | bellard | #endif
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49 | b769d8fe | bellard | |
50 | 5fafdf24 | ths | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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51 | 6ebbf390 | j_mayer | int mmu_idx,
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52 | 61382a50 | bellard | void *retaddr);
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53 | 5fafdf24 | ths | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
54 | 2e70f6ef | pbrook | target_ulong addr, |
55 | 2e70f6ef | pbrook | void *retaddr)
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56 | b92e5a22 | bellard | { |
57 | b92e5a22 | bellard | DATA_TYPE res; |
58 | b92e5a22 | bellard | int index;
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59 | 0f459d16 | pbrook | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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60 | 0f459d16 | pbrook | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
61 | 2e70f6ef | pbrook | env->mem_io_pc = (unsigned long)retaddr; |
62 | 2e70f6ef | pbrook | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT)
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63 | 2e70f6ef | pbrook | && !can_do_io(env)) { |
64 | 2e70f6ef | pbrook | cpu_io_recompile(env, retaddr); |
65 | 2e70f6ef | pbrook | } |
66 | b92e5a22 | bellard | |
67 | b92e5a22 | bellard | #if SHIFT <= 2 |
68 | a4193c8a | bellard | res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); |
69 | b92e5a22 | bellard | #else
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70 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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71 | a4193c8a | bellard | res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; |
72 | a4193c8a | bellard | res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); |
73 | b92e5a22 | bellard | #else
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74 | a4193c8a | bellard | res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
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75 | a4193c8a | bellard | res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; |
76 | b92e5a22 | bellard | #endif
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77 | b92e5a22 | bellard | #endif /* SHIFT > 2 */ |
78 | f1c85677 | bellard | #ifdef USE_KQEMU
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79 | f1c85677 | bellard | env->last_io_time = cpu_get_time_fast(); |
80 | f1c85677 | bellard | #endif
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81 | b92e5a22 | bellard | return res;
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82 | b92e5a22 | bellard | } |
83 | b92e5a22 | bellard | |
84 | b92e5a22 | bellard | /* handle all cases except unaligned access which span two pages */
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85 | d656469f | bellard | DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
86 | d656469f | bellard | int mmu_idx)
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87 | b92e5a22 | bellard | { |
88 | b92e5a22 | bellard | DATA_TYPE res; |
89 | 61382a50 | bellard | int index;
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90 | c27004ec | bellard | target_ulong tlb_addr; |
91 | 0f459d16 | pbrook | target_phys_addr_t addend; |
92 | b92e5a22 | bellard | void *retaddr;
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93 | 3b46e624 | ths | |
94 | b92e5a22 | bellard | /* test if there is match for unaligned or IO access */
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95 | b92e5a22 | bellard | /* XXX: could done more in memory macro in a non portable way */
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96 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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97 | b92e5a22 | bellard | redo:
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98 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
99 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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100 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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101 | b92e5a22 | bellard | /* IO access */
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102 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
103 | b92e5a22 | bellard | goto do_unaligned_access;
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104 | 2e70f6ef | pbrook | retaddr = GETPC(); |
105 | 0f459d16 | pbrook | addend = env->iotlb[mmu_idx][index]; |
106 | 2e70f6ef | pbrook | res = glue(io_read, SUFFIX)(addend, addr, retaddr); |
107 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
108 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages or IO) */
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109 | b92e5a22 | bellard | do_unaligned_access:
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110 | 61382a50 | bellard | retaddr = GETPC(); |
111 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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112 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
113 | a64d4718 | bellard | #endif
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114 | 5fafdf24 | ths | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
115 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
116 | b92e5a22 | bellard | } else {
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117 | a64d4718 | bellard | /* unaligned/aligned access in the same page */
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118 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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119 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
120 | a64d4718 | bellard | retaddr = GETPC(); |
121 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
122 | a64d4718 | bellard | } |
123 | a64d4718 | bellard | #endif
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124 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
125 | 0f459d16 | pbrook | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
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126 | b92e5a22 | bellard | } |
127 | b92e5a22 | bellard | } else {
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128 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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129 | 61382a50 | bellard | retaddr = GETPC(); |
130 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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131 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
132 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
133 | a64d4718 | bellard | #endif
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134 | 6ebbf390 | j_mayer | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
135 | b92e5a22 | bellard | goto redo;
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136 | b92e5a22 | bellard | } |
137 | b92e5a22 | bellard | return res;
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138 | b92e5a22 | bellard | } |
139 | b92e5a22 | bellard | |
140 | b92e5a22 | bellard | /* handle all unaligned cases */
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141 | 5fafdf24 | ths | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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142 | 6ebbf390 | j_mayer | int mmu_idx,
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143 | 61382a50 | bellard | void *retaddr)
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144 | b92e5a22 | bellard | { |
145 | b92e5a22 | bellard | DATA_TYPE res, res1, res2; |
146 | 61382a50 | bellard | int index, shift;
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147 | 0f459d16 | pbrook | target_phys_addr_t addend; |
148 | c27004ec | bellard | target_ulong tlb_addr, addr1, addr2; |
149 | b92e5a22 | bellard | |
150 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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151 | b92e5a22 | bellard | redo:
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152 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
153 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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154 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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155 | b92e5a22 | bellard | /* IO access */
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156 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
157 | b92e5a22 | bellard | goto do_unaligned_access;
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158 | 2e70f6ef | pbrook | retaddr = GETPC(); |
159 | 0f459d16 | pbrook | addend = env->iotlb[mmu_idx][index]; |
160 | 2e70f6ef | pbrook | res = glue(io_read, SUFFIX)(addend, addr, retaddr); |
161 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
162 | b92e5a22 | bellard | do_unaligned_access:
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163 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages) */
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164 | b92e5a22 | bellard | addr1 = addr & ~(DATA_SIZE - 1);
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165 | b92e5a22 | bellard | addr2 = addr1 + DATA_SIZE; |
166 | 5fafdf24 | ths | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
167 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
168 | 5fafdf24 | ths | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
169 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
170 | b92e5a22 | bellard | shift = (addr & (DATA_SIZE - 1)) * 8; |
171 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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172 | b92e5a22 | bellard | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
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173 | b92e5a22 | bellard | #else
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174 | b92e5a22 | bellard | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
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175 | b92e5a22 | bellard | #endif
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176 | 6986f88c | bellard | res = (DATA_TYPE)res; |
177 | b92e5a22 | bellard | } else {
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178 | b92e5a22 | bellard | /* unaligned/aligned access in the same page */
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179 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
180 | 0f459d16 | pbrook | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
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181 | b92e5a22 | bellard | } |
182 | b92e5a22 | bellard | } else {
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183 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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184 | 6ebbf390 | j_mayer | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
185 | b92e5a22 | bellard | goto redo;
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186 | b92e5a22 | bellard | } |
187 | b92e5a22 | bellard | return res;
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188 | b92e5a22 | bellard | } |
189 | b92e5a22 | bellard | |
190 | b769d8fe | bellard | #ifndef SOFTMMU_CODE_ACCESS
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191 | b769d8fe | bellard | |
192 | 5fafdf24 | ths | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
193 | 5fafdf24 | ths | DATA_TYPE val, |
194 | 6ebbf390 | j_mayer | int mmu_idx,
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195 | b769d8fe | bellard | void *retaddr);
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196 | b769d8fe | bellard | |
197 | 5fafdf24 | ths | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
198 | b769d8fe | bellard | DATA_TYPE val, |
199 | 0f459d16 | pbrook | target_ulong addr, |
200 | b769d8fe | bellard | void *retaddr)
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201 | b769d8fe | bellard | { |
202 | b769d8fe | bellard | int index;
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203 | 0f459d16 | pbrook | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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204 | 0f459d16 | pbrook | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
205 | 2e70f6ef | pbrook | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT)
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206 | 2e70f6ef | pbrook | && !can_do_io(env)) { |
207 | 2e70f6ef | pbrook | cpu_io_recompile(env, retaddr); |
208 | 2e70f6ef | pbrook | } |
209 | b769d8fe | bellard | |
210 | 2e70f6ef | pbrook | env->mem_io_vaddr = addr; |
211 | 2e70f6ef | pbrook | env->mem_io_pc = (unsigned long)retaddr; |
212 | b769d8fe | bellard | #if SHIFT <= 2 |
213 | b769d8fe | bellard | io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); |
214 | b769d8fe | bellard | #else
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215 | b769d8fe | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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216 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); |
217 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); |
218 | b769d8fe | bellard | #else
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219 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr, val);
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220 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); |
221 | b769d8fe | bellard | #endif
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222 | b769d8fe | bellard | #endif /* SHIFT > 2 */ |
223 | f1c85677 | bellard | #ifdef USE_KQEMU
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224 | f1c85677 | bellard | env->last_io_time = cpu_get_time_fast(); |
225 | f1c85677 | bellard | #endif
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226 | b769d8fe | bellard | } |
227 | b92e5a22 | bellard | |
228 | d656469f | bellard | void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
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229 | d656469f | bellard | DATA_TYPE val, |
230 | d656469f | bellard | int mmu_idx)
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231 | b92e5a22 | bellard | { |
232 | 0f459d16 | pbrook | target_phys_addr_t addend; |
233 | c27004ec | bellard | target_ulong tlb_addr; |
234 | b92e5a22 | bellard | void *retaddr;
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235 | 61382a50 | bellard | int index;
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236 | 3b46e624 | ths | |
237 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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238 | b92e5a22 | bellard | redo:
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239 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
240 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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241 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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242 | b92e5a22 | bellard | /* IO access */
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243 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
244 | b92e5a22 | bellard | goto do_unaligned_access;
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245 | d720b93d | bellard | retaddr = GETPC(); |
246 | 0f459d16 | pbrook | addend = env->iotlb[mmu_idx][index]; |
247 | 0f459d16 | pbrook | glue(io_write, SUFFIX)(addend, val, addr, retaddr); |
248 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
249 | b92e5a22 | bellard | do_unaligned_access:
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250 | 61382a50 | bellard | retaddr = GETPC(); |
251 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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252 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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253 | a64d4718 | bellard | #endif
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254 | 5fafdf24 | ths | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
255 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
256 | b92e5a22 | bellard | } else {
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257 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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258 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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259 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
260 | a64d4718 | bellard | retaddr = GETPC(); |
261 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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262 | a64d4718 | bellard | } |
263 | a64d4718 | bellard | #endif
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264 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
265 | 0f459d16 | pbrook | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
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266 | b92e5a22 | bellard | } |
267 | b92e5a22 | bellard | } else {
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268 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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269 | 61382a50 | bellard | retaddr = GETPC(); |
270 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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271 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
272 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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273 | a64d4718 | bellard | #endif
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274 | 6ebbf390 | j_mayer | tlb_fill(addr, 1, mmu_idx, retaddr);
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275 | b92e5a22 | bellard | goto redo;
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276 | b92e5a22 | bellard | } |
277 | b92e5a22 | bellard | } |
278 | b92e5a22 | bellard | |
279 | b92e5a22 | bellard | /* handles all unaligned cases */
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280 | 5fafdf24 | ths | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
281 | 61382a50 | bellard | DATA_TYPE val, |
282 | 6ebbf390 | j_mayer | int mmu_idx,
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283 | 61382a50 | bellard | void *retaddr)
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284 | b92e5a22 | bellard | { |
285 | 0f459d16 | pbrook | target_phys_addr_t addend; |
286 | c27004ec | bellard | target_ulong tlb_addr; |
287 | 61382a50 | bellard | int index, i;
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288 | b92e5a22 | bellard | |
289 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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290 | b92e5a22 | bellard | redo:
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291 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
292 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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293 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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294 | b92e5a22 | bellard | /* IO access */
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295 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
296 | b92e5a22 | bellard | goto do_unaligned_access;
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297 | 0f459d16 | pbrook | addend = env->iotlb[mmu_idx][index]; |
298 | 0f459d16 | pbrook | glue(io_write, SUFFIX)(addend, val, addr, retaddr); |
299 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
300 | b92e5a22 | bellard | do_unaligned_access:
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301 | b92e5a22 | bellard | /* XXX: not efficient, but simple */
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302 | 6c41b272 | balrog | /* Note: relies on the fact that tlb_fill() does not remove the
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303 | 6c41b272 | balrog | * previous page from the TLB cache. */
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304 | 7221fa98 | balrog | for(i = DATA_SIZE - 1; i >= 0; i--) { |
305 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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306 | 5fafdf24 | ths | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
307 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
308 | b92e5a22 | bellard | #else
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309 | 5fafdf24 | ths | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
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310 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
311 | b92e5a22 | bellard | #endif
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312 | b92e5a22 | bellard | } |
313 | b92e5a22 | bellard | } else {
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314 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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315 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
316 | 0f459d16 | pbrook | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
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317 | b92e5a22 | bellard | } |
318 | b92e5a22 | bellard | } else {
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319 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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320 | 6ebbf390 | j_mayer | tlb_fill(addr, 1, mmu_idx, retaddr);
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321 | b92e5a22 | bellard | goto redo;
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322 | b92e5a22 | bellard | } |
323 | b92e5a22 | bellard | } |
324 | b92e5a22 | bellard | |
325 | b769d8fe | bellard | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
326 | b769d8fe | bellard | |
327 | b769d8fe | bellard | #undef READ_ACCESS_TYPE
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328 | b92e5a22 | bellard | #undef SHIFT
|
329 | b92e5a22 | bellard | #undef DATA_TYPE
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330 | b92e5a22 | bellard | #undef SUFFIX
|
331 | 61382a50 | bellard | #undef USUFFIX
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332 | b92e5a22 | bellard | #undef DATA_SIZE
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333 | 84b7b8e7 | bellard | #undef ADDR_READ |