root / tests / cris / check_cmpxm.s @ f97572e5
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| 1 | dd43edf4 | ths | # mach: crisv0 crisv3 crisv8 crisv10 crisv32 |
|---|---|---|---|
| 2 | dd43edf4 | ths | # output: 2\n2\n2\n2\nffff\nffff\nffff\nffff\nffffffff\nffffffff\nffffffff\n78134452\n78134452\n78134452\n78134452\n4452\n80000032\n |
| 3 | dd43edf4 | ths | |
| 4 | dd43edf4 | ths | .include "testutils.inc" |
| 5 | dd43edf4 | ths | .data |
| 6 | dd43edf4 | ths | x: |
| 7 | dd43edf4 | ths | .byte 0xff |
| 8 | dd43edf4 | ths | .word 0xffff |
| 9 | dd43edf4 | ths | .word 0xff |
| 10 | dd43edf4 | ths | .word 0xffff |
| 11 | dd43edf4 | ths | .byte 0x89 |
| 12 | dd43edf4 | ths | .word 0xf789 |
| 13 | dd43edf4 | ths | .word 0x8002 |
| 14 | dd43edf4 | ths | .word 0x764 |
| 15 | dd43edf4 | ths | |
| 16 | dd43edf4 | ths | start |
| 17 | dd43edf4 | ths | moveq 2,r3 |
| 18 | dd43edf4 | ths | move.d x,r5 |
| 19 | dd43edf4 | ths | cmps.b [r5+],r3 |
| 20 | dd43edf4 | ths | test_cc 0 0 0 1 |
| 21 | dd43edf4 | ths | checkr3 2 |
| 22 | dd43edf4 | ths | |
| 23 | dd43edf4 | ths | moveq 2,r3 |
| 24 | dd43edf4 | ths | cmps.w [r5+],r3 |
| 25 | dd43edf4 | ths | test_cc 0 0 0 1 |
| 26 | dd43edf4 | ths | checkr3 2 |
| 27 | dd43edf4 | ths | |
| 28 | dd43edf4 | ths | moveq 2,r3 |
| 29 | dd43edf4 | ths | subq 3,r5 |
| 30 | dd43edf4 | ths | cmpu.b [r5+],r3 |
| 31 | dd43edf4 | ths | test_cc 1 0 0 1 |
| 32 | dd43edf4 | ths | checkr3 2 |
| 33 | dd43edf4 | ths | |
| 34 | dd43edf4 | ths | moveq 2,r3 |
| 35 | dd43edf4 | ths | cmpu.w [r5+],r3 |
| 36 | dd43edf4 | ths | test_cc 1 0 0 1 |
| 37 | dd43edf4 | ths | subq 3,r5 |
| 38 | dd43edf4 | ths | checkr3 2 |
| 39 | dd43edf4 | ths | |
| 40 | dd43edf4 | ths | move.d 0xffff,r3 |
| 41 | dd43edf4 | ths | cmpu.b [r5],r3 |
| 42 | dd43edf4 | ths | test_cc 0 0 0 0 |
| 43 | dd43edf4 | ths | checkr3 ffff |
| 44 | dd43edf4 | ths | |
| 45 | dd43edf4 | ths | move.d 0xffff,r3 |
| 46 | dd43edf4 | ths | cmpu.w [r5],r3 |
| 47 | dd43edf4 | ths | test_cc 0 1 0 0 |
| 48 | dd43edf4 | ths | checkr3 ffff |
| 49 | dd43edf4 | ths | |
| 50 | dd43edf4 | ths | move.d 0xffff,r3 |
| 51 | dd43edf4 | ths | cmps.b [r5],r3 |
| 52 | dd43edf4 | ths | test_cc 0 0 0 1 |
| 53 | dd43edf4 | ths | checkr3 ffff |
| 54 | dd43edf4 | ths | |
| 55 | dd43edf4 | ths | move.d 0xffff,r3 |
| 56 | dd43edf4 | ths | cmps.w [r5],r3 |
| 57 | dd43edf4 | ths | test_cc 0 0 0 1 |
| 58 | dd43edf4 | ths | checkr3 ffff |
| 59 | dd43edf4 | ths | |
| 60 | dd43edf4 | ths | moveq -1,r3 |
| 61 | dd43edf4 | ths | cmps.b [r5],r3 |
| 62 | dd43edf4 | ths | test_cc 0 1 0 0 |
| 63 | dd43edf4 | ths | addq 3,r5 |
| 64 | dd43edf4 | ths | checkr3 ffffffff |
| 65 | dd43edf4 | ths | |
| 66 | dd43edf4 | ths | moveq -1,r3 |
| 67 | dd43edf4 | ths | cmps.w [r5+],r3 |
| 68 | dd43edf4 | ths | test_cc 1 0 0 0 |
| 69 | dd43edf4 | ths | checkr3 ffffffff |
| 70 | dd43edf4 | ths | |
| 71 | dd43edf4 | ths | moveq -1,r3 |
| 72 | dd43edf4 | ths | cmps.w [r5+],r3 |
| 73 | dd43edf4 | ths | test_cc 0 1 0 0 |
| 74 | dd43edf4 | ths | checkr3 ffffffff |
| 75 | dd43edf4 | ths | |
| 76 | dd43edf4 | ths | move.d 0x78134452,r3 |
| 77 | dd43edf4 | ths | cmpu.b [r5],r3 |
| 78 | dd43edf4 | ths | test_cc 0 0 0 0 |
| 79 | dd43edf4 | ths | checkr3 78134452 |
| 80 | dd43edf4 | ths | |
| 81 | dd43edf4 | ths | move.d 0x78134452,r3 |
| 82 | dd43edf4 | ths | cmps.b [r5+],r3 |
| 83 | dd43edf4 | ths | test_cc 0 0 0 1 |
| 84 | dd43edf4 | ths | checkr3 78134452 |
| 85 | dd43edf4 | ths | |
| 86 | dd43edf4 | ths | move.d 0x78134452,r3 |
| 87 | dd43edf4 | ths | cmpu.w [r5],r3 |
| 88 | dd43edf4 | ths | test_cc 0 0 0 0 |
| 89 | dd43edf4 | ths | checkr3 78134452 |
| 90 | dd43edf4 | ths | |
| 91 | dd43edf4 | ths | move.d 0x78134452,r3 |
| 92 | dd43edf4 | ths | cmps.w [r5+],r3 |
| 93 | dd43edf4 | ths | test_cc 0 0 0 1 |
| 94 | dd43edf4 | ths | checkr3 78134452 |
| 95 | dd43edf4 | ths | |
| 96 | dd43edf4 | ths | move.d 0x4452,r3 |
| 97 | dd43edf4 | ths | cmps.w [r5+],r3 |
| 98 | dd43edf4 | ths | test_cc 0 0 0 1 |
| 99 | dd43edf4 | ths | checkr3 4452 |
| 100 | dd43edf4 | ths | |
| 101 | dd43edf4 | ths | move.d 0x80000032,r3 |
| 102 | dd43edf4 | ths | cmpu.w [r5+],r3 |
| 103 | dd43edf4 | ths | test_cc 0 0 1 0 |
| 104 | dd43edf4 | ths | checkr3 80000032 |
| 105 | dd43edf4 | ths | |
| 106 | dd43edf4 | ths | quit |