Revision f9cb5045 target-xtensa/translate.c
b/target-xtensa/translate.c | ||
---|---|---|
1778 | 1778 |
case 5: |
1779 | 1779 |
gen_window_check2(dc, RRR_R, RRR_T); |
1780 | 1780 |
{ |
1781 |
int shiftimm = RRR_S | (OP1 << 4);
|
|
1781 |
int shiftimm = RRR_S | ((OP1 & 1) << 4);
|
|
1782 | 1782 |
int maskimm = (1 << (OP2 + 1)) - 1; |
1783 | 1783 |
|
1784 | 1784 |
TCGv_i32 tmp = tcg_temp_new_i32(); |
1785 |
tcg_gen_shri_i32(tmp, cpu_R[RRR_T], shiftimm); |
|
1786 |
tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm); |
|
1785 |
|
|
1786 |
if (shiftimm) { |
|
1787 |
tcg_gen_shri_i32(tmp, cpu_R[RRR_T], shiftimm); |
|
1788 |
} else { |
|
1789 |
tcg_gen_mov_i32(tmp, cpu_R[RRR_T]); |
|
1790 |
} |
|
1791 |
|
|
1792 |
switch (maskimm) { |
|
1793 |
case 0xff: |
|
1794 |
tcg_gen_ext8u_i32(cpu_R[RRR_R], tmp); |
|
1795 |
break; |
|
1796 |
|
|
1797 |
case 0xffff: |
|
1798 |
tcg_gen_ext16u_i32(cpu_R[RRR_R], tmp); |
|
1799 |
break; |
|
1800 |
|
|
1801 |
default: |
|
1802 |
tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm); |
|
1803 |
break; |
|
1804 |
} |
|
1787 | 1805 |
tcg_temp_free(tmp); |
1788 | 1806 |
} |
1789 | 1807 |
break; |
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