root / hw / exynos4210_fimd.c @ fa156e51
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1 | 30628cb1 | Mitsyanko Igor | /*
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2 | 30628cb1 | Mitsyanko Igor | * Samsung exynos4210 Display Controller (FIMD)
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3 | 30628cb1 | Mitsyanko Igor | *
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4 | 30628cb1 | Mitsyanko Igor | * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
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5 | 30628cb1 | Mitsyanko Igor | * All rights reserved.
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6 | 30628cb1 | Mitsyanko Igor | * Based on LCD controller for Samsung S5PC1xx-based board emulation
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7 | 30628cb1 | Mitsyanko Igor | * by Kirill Batuzov <batuzovk@ispras.ru>
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8 | 30628cb1 | Mitsyanko Igor | *
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9 | 30628cb1 | Mitsyanko Igor | * Contributed by Mitsyanko Igor <i.mitsyanko@samsung.com>
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10 | 30628cb1 | Mitsyanko Igor | *
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11 | 30628cb1 | Mitsyanko Igor | * This program is free software; you can redistribute it and/or modify it
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12 | 30628cb1 | Mitsyanko Igor | * under the terms of the GNU General Public License as published by the
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13 | 30628cb1 | Mitsyanko Igor | * Free Software Foundation; either version 2 of the License, or (at your
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14 | 30628cb1 | Mitsyanko Igor | * option) any later version.
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15 | 30628cb1 | Mitsyanko Igor | *
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16 | 30628cb1 | Mitsyanko Igor | * This program is distributed in the hope that it will be useful,
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17 | 30628cb1 | Mitsyanko Igor | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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18 | 30628cb1 | Mitsyanko Igor | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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19 | 30628cb1 | Mitsyanko Igor | * See the GNU General Public License for more details.
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20 | 30628cb1 | Mitsyanko Igor | *
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21 | 30628cb1 | Mitsyanko Igor | * You should have received a copy of the GNU General Public License along
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22 | 30628cb1 | Mitsyanko Igor | * with this program; if not, see <http://www.gnu.org/licenses/>.
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23 | 30628cb1 | Mitsyanko Igor | */
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24 | 30628cb1 | Mitsyanko Igor | |
25 | 30628cb1 | Mitsyanko Igor | #include "qemu-common.h" |
26 | 30628cb1 | Mitsyanko Igor | #include "cpu-all.h" |
27 | 30628cb1 | Mitsyanko Igor | #include "sysbus.h" |
28 | 30628cb1 | Mitsyanko Igor | #include "console.h" |
29 | 30628cb1 | Mitsyanko Igor | #include "pixel_ops.h" |
30 | 30628cb1 | Mitsyanko Igor | #include "bswap.h" |
31 | 30628cb1 | Mitsyanko Igor | |
32 | 30628cb1 | Mitsyanko Igor | /* Debug messages configuration */
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33 | 30628cb1 | Mitsyanko Igor | #define EXYNOS4210_FIMD_DEBUG 0 |
34 | 30628cb1 | Mitsyanko Igor | #define EXYNOS4210_FIMD_MODE_TRACE 0 |
35 | 30628cb1 | Mitsyanko Igor | |
36 | 30628cb1 | Mitsyanko Igor | #if EXYNOS4210_FIMD_DEBUG == 0 |
37 | 30628cb1 | Mitsyanko Igor | #define DPRINT_L1(fmt, args...) do { } while (0) |
38 | 30628cb1 | Mitsyanko Igor | #define DPRINT_L2(fmt, args...) do { } while (0) |
39 | 30628cb1 | Mitsyanko Igor | #define DPRINT_ERROR(fmt, args...) do { } while (0) |
40 | 30628cb1 | Mitsyanko Igor | #elif EXYNOS4210_FIMD_DEBUG == 1 |
41 | 30628cb1 | Mitsyanko Igor | #define DPRINT_L1(fmt, args...) \
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42 | 30628cb1 | Mitsyanko Igor | do {fprintf(stderr, "QEMU FIMD: "fmt, ## args); } while (0) |
43 | 30628cb1 | Mitsyanko Igor | #define DPRINT_L2(fmt, args...) do { } while (0) |
44 | 30628cb1 | Mitsyanko Igor | #define DPRINT_ERROR(fmt, args...) \
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45 | 30628cb1 | Mitsyanko Igor | do {fprintf(stderr, "QEMU FIMD ERROR: "fmt, ## args); } while (0) |
46 | 30628cb1 | Mitsyanko Igor | #else
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47 | 30628cb1 | Mitsyanko Igor | #define DPRINT_L1(fmt, args...) \
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48 | 30628cb1 | Mitsyanko Igor | do {fprintf(stderr, "QEMU FIMD: "fmt, ## args); } while (0) |
49 | 30628cb1 | Mitsyanko Igor | #define DPRINT_L2(fmt, args...) \
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50 | 30628cb1 | Mitsyanko Igor | do {fprintf(stderr, "QEMU FIMD: "fmt, ## args); } while (0) |
51 | 30628cb1 | Mitsyanko Igor | #define DPRINT_ERROR(fmt, args...) \
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52 | 30628cb1 | Mitsyanko Igor | do {fprintf(stderr, "QEMU FIMD ERROR: "fmt, ## args); } while (0) |
53 | 30628cb1 | Mitsyanko Igor | #endif
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54 | 30628cb1 | Mitsyanko Igor | |
55 | 30628cb1 | Mitsyanko Igor | #if EXYNOS4210_FIMD_MODE_TRACE == 0 |
56 | 30628cb1 | Mitsyanko Igor | #define DPRINT_TRACE(fmt, args...) do { } while (0) |
57 | 30628cb1 | Mitsyanko Igor | #else
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58 | 30628cb1 | Mitsyanko Igor | #define DPRINT_TRACE(fmt, args...) \
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59 | 30628cb1 | Mitsyanko Igor | do {fprintf(stderr, "QEMU FIMD: "fmt, ## args); } while (0) |
60 | 30628cb1 | Mitsyanko Igor | #endif
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61 | 30628cb1 | Mitsyanko Igor | |
62 | 30628cb1 | Mitsyanko Igor | #define NUM_OF_WINDOWS 5 |
63 | 30628cb1 | Mitsyanko Igor | #define FIMD_REGS_SIZE 0x4114 |
64 | 30628cb1 | Mitsyanko Igor | |
65 | 30628cb1 | Mitsyanko Igor | /* Video main control registers */
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66 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON0 0x0000 |
67 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON1 0x0004 |
68 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON2 0x0008 |
69 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON3 0x000C |
70 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON0_ENVID_F (1 << 0) |
71 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON0_ENVID (1 << 1) |
72 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON0_ENVID_MASK ((1 << 0) | (1 << 1)) |
73 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDCON1_ROMASK 0x07FFE000 |
74 | 30628cb1 | Mitsyanko Igor | |
75 | 30628cb1 | Mitsyanko Igor | /* Video time control registers */
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76 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDTCON_START 0x10 |
77 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDTCON_END 0x1C |
78 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDTCON2_SIZE_MASK 0x07FF |
79 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDTCON2_HOR_SHIFT 0 |
80 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDTCON2_VER_SHIFT 11 |
81 | 30628cb1 | Mitsyanko Igor | |
82 | 30628cb1 | Mitsyanko Igor | /* Window control registers */
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83 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_START 0x0020 |
84 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_END 0x0030 |
85 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_ROMASK 0x82200000 |
86 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_ENWIN (1 << 0) |
87 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BLD_PIX (1 << 6) |
88 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_ALPHA_MUL (1 << 7) |
89 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_ALPHA_SEL (1 << 1) |
90 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_SWAP 0x078000 |
91 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_SWAP_SHIFT 15 |
92 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_SWAP_WORD 0x1 |
93 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_SWAP_HWORD 0x2 |
94 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_SWAP_BYTE 0x4 |
95 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_SWAP_BITS 0x8 |
96 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUFSTAT_L (1 << 21) |
97 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUFSTAT_H (1 << 31) |
98 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUFSTATUS ((1 << 21) | (1 << 31)) |
99 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUF0_STAT ((0 << 21) | (0 << 31)) |
100 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUF1_STAT ((1 << 21) | (0 << 31)) |
101 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUF2_STAT ((0 << 21) | (1 << 31)) |
102 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUFSELECT ((1 << 20) | (1 << 30)) |
103 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUF0_SEL ((0 << 20) | (0 << 30)) |
104 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUF1_SEL ((1 << 20) | (0 << 30)) |
105 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUF2_SEL ((0 << 20) | (1 << 30)) |
106 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCON_BUFMODE (1 << 14) |
107 | 30628cb1 | Mitsyanko Igor | #define IS_PALETTIZED_MODE(w) (w->wincon & 0xC) |
108 | 30628cb1 | Mitsyanko Igor | #define PAL_MODE_WITH_ALPHA(x) ((x) == 7) |
109 | 30628cb1 | Mitsyanko Igor | #define WIN_BPP_MODE(w) ((w->wincon >> 2) & 0xF) |
110 | 30628cb1 | Mitsyanko Igor | #define WIN_BPP_MODE_WITH_ALPHA(w) \
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111 | 30628cb1 | Mitsyanko Igor | (WIN_BPP_MODE(w) == 0xD || WIN_BPP_MODE(w) == 0xE) |
112 | 30628cb1 | Mitsyanko Igor | |
113 | 30628cb1 | Mitsyanko Igor | /* Shadow control register */
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114 | 30628cb1 | Mitsyanko Igor | #define FIMD_SHADOWCON 0x0034 |
115 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINDOW_PROTECTED(s, w) ((s) & (1 << (10 + (w)))) |
116 | 30628cb1 | Mitsyanko Igor | /* Channel mapping control register */
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117 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINCHMAP 0x003C |
118 | 30628cb1 | Mitsyanko Igor | |
119 | 30628cb1 | Mitsyanko Igor | /* Window position control registers */
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120 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_START 0x0040 |
121 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_END 0x0088 |
122 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_COORD_MASK 0x07FF |
123 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_HOR_SHIFT 11 |
124 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_VER_SHIFT 0 |
125 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_ALPHA_AEN0 0xFFF000 |
126 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_AEN0_SHIFT 12 |
127 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDOSD_ALPHA_AEN1 0x000FFF |
128 | 30628cb1 | Mitsyanko Igor | |
129 | 30628cb1 | Mitsyanko Igor | /* Frame buffer address registers */
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130 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD0_START 0x00A0 |
131 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD0_END 0x00C4 |
132 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD0_END 0x00C4 |
133 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD1_START 0x00D0 |
134 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD1_END 0x00F4 |
135 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD2_START 0x0100 |
136 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD2_END 0x0110 |
137 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD2_PAGEWIDTH 0x1FFF |
138 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD2_OFFSIZE 0x1FFF |
139 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWADD2_OFFSIZE_SHIFT 13 |
140 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDW0ADD0_B2 0x20A0 |
141 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDW4ADD0_B2 0x20C0 |
142 | 30628cb1 | Mitsyanko Igor | |
143 | 30628cb1 | Mitsyanko Igor | /* Video interrupt control registers */
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144 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINTCON0 0x130 |
145 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINTCON1 0x134 |
146 | 30628cb1 | Mitsyanko Igor | |
147 | 30628cb1 | Mitsyanko Igor | /* Window color key registers */
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148 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYCON_START 0x140 |
149 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYCON_END 0x15C |
150 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYCON0_COMPKEY 0x00FFFFFF |
151 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYCON0_CTL_SHIFT 24 |
152 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYCON0_DIRCON (1 << 24) |
153 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYCON0_KEYEN (1 << 25) |
154 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYCON0_KEYBLEN (1 << 26) |
155 | 30628cb1 | Mitsyanko Igor | /* Window color key alpha control register */
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156 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYALPHA_START 0x160 |
157 | 30628cb1 | Mitsyanko Igor | #define FIMD_WKEYALPHA_END 0x16C |
158 | 30628cb1 | Mitsyanko Igor | |
159 | 30628cb1 | Mitsyanko Igor | /* Dithering control register */
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160 | 30628cb1 | Mitsyanko Igor | #define FIMD_DITHMODE 0x170 |
161 | 30628cb1 | Mitsyanko Igor | |
162 | 30628cb1 | Mitsyanko Igor | /* Window alpha control registers */
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163 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDALPHA_ALPHA_LOWER 0x000F0F0F |
164 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDALPHA_ALPHA_UPPER 0x00F0F0F0 |
165 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWALPHA_START 0x21C |
166 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDWALPHA_END 0x240 |
167 | 30628cb1 | Mitsyanko Igor | |
168 | 30628cb1 | Mitsyanko Igor | /* Window color map registers */
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169 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINMAP_START 0x180 |
170 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINMAP_END 0x190 |
171 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINMAP_EN (1 << 24) |
172 | 30628cb1 | Mitsyanko Igor | #define FIMD_WINMAP_COLOR_MASK 0x00FFFFFF |
173 | 30628cb1 | Mitsyanko Igor | |
174 | 30628cb1 | Mitsyanko Igor | /* Window palette control registers */
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175 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPALCON_HIGH 0x019C |
176 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPALCON_LOW 0x01A0 |
177 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPALCON_UPDATEEN (1 << 9) |
178 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W0PAL_L 0x07 |
179 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W0PAL_L_SHT 0 |
180 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W1PAL_L 0x07 |
181 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W1PAL_L_SHT 3 |
182 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W2PAL_L 0x01 |
183 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W2PAL_L_SHT 6 |
184 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W2PAL_H 0x06 |
185 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W2PAL_H_SHT 8 |
186 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W3PAL_L 0x01 |
187 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W3PAL_L_SHT 7 |
188 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W3PAL_H 0x06 |
189 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W3PAL_H_SHT 12 |
190 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W4PAL_L 0x01 |
191 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W4PAL_L_SHT 8 |
192 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W4PAL_H 0x06 |
193 | 30628cb1 | Mitsyanko Igor | #define FIMD_WPAL_W4PAL_H_SHT 16 |
194 | 30628cb1 | Mitsyanko Igor | |
195 | 30628cb1 | Mitsyanko Igor | /* Trigger control registers */
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196 | 30628cb1 | Mitsyanko Igor | #define FIMD_TRIGCON 0x01A4 |
197 | 30628cb1 | Mitsyanko Igor | #define FIMD_TRIGCON_ROMASK 0x00000004 |
198 | 30628cb1 | Mitsyanko Igor | |
199 | 30628cb1 | Mitsyanko Igor | /* LCD I80 Interface Control */
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200 | 30628cb1 | Mitsyanko Igor | #define FIMD_I80IFCON_START 0x01B0 |
201 | 30628cb1 | Mitsyanko Igor | #define FIMD_I80IFCON_END 0x01BC |
202 | 30628cb1 | Mitsyanko Igor | /* Color gain control register */
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203 | 30628cb1 | Mitsyanko Igor | #define FIMD_COLORGAINCON 0x01C0 |
204 | 30628cb1 | Mitsyanko Igor | /* LCD i80 Interface Command Control */
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205 | 30628cb1 | Mitsyanko Igor | #define FIMD_LDI_CMDCON0 0x01D0 |
206 | 30628cb1 | Mitsyanko Igor | #define FIMD_LDI_CMDCON1 0x01D4 |
207 | 30628cb1 | Mitsyanko Igor | /* I80 System Interface Manual Command Control */
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208 | 30628cb1 | Mitsyanko Igor | #define FIMD_SIFCCON0 0x01E0 |
209 | 30628cb1 | Mitsyanko Igor | #define FIMD_SIFCCON2 0x01E8 |
210 | 30628cb1 | Mitsyanko Igor | |
211 | 30628cb1 | Mitsyanko Igor | /* Hue Control Registers */
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212 | 30628cb1 | Mitsyanko Igor | #define FIMD_HUECOEFCR_START 0x01EC |
213 | 30628cb1 | Mitsyanko Igor | #define FIMD_HUECOEFCR_END 0x01F4 |
214 | 30628cb1 | Mitsyanko Igor | #define FIMD_HUECOEFCB_START 0x01FC |
215 | 30628cb1 | Mitsyanko Igor | #define FIMD_HUECOEFCB_END 0x0208 |
216 | 30628cb1 | Mitsyanko Igor | #define FIMD_HUEOFFSET 0x020C |
217 | 30628cb1 | Mitsyanko Igor | |
218 | 30628cb1 | Mitsyanko Igor | /* Video interrupt control registers */
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219 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINT_INTFIFOPEND (1 << 0) |
220 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINT_INTFRMPEND (1 << 1) |
221 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINT_INTI80PEND (1 << 2) |
222 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINT_INTEN (1 << 0) |
223 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINT_INTFIFOEN (1 << 1) |
224 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINT_INTFRMEN (1 << 12) |
225 | 30628cb1 | Mitsyanko Igor | #define FIMD_VIDINT_I80IFDONE (1 << 17) |
226 | 30628cb1 | Mitsyanko Igor | |
227 | 30628cb1 | Mitsyanko Igor | /* Window blend equation control registers */
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228 | 30628cb1 | Mitsyanko Igor | #define FIMD_BLENDEQ_START 0x0244 |
229 | 30628cb1 | Mitsyanko Igor | #define FIMD_BLENDEQ_END 0x0250 |
230 | 30628cb1 | Mitsyanko Igor | #define FIMD_BLENDCON 0x0260 |
231 | 30628cb1 | Mitsyanko Igor | #define FIMD_ALPHA_8BIT (1 << 0) |
232 | 30628cb1 | Mitsyanko Igor | #define FIMD_BLENDEQ_COEF_MASK 0xF |
233 | 30628cb1 | Mitsyanko Igor | |
234 | 30628cb1 | Mitsyanko Igor | /* Window RTQOS Control Registers */
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235 | 30628cb1 | Mitsyanko Igor | #define FIMD_WRTQOSCON_START 0x0264 |
236 | 30628cb1 | Mitsyanko Igor | #define FIMD_WRTQOSCON_END 0x0274 |
237 | 30628cb1 | Mitsyanko Igor | |
238 | 30628cb1 | Mitsyanko Igor | /* LCD I80 Interface Command */
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239 | 30628cb1 | Mitsyanko Igor | #define FIMD_I80IFCMD_START 0x0280 |
240 | 30628cb1 | Mitsyanko Igor | #define FIMD_I80IFCMD_END 0x02AC |
241 | 30628cb1 | Mitsyanko Igor | |
242 | 30628cb1 | Mitsyanko Igor | /* Shadow windows control registers */
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243 | 30628cb1 | Mitsyanko Igor | #define FIMD_SHD_ADD0_START 0x40A0 |
244 | 30628cb1 | Mitsyanko Igor | #define FIMD_SHD_ADD0_END 0x40C0 |
245 | 30628cb1 | Mitsyanko Igor | #define FIMD_SHD_ADD1_START 0x40D0 |
246 | 30628cb1 | Mitsyanko Igor | #define FIMD_SHD_ADD1_END 0x40F0 |
247 | 30628cb1 | Mitsyanko Igor | #define FIMD_SHD_ADD2_START 0x4100 |
248 | 30628cb1 | Mitsyanko Igor | #define FIMD_SHD_ADD2_END 0x4110 |
249 | 30628cb1 | Mitsyanko Igor | |
250 | 30628cb1 | Mitsyanko Igor | /* Palette memory */
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251 | 30628cb1 | Mitsyanko Igor | #define FIMD_PAL_MEM_START 0x2400 |
252 | 30628cb1 | Mitsyanko Igor | #define FIMD_PAL_MEM_END 0x37FC |
253 | 30628cb1 | Mitsyanko Igor | /* Palette memory aliases for windows 0 and 1 */
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254 | 30628cb1 | Mitsyanko Igor | #define FIMD_PALMEM_AL_START 0x0400 |
255 | 30628cb1 | Mitsyanko Igor | #define FIMD_PALMEM_AL_END 0x0BFC |
256 | 30628cb1 | Mitsyanko Igor | |
257 | 30628cb1 | Mitsyanko Igor | typedef struct { |
258 | 30628cb1 | Mitsyanko Igor | uint8_t r, g, b; |
259 | 30628cb1 | Mitsyanko Igor | /* D[31..24]dummy, D[23..16]rAlpha, D[15..8]gAlpha, D[7..0]bAlpha */
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260 | 30628cb1 | Mitsyanko Igor | uint32_t a; |
261 | 30628cb1 | Mitsyanko Igor | } rgba; |
262 | 30628cb1 | Mitsyanko Igor | #define RGBA_SIZE 7 |
263 | 30628cb1 | Mitsyanko Igor | |
264 | 30628cb1 | Mitsyanko Igor | typedef void pixel_to_rgb_func(uint32_t pixel, rgba *p); |
265 | 30628cb1 | Mitsyanko Igor | typedef struct Exynos4210fimdWindow Exynos4210fimdWindow; |
266 | 30628cb1 | Mitsyanko Igor | |
267 | 30628cb1 | Mitsyanko Igor | struct Exynos4210fimdWindow {
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268 | 30628cb1 | Mitsyanko Igor | uint32_t wincon; /* Window control register */
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269 | 30628cb1 | Mitsyanko Igor | uint32_t buf_start[3]; /* Start address for video frame buffer */ |
270 | 30628cb1 | Mitsyanko Igor | uint32_t buf_end[3]; /* End address for video frame buffer */ |
271 | 30628cb1 | Mitsyanko Igor | uint32_t keycon[2]; /* Window color key registers */ |
272 | 30628cb1 | Mitsyanko Igor | uint32_t keyalpha; /* Color key alpha control register */
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273 | 30628cb1 | Mitsyanko Igor | uint32_t winmap; /* Window color map register */
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274 | 30628cb1 | Mitsyanko Igor | uint32_t blendeq; /* Window blending equation control register */
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275 | 30628cb1 | Mitsyanko Igor | uint32_t rtqoscon; /* Window RTQOS Control Registers */
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276 | 30628cb1 | Mitsyanko Igor | uint32_t palette[256]; /* Palette RAM */ |
277 | 30628cb1 | Mitsyanko Igor | uint32_t shadow_buf_start; /* Start address of shadow frame buffer */
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278 | 30628cb1 | Mitsyanko Igor | uint32_t shadow_buf_end; /* End address of shadow frame buffer */
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279 | 30628cb1 | Mitsyanko Igor | uint32_t shadow_buf_size; /* Virtual shadow screen width */
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280 | 30628cb1 | Mitsyanko Igor | |
281 | 30628cb1 | Mitsyanko Igor | pixel_to_rgb_func *pixel_to_rgb; |
282 | 30628cb1 | Mitsyanko Igor | void (*draw_line)(Exynos4210fimdWindow *w, uint8_t *src, uint8_t *dst,
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283 | 30628cb1 | Mitsyanko Igor | bool blend);
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284 | 30628cb1 | Mitsyanko Igor | uint32_t (*get_alpha)(Exynos4210fimdWindow *w, uint32_t pix_a); |
285 | 30628cb1 | Mitsyanko Igor | uint16_t lefttop_x, lefttop_y; /* VIDOSD0 register */
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286 | 30628cb1 | Mitsyanko Igor | uint16_t rightbot_x, rightbot_y; /* VIDOSD1 register */
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287 | 30628cb1 | Mitsyanko Igor | uint32_t osdsize; /* VIDOSD2&3 register */
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288 | 30628cb1 | Mitsyanko Igor | uint32_t alpha_val[2]; /* VIDOSD2&3, VIDWALPHA registers */ |
289 | 30628cb1 | Mitsyanko Igor | uint16_t virtpage_width; /* VIDWADD2 register */
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290 | 30628cb1 | Mitsyanko Igor | uint16_t virtpage_offsize; /* VIDWADD2 register */
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291 | 30628cb1 | Mitsyanko Igor | MemoryRegionSection mem_section; /* RAM fragment containing framebuffer */
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292 | 30628cb1 | Mitsyanko Igor | uint8_t *host_fb_addr; /* Host pointer to window's framebuffer */
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293 | 30628cb1 | Mitsyanko Igor | target_phys_addr_t fb_len; /* Framebuffer length */
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294 | 30628cb1 | Mitsyanko Igor | }; |
295 | 30628cb1 | Mitsyanko Igor | |
296 | 30628cb1 | Mitsyanko Igor | typedef struct { |
297 | 30628cb1 | Mitsyanko Igor | SysBusDevice busdev; |
298 | 30628cb1 | Mitsyanko Igor | MemoryRegion iomem; |
299 | 30628cb1 | Mitsyanko Igor | DisplayState *console; |
300 | 30628cb1 | Mitsyanko Igor | qemu_irq irq[3];
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301 | 30628cb1 | Mitsyanko Igor | |
302 | 30628cb1 | Mitsyanko Igor | uint32_t vidcon[4]; /* Video main control registers 0-3 */ |
303 | 30628cb1 | Mitsyanko Igor | uint32_t vidtcon[4]; /* Video time control registers 0-3 */ |
304 | 30628cb1 | Mitsyanko Igor | uint32_t shadowcon; /* Window shadow control register */
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305 | 30628cb1 | Mitsyanko Igor | uint32_t winchmap; /* Channel mapping control register */
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306 | 30628cb1 | Mitsyanko Igor | uint32_t vidintcon[2]; /* Video interrupt control registers */ |
307 | 30628cb1 | Mitsyanko Igor | uint32_t dithmode; /* Dithering control register */
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308 | 30628cb1 | Mitsyanko Igor | uint32_t wpalcon[2]; /* Window palette control registers */ |
309 | 30628cb1 | Mitsyanko Igor | uint32_t trigcon; /* Trigger control register */
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310 | 30628cb1 | Mitsyanko Igor | uint32_t i80ifcon[4]; /* I80 interface control registers */ |
311 | 30628cb1 | Mitsyanko Igor | uint32_t colorgaincon; /* Color gain control register */
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312 | 30628cb1 | Mitsyanko Igor | uint32_t ldi_cmdcon[2]; /* LCD I80 interface command control */ |
313 | 30628cb1 | Mitsyanko Igor | uint32_t sifccon[3]; /* I80 System Interface Manual Command Control */ |
314 | 30628cb1 | Mitsyanko Igor | uint32_t huecoef_cr[4]; /* Hue control registers */ |
315 | 30628cb1 | Mitsyanko Igor | uint32_t huecoef_cb[4]; /* Hue control registers */ |
316 | 30628cb1 | Mitsyanko Igor | uint32_t hueoffset; /* Hue offset control register */
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317 | 30628cb1 | Mitsyanko Igor | uint32_t blendcon; /* Blending control register */
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318 | 30628cb1 | Mitsyanko Igor | uint32_t i80ifcmd[12]; /* LCD I80 Interface Command */ |
319 | 30628cb1 | Mitsyanko Igor | |
320 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdWindow window[5]; /* Window-specific registers */ |
321 | 30628cb1 | Mitsyanko Igor | uint8_t *ifb; /* Internal frame buffer */
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322 | 30628cb1 | Mitsyanko Igor | bool invalidate; /* Image needs to be redrawn */ |
323 | 30628cb1 | Mitsyanko Igor | bool enabled; /* Display controller is enabled */ |
324 | 30628cb1 | Mitsyanko Igor | } Exynos4210fimdState; |
325 | 30628cb1 | Mitsyanko Igor | |
326 | 30628cb1 | Mitsyanko Igor | /* Perform byte/halfword/word swap of data according to WINCON */
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327 | 30628cb1 | Mitsyanko Igor | static inline void fimd_swap_data(unsigned int swap_ctl, uint64_t *data) |
328 | 30628cb1 | Mitsyanko Igor | { |
329 | 30628cb1 | Mitsyanko Igor | int i;
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330 | 30628cb1 | Mitsyanko Igor | uint64_t res; |
331 | 30628cb1 | Mitsyanko Igor | uint64_t x = *data; |
332 | 30628cb1 | Mitsyanko Igor | |
333 | 30628cb1 | Mitsyanko Igor | if (swap_ctl & FIMD_WINCON_SWAP_BITS) {
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334 | 30628cb1 | Mitsyanko Igor | res = 0;
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335 | 30628cb1 | Mitsyanko Igor | for (i = 0; i < 64; i++) { |
336 | 30628cb1 | Mitsyanko Igor | if (x & (1ULL << (64 - i))) { |
337 | 30628cb1 | Mitsyanko Igor | res |= (1ULL << i);
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338 | 30628cb1 | Mitsyanko Igor | } |
339 | 30628cb1 | Mitsyanko Igor | } |
340 | 30628cb1 | Mitsyanko Igor | x = res; |
341 | 30628cb1 | Mitsyanko Igor | } |
342 | 30628cb1 | Mitsyanko Igor | |
343 | 30628cb1 | Mitsyanko Igor | if (swap_ctl & FIMD_WINCON_SWAP_BYTE) {
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344 | 30628cb1 | Mitsyanko Igor | x = bswap64(x); |
345 | 30628cb1 | Mitsyanko Igor | } |
346 | 30628cb1 | Mitsyanko Igor | |
347 | 30628cb1 | Mitsyanko Igor | if (swap_ctl & FIMD_WINCON_SWAP_HWORD) {
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348 | 30628cb1 | Mitsyanko Igor | x = ((x & 0x000000000000FFFFULL) << 48) | |
349 | 30628cb1 | Mitsyanko Igor | ((x & 0x00000000FFFF0000ULL) << 16) | |
350 | 30628cb1 | Mitsyanko Igor | ((x & 0x0000FFFF00000000ULL) >> 16) | |
351 | 30628cb1 | Mitsyanko Igor | ((x & 0xFFFF000000000000ULL) >> 48); |
352 | 30628cb1 | Mitsyanko Igor | } |
353 | 30628cb1 | Mitsyanko Igor | |
354 | 30628cb1 | Mitsyanko Igor | if (swap_ctl & FIMD_WINCON_SWAP_WORD) {
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355 | 30628cb1 | Mitsyanko Igor | x = ((x & 0x00000000FFFFFFFFULL) << 32) | |
356 | 30628cb1 | Mitsyanko Igor | ((x & 0xFFFFFFFF00000000ULL) >> 32); |
357 | 30628cb1 | Mitsyanko Igor | } |
358 | 30628cb1 | Mitsyanko Igor | |
359 | 30628cb1 | Mitsyanko Igor | *data = x; |
360 | 30628cb1 | Mitsyanko Igor | } |
361 | 30628cb1 | Mitsyanko Igor | |
362 | 30628cb1 | Mitsyanko Igor | /* Conversion routines of Pixel data from frame buffer area to internal RGBA
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363 | 30628cb1 | Mitsyanko Igor | * pixel representation.
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364 | 30628cb1 | Mitsyanko Igor | * Every color component internally represented as 8-bit value. If original
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365 | 30628cb1 | Mitsyanko Igor | * data has less than 8 bit for component, data is extended to 8 bit. For
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366 | 30628cb1 | Mitsyanko Igor | * example, if blue component has only two possible values 0 and 1 it will be
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367 | 30628cb1 | Mitsyanko Igor | * extended to 0 and 0xFF */
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368 | 30628cb1 | Mitsyanko Igor | |
369 | 30628cb1 | Mitsyanko Igor | /* One bit for alpha representation */
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370 | 30628cb1 | Mitsyanko Igor | #define DEF_PIXEL_TO_RGB_A1(N, R, G, B) \
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371 | 30628cb1 | Mitsyanko Igor | static void N(uint32_t pixel, rgba *p) \ |
372 | 30628cb1 | Mitsyanko Igor | { \ |
373 | 30628cb1 | Mitsyanko Igor | p->b = ((pixel & ((1 << (B)) - 1)) << (8 - (B))) | \ |
374 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (B) - 8)) & ((1 << (8 - (B))) - 1)); \ |
375 | 30628cb1 | Mitsyanko Igor | pixel >>= (B); \ |
376 | 30628cb1 | Mitsyanko Igor | p->g = (pixel & ((1 << (G)) - 1)) << (8 - (G)) | \ |
377 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (G) - 8)) & ((1 << (8 - (G))) - 1)); \ |
378 | 30628cb1 | Mitsyanko Igor | pixel >>= (G); \ |
379 | 30628cb1 | Mitsyanko Igor | p->r = (pixel & ((1 << (R)) - 1)) << (8 - (R)) | \ |
380 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (R) - 8)) & ((1 << (8 - (R))) - 1)); \ |
381 | 30628cb1 | Mitsyanko Igor | pixel >>= (R); \ |
382 | 30628cb1 | Mitsyanko Igor | p->a = (pixel & 0x1); \
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383 | 30628cb1 | Mitsyanko Igor | } |
384 | 30628cb1 | Mitsyanko Igor | |
385 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A1(pixel_a444_to_rgb, 4, 4, 4) |
386 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A1(pixel_a555_to_rgb, 5, 5, 5) |
387 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A1(pixel_a666_to_rgb, 6, 6, 6) |
388 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A1(pixel_a665_to_rgb, 6, 6, 5) |
389 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A1(pixel_a888_to_rgb, 8, 8, 8) |
390 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A1(pixel_a887_to_rgb, 8, 8, 7) |
391 | 30628cb1 | Mitsyanko Igor | |
392 | 30628cb1 | Mitsyanko Igor | /* Alpha component is always zero */
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393 | 30628cb1 | Mitsyanko Igor | #define DEF_PIXEL_TO_RGB_A0(N, R, G, B) \
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394 | 30628cb1 | Mitsyanko Igor | static void N(uint32_t pixel, rgba *p) \ |
395 | 30628cb1 | Mitsyanko Igor | { \ |
396 | 30628cb1 | Mitsyanko Igor | p->b = ((pixel & ((1 << (B)) - 1)) << (8 - (B))) | \ |
397 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (B) - 8)) & ((1 << (8 - (B))) - 1)); \ |
398 | 30628cb1 | Mitsyanko Igor | pixel >>= (B); \ |
399 | 30628cb1 | Mitsyanko Igor | p->g = (pixel & ((1 << (G)) - 1)) << (8 - (G)) | \ |
400 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (G) - 8)) & ((1 << (8 - (G))) - 1)); \ |
401 | 30628cb1 | Mitsyanko Igor | pixel >>= (G); \ |
402 | 30628cb1 | Mitsyanko Igor | p->r = (pixel & ((1 << (R)) - 1)) << (8 - (R)) | \ |
403 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (R) - 8)) & ((1 << (8 - (R))) - 1)); \ |
404 | 30628cb1 | Mitsyanko Igor | p->a = 0x0; \
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405 | 30628cb1 | Mitsyanko Igor | } |
406 | 30628cb1 | Mitsyanko Igor | |
407 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A0(pixel_565_to_rgb, 5, 6, 5) |
408 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A0(pixel_555_to_rgb, 5, 5, 5) |
409 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A0(pixel_666_to_rgb, 6, 6, 6) |
410 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A0(pixel_888_to_rgb, 8, 8, 8) |
411 | 30628cb1 | Mitsyanko Igor | |
412 | 30628cb1 | Mitsyanko Igor | /* Alpha component has some meaningful value */
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413 | 30628cb1 | Mitsyanko Igor | #define DEF_PIXEL_TO_RGB_A(N, R, G, B, A) \
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414 | 30628cb1 | Mitsyanko Igor | static void N(uint32_t pixel, rgba *p) \ |
415 | 30628cb1 | Mitsyanko Igor | { \ |
416 | 30628cb1 | Mitsyanko Igor | p->b = ((pixel & ((1 << (B)) - 1)) << (8 - (B))) | \ |
417 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (B) - 8)) & ((1 << (8 - (B))) - 1)); \ |
418 | 30628cb1 | Mitsyanko Igor | pixel >>= (B); \ |
419 | 30628cb1 | Mitsyanko Igor | p->g = (pixel & ((1 << (G)) - 1)) << (8 - (G)) | \ |
420 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (G) - 8)) & ((1 << (8 - (G))) - 1)); \ |
421 | 30628cb1 | Mitsyanko Igor | pixel >>= (G); \ |
422 | 30628cb1 | Mitsyanko Igor | p->r = (pixel & ((1 << (R)) - 1)) << (8 - (R)) | \ |
423 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (R) - 8)) & ((1 << (8 - (R))) - 1)); \ |
424 | 30628cb1 | Mitsyanko Igor | pixel >>= (R); \ |
425 | 30628cb1 | Mitsyanko Igor | p->a = (pixel & ((1 << (A)) - 1)) << (8 - (A)) | \ |
426 | 30628cb1 | Mitsyanko Igor | ((pixel >> (2 * (A) - 8)) & ((1 << (8 - (A))) - 1)); \ |
427 | 30628cb1 | Mitsyanko Igor | p->a = p->a | (p->a << 8) | (p->a << 16); \ |
428 | 30628cb1 | Mitsyanko Igor | } |
429 | 30628cb1 | Mitsyanko Igor | |
430 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A(pixel_4444_to_rgb, 4, 4, 4, 4) |
431 | 30628cb1 | Mitsyanko Igor | DEF_PIXEL_TO_RGB_A(pixel_8888_to_rgb, 8, 8, 8, 8) |
432 | 30628cb1 | Mitsyanko Igor | |
433 | 30628cb1 | Mitsyanko Igor | /* Lookup table to extent 2-bit color component to 8 bit */
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434 | 30628cb1 | Mitsyanko Igor | static const uint8_t pixel_lutable_2b[4] = { |
435 | 30628cb1 | Mitsyanko Igor | 0x0, 0x55, 0xAA, 0xFF |
436 | 30628cb1 | Mitsyanko Igor | }; |
437 | 30628cb1 | Mitsyanko Igor | /* Lookup table to extent 3-bit color component to 8 bit */
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438 | 30628cb1 | Mitsyanko Igor | static const uint8_t pixel_lutable_3b[8] = { |
439 | 30628cb1 | Mitsyanko Igor | 0x0, 0x24, 0x49, 0x6D, 0x92, 0xB6, 0xDB, 0xFF |
440 | 30628cb1 | Mitsyanko Igor | }; |
441 | 30628cb1 | Mitsyanko Igor | /* Special case for a232 bpp mode */
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442 | 30628cb1 | Mitsyanko Igor | static void pixel_a232_to_rgb(uint32_t pixel, rgba *p) |
443 | 30628cb1 | Mitsyanko Igor | { |
444 | 30628cb1 | Mitsyanko Igor | p->b = pixel_lutable_2b[(pixel & 0x3)];
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445 | 30628cb1 | Mitsyanko Igor | pixel >>= 2;
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446 | 30628cb1 | Mitsyanko Igor | p->g = pixel_lutable_3b[(pixel & 0x7)];
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447 | 30628cb1 | Mitsyanko Igor | pixel >>= 3;
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448 | 30628cb1 | Mitsyanko Igor | p->r = pixel_lutable_2b[(pixel & 0x3)];
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449 | 30628cb1 | Mitsyanko Igor | pixel >>= 2;
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450 | 30628cb1 | Mitsyanko Igor | p->a = (pixel & 0x1);
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451 | 30628cb1 | Mitsyanko Igor | } |
452 | 30628cb1 | Mitsyanko Igor | |
453 | 30628cb1 | Mitsyanko Igor | /* Special case for (5+1, 5+1, 5+1) mode. Data bit 15 is common LSB
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454 | 30628cb1 | Mitsyanko Igor | * for all three color components */
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455 | 30628cb1 | Mitsyanko Igor | static void pixel_1555_to_rgb(uint32_t pixel, rgba *p) |
456 | 30628cb1 | Mitsyanko Igor | { |
457 | 30628cb1 | Mitsyanko Igor | uint8_t comm = (pixel >> 15) & 1; |
458 | 30628cb1 | Mitsyanko Igor | p->b = ((((pixel & 0x1F) << 1) | comm) << 2) | ((pixel >> 3) & 0x3); |
459 | 30628cb1 | Mitsyanko Igor | pixel >>= 5;
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460 | 30628cb1 | Mitsyanko Igor | p->g = ((((pixel & 0x1F) << 1) | comm) << 2) | ((pixel >> 3) & 0x3); |
461 | 30628cb1 | Mitsyanko Igor | pixel >>= 5;
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462 | 30628cb1 | Mitsyanko Igor | p->r = ((((pixel & 0x1F) << 1) | comm) << 2) | ((pixel >> 3) & 0x3); |
463 | 30628cb1 | Mitsyanko Igor | p->a = 0x0;
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464 | 30628cb1 | Mitsyanko Igor | } |
465 | 30628cb1 | Mitsyanko Igor | |
466 | 30628cb1 | Mitsyanko Igor | /* Put/get pixel to/from internal LCD Controller framebuffer */
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467 | 30628cb1 | Mitsyanko Igor | |
468 | 30628cb1 | Mitsyanko Igor | static int put_pixel_ifb(const rgba p, uint8_t *d) |
469 | 30628cb1 | Mitsyanko Igor | { |
470 | 30628cb1 | Mitsyanko Igor | *(uint8_t *)d++ = p.r; |
471 | 30628cb1 | Mitsyanko Igor | *(uint8_t *)d++ = p.g; |
472 | 30628cb1 | Mitsyanko Igor | *(uint8_t *)d++ = p.b; |
473 | 30628cb1 | Mitsyanko Igor | *(uint32_t *)d = p.a; |
474 | 30628cb1 | Mitsyanko Igor | return RGBA_SIZE;
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475 | 30628cb1 | Mitsyanko Igor | } |
476 | 30628cb1 | Mitsyanko Igor | |
477 | 30628cb1 | Mitsyanko Igor | static int get_pixel_ifb(const uint8_t *s, rgba *p) |
478 | 30628cb1 | Mitsyanko Igor | { |
479 | 30628cb1 | Mitsyanko Igor | p->r = *(uint8_t *)s++; |
480 | 30628cb1 | Mitsyanko Igor | p->g = *(uint8_t *)s++; |
481 | 30628cb1 | Mitsyanko Igor | p->b = *(uint8_t *)s++; |
482 | 30628cb1 | Mitsyanko Igor | p->a = (*(uint32_t *)s) & 0x00FFFFFF;
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483 | 30628cb1 | Mitsyanko Igor | return RGBA_SIZE;
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484 | 30628cb1 | Mitsyanko Igor | } |
485 | 30628cb1 | Mitsyanko Igor | |
486 | 30628cb1 | Mitsyanko Igor | static pixel_to_rgb_func *palette_data_format[8] = { |
487 | 30628cb1 | Mitsyanko Igor | [0] = pixel_565_to_rgb,
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488 | 30628cb1 | Mitsyanko Igor | [1] = pixel_a555_to_rgb,
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489 | 30628cb1 | Mitsyanko Igor | [2] = pixel_666_to_rgb,
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490 | 30628cb1 | Mitsyanko Igor | [3] = pixel_a665_to_rgb,
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491 | 30628cb1 | Mitsyanko Igor | [4] = pixel_a666_to_rgb,
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492 | 30628cb1 | Mitsyanko Igor | [5] = pixel_888_to_rgb,
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493 | 30628cb1 | Mitsyanko Igor | [6] = pixel_a888_to_rgb,
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494 | 30628cb1 | Mitsyanko Igor | [7] = pixel_8888_to_rgb
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495 | 30628cb1 | Mitsyanko Igor | }; |
496 | 30628cb1 | Mitsyanko Igor | |
497 | 30628cb1 | Mitsyanko Igor | /* Returns Index in palette data formats table for given window number WINDOW */
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498 | 30628cb1 | Mitsyanko Igor | static uint32_t
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499 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_palette_format(Exynos4210fimdState *s, int window)
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500 | 30628cb1 | Mitsyanko Igor | { |
501 | 30628cb1 | Mitsyanko Igor | uint32_t ret; |
502 | 30628cb1 | Mitsyanko Igor | |
503 | 30628cb1 | Mitsyanko Igor | switch (window) {
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504 | 30628cb1 | Mitsyanko Igor | case 0: |
505 | 30628cb1 | Mitsyanko Igor | ret = (s->wpalcon[1] >> FIMD_WPAL_W0PAL_L_SHT) & FIMD_WPAL_W0PAL_L;
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506 | 30628cb1 | Mitsyanko Igor | if (ret != 7) { |
507 | 30628cb1 | Mitsyanko Igor | ret = 6 - ret;
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508 | 30628cb1 | Mitsyanko Igor | } |
509 | 30628cb1 | Mitsyanko Igor | break;
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510 | 30628cb1 | Mitsyanko Igor | case 1: |
511 | 30628cb1 | Mitsyanko Igor | ret = (s->wpalcon[1] >> FIMD_WPAL_W1PAL_L_SHT) & FIMD_WPAL_W1PAL_L;
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512 | 30628cb1 | Mitsyanko Igor | if (ret != 7) { |
513 | 30628cb1 | Mitsyanko Igor | ret = 6 - ret;
|
514 | 30628cb1 | Mitsyanko Igor | } |
515 | 30628cb1 | Mitsyanko Igor | break;
|
516 | 30628cb1 | Mitsyanko Igor | case 2: |
517 | 30628cb1 | Mitsyanko Igor | ret = ((s->wpalcon[0] >> FIMD_WPAL_W2PAL_H_SHT) & FIMD_WPAL_W2PAL_H) |
|
518 | 30628cb1 | Mitsyanko Igor | ((s->wpalcon[1] >> FIMD_WPAL_W2PAL_L_SHT) & FIMD_WPAL_W2PAL_L);
|
519 | 30628cb1 | Mitsyanko Igor | break;
|
520 | 30628cb1 | Mitsyanko Igor | case 3: |
521 | 30628cb1 | Mitsyanko Igor | ret = ((s->wpalcon[0] >> FIMD_WPAL_W3PAL_H_SHT) & FIMD_WPAL_W3PAL_H) |
|
522 | 30628cb1 | Mitsyanko Igor | ((s->wpalcon[1] >> FIMD_WPAL_W3PAL_L_SHT) & FIMD_WPAL_W3PAL_L);
|
523 | 30628cb1 | Mitsyanko Igor | break;
|
524 | 30628cb1 | Mitsyanko Igor | case 4: |
525 | 30628cb1 | Mitsyanko Igor | ret = ((s->wpalcon[0] >> FIMD_WPAL_W4PAL_H_SHT) & FIMD_WPAL_W4PAL_H) |
|
526 | 30628cb1 | Mitsyanko Igor | ((s->wpalcon[1] >> FIMD_WPAL_W4PAL_L_SHT) & FIMD_WPAL_W4PAL_L);
|
527 | 30628cb1 | Mitsyanko Igor | break;
|
528 | 30628cb1 | Mitsyanko Igor | default:
|
529 | 30628cb1 | Mitsyanko Igor | hw_error("exynos4210.fimd: incorrect window number %d\n", window);
|
530 | 30628cb1 | Mitsyanko Igor | ret = 0;
|
531 | 30628cb1 | Mitsyanko Igor | break;
|
532 | 30628cb1 | Mitsyanko Igor | } |
533 | 30628cb1 | Mitsyanko Igor | return ret;
|
534 | 30628cb1 | Mitsyanko Igor | } |
535 | 30628cb1 | Mitsyanko Igor | |
536 | 30628cb1 | Mitsyanko Igor | #define FIMD_1_MINUS_COLOR(x) \
|
537 | 30628cb1 | Mitsyanko Igor | ((0xFF - ((x) & 0xFF)) | (0xFF00 - ((x) & 0xFF00)) | \ |
538 | 30628cb1 | Mitsyanko Igor | (0xFF0000 - ((x) & 0xFF0000))) |
539 | 30628cb1 | Mitsyanko Igor | #define EXTEND_LOWER_HALFBYTE(x) (((x) & 0xF0F0F) | (((x) << 4) & 0xF0F0F0)) |
540 | 30628cb1 | Mitsyanko Igor | #define EXTEND_UPPER_HALFBYTE(x) (((x) & 0xF0F0F0) | (((x) >> 4) & 0xF0F0F)) |
541 | 30628cb1 | Mitsyanko Igor | |
542 | 30628cb1 | Mitsyanko Igor | /* Multiply three lower bytes of two 32-bit words with each other.
|
543 | 30628cb1 | Mitsyanko Igor | * Each byte with values 0-255 is considered as a number with possible values
|
544 | 30628cb1 | Mitsyanko Igor | * in a range [0 - 1] */
|
545 | 30628cb1 | Mitsyanko Igor | static inline uint32_t fimd_mult_each_byte(uint32_t a, uint32_t b) |
546 | 30628cb1 | Mitsyanko Igor | { |
547 | 30628cb1 | Mitsyanko Igor | uint32_t tmp; |
548 | 30628cb1 | Mitsyanko Igor | uint32_t ret; |
549 | 30628cb1 | Mitsyanko Igor | |
550 | 30628cb1 | Mitsyanko Igor | ret = ((tmp = (((a & 0xFF) * (b & 0xFF)) / 0xFF)) > 0xFF) ? 0xFF : tmp; |
551 | 30628cb1 | Mitsyanko Igor | ret |= ((tmp = ((((a >> 8) & 0xFF) * ((b >> 8) & 0xFF)) / 0xFF)) > 0xFF) ? |
552 | 30628cb1 | Mitsyanko Igor | 0xFF00 : tmp << 8; |
553 | 30628cb1 | Mitsyanko Igor | ret |= ((tmp = ((((a >> 16) & 0xFF) * ((b >> 16) & 0xFF)) / 0xFF)) > 0xFF) ? |
554 | 30628cb1 | Mitsyanko Igor | 0xFF0000 : tmp << 16; |
555 | 30628cb1 | Mitsyanko Igor | return ret;
|
556 | 30628cb1 | Mitsyanko Igor | } |
557 | 30628cb1 | Mitsyanko Igor | |
558 | 30628cb1 | Mitsyanko Igor | /* For each corresponding bytes of two 32-bit words: (a*b + c*d)
|
559 | 30628cb1 | Mitsyanko Igor | * Byte values 0-255 are mapped to a range [0 .. 1] */
|
560 | 30628cb1 | Mitsyanko Igor | static inline uint32_t |
561 | 30628cb1 | Mitsyanko Igor | fimd_mult_and_sum_each_byte(uint32_t a, uint32_t b, uint32_t c, uint32_t d) |
562 | 30628cb1 | Mitsyanko Igor | { |
563 | 30628cb1 | Mitsyanko Igor | uint32_t tmp; |
564 | 30628cb1 | Mitsyanko Igor | uint32_t ret; |
565 | 30628cb1 | Mitsyanko Igor | |
566 | 30628cb1 | Mitsyanko Igor | ret = ((tmp = (((a & 0xFF) * (b & 0xFF) + (c & 0xFF) * (d & 0xFF)) / 0xFF)) |
567 | 30628cb1 | Mitsyanko Igor | > 0xFF) ? 0xFF : tmp; |
568 | 30628cb1 | Mitsyanko Igor | ret |= ((tmp = ((((a >> 8) & 0xFF) * ((b >> 8) & 0xFF) + ((c >> 8) & 0xFF) * |
569 | 30628cb1 | Mitsyanko Igor | ((d >> 8) & 0xFF)) / 0xFF)) > 0xFF) ? 0xFF00 : tmp << 8; |
570 | 30628cb1 | Mitsyanko Igor | ret |= ((tmp = ((((a >> 16) & 0xFF) * ((b >> 16) & 0xFF) + |
571 | 30628cb1 | Mitsyanko Igor | ((c >> 16) & 0xFF) * ((d >> 16) & 0xFF)) / 0xFF)) > 0xFF) ? |
572 | 30628cb1 | Mitsyanko Igor | 0xFF0000 : tmp << 16; |
573 | 30628cb1 | Mitsyanko Igor | return ret;
|
574 | 30628cb1 | Mitsyanko Igor | } |
575 | 30628cb1 | Mitsyanko Igor | |
576 | 30628cb1 | Mitsyanko Igor | /* These routines cover all possible sources of window's transparent factor
|
577 | 30628cb1 | Mitsyanko Igor | * used in blending equation. Choice of routine is affected by WPALCON
|
578 | 30628cb1 | Mitsyanko Igor | * registers, BLENDCON register and window's WINCON register */
|
579 | 30628cb1 | Mitsyanko Igor | |
580 | 30628cb1 | Mitsyanko Igor | static uint32_t fimd_get_alpha_pix(Exynos4210fimdWindow *w, uint32_t pix_a)
|
581 | 30628cb1 | Mitsyanko Igor | { |
582 | 30628cb1 | Mitsyanko Igor | return pix_a;
|
583 | 30628cb1 | Mitsyanko Igor | } |
584 | 30628cb1 | Mitsyanko Igor | |
585 | 30628cb1 | Mitsyanko Igor | static uint32_t
|
586 | 30628cb1 | Mitsyanko Igor | fimd_get_alpha_pix_extlow(Exynos4210fimdWindow *w, uint32_t pix_a) |
587 | 30628cb1 | Mitsyanko Igor | { |
588 | 30628cb1 | Mitsyanko Igor | return EXTEND_LOWER_HALFBYTE(pix_a);
|
589 | 30628cb1 | Mitsyanko Igor | } |
590 | 30628cb1 | Mitsyanko Igor | |
591 | 30628cb1 | Mitsyanko Igor | static uint32_t
|
592 | 30628cb1 | Mitsyanko Igor | fimd_get_alpha_pix_exthigh(Exynos4210fimdWindow *w, uint32_t pix_a) |
593 | 30628cb1 | Mitsyanko Igor | { |
594 | 30628cb1 | Mitsyanko Igor | return EXTEND_UPPER_HALFBYTE(pix_a);
|
595 | 30628cb1 | Mitsyanko Igor | } |
596 | 30628cb1 | Mitsyanko Igor | |
597 | 30628cb1 | Mitsyanko Igor | static uint32_t fimd_get_alpha_mult(Exynos4210fimdWindow *w, uint32_t pix_a)
|
598 | 30628cb1 | Mitsyanko Igor | { |
599 | 30628cb1 | Mitsyanko Igor | return fimd_mult_each_byte(pix_a, w->alpha_val[0]); |
600 | 30628cb1 | Mitsyanko Igor | } |
601 | 30628cb1 | Mitsyanko Igor | |
602 | 30628cb1 | Mitsyanko Igor | static uint32_t fimd_get_alpha_mult_ext(Exynos4210fimdWindow *w, uint32_t pix_a)
|
603 | 30628cb1 | Mitsyanko Igor | { |
604 | 30628cb1 | Mitsyanko Igor | return fimd_mult_each_byte(EXTEND_LOWER_HALFBYTE(pix_a),
|
605 | 30628cb1 | Mitsyanko Igor | EXTEND_UPPER_HALFBYTE(w->alpha_val[0]));
|
606 | 30628cb1 | Mitsyanko Igor | } |
607 | 30628cb1 | Mitsyanko Igor | |
608 | 30628cb1 | Mitsyanko Igor | static uint32_t fimd_get_alpha_aen(Exynos4210fimdWindow *w, uint32_t pix_a)
|
609 | 30628cb1 | Mitsyanko Igor | { |
610 | 30628cb1 | Mitsyanko Igor | return w->alpha_val[pix_a];
|
611 | 30628cb1 | Mitsyanko Igor | } |
612 | 30628cb1 | Mitsyanko Igor | |
613 | 30628cb1 | Mitsyanko Igor | static uint32_t fimd_get_alpha_aen_ext(Exynos4210fimdWindow *w, uint32_t pix_a)
|
614 | 30628cb1 | Mitsyanko Igor | { |
615 | 30628cb1 | Mitsyanko Igor | return EXTEND_UPPER_HALFBYTE(w->alpha_val[pix_a]);
|
616 | 30628cb1 | Mitsyanko Igor | } |
617 | 30628cb1 | Mitsyanko Igor | |
618 | 30628cb1 | Mitsyanko Igor | static uint32_t fimd_get_alpha_sel(Exynos4210fimdWindow *w, uint32_t pix_a)
|
619 | 30628cb1 | Mitsyanko Igor | { |
620 | 30628cb1 | Mitsyanko Igor | return w->alpha_val[(w->wincon & FIMD_WINCON_ALPHA_SEL) ? 1 : 0]; |
621 | 30628cb1 | Mitsyanko Igor | } |
622 | 30628cb1 | Mitsyanko Igor | |
623 | 30628cb1 | Mitsyanko Igor | static uint32_t fimd_get_alpha_sel_ext(Exynos4210fimdWindow *w, uint32_t pix_a)
|
624 | 30628cb1 | Mitsyanko Igor | { |
625 | 30628cb1 | Mitsyanko Igor | return EXTEND_UPPER_HALFBYTE(w->alpha_val[(w->wincon &
|
626 | 30628cb1 | Mitsyanko Igor | FIMD_WINCON_ALPHA_SEL) ? 1 : 0]); |
627 | 30628cb1 | Mitsyanko Igor | } |
628 | 30628cb1 | Mitsyanko Igor | |
629 | 30628cb1 | Mitsyanko Igor | /* Updates currently active alpha value get function for specified window */
|
630 | 30628cb1 | Mitsyanko Igor | static void fimd_update_get_alpha(Exynos4210fimdState *s, int win) |
631 | 30628cb1 | Mitsyanko Igor | { |
632 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdWindow *w = &s->window[win]; |
633 | 30628cb1 | Mitsyanko Igor | const bool alpha_is_8bit = s->blendcon & FIMD_ALPHA_8BIT; |
634 | 30628cb1 | Mitsyanko Igor | |
635 | 30628cb1 | Mitsyanko Igor | if (w->wincon & FIMD_WINCON_BLD_PIX) {
|
636 | 30628cb1 | Mitsyanko Igor | if ((w->wincon & FIMD_WINCON_ALPHA_SEL) && WIN_BPP_MODE_WITH_ALPHA(w)) {
|
637 | 30628cb1 | Mitsyanko Igor | /* In this case, alpha component contains meaningful value */
|
638 | 30628cb1 | Mitsyanko Igor | if (w->wincon & FIMD_WINCON_ALPHA_MUL) {
|
639 | 30628cb1 | Mitsyanko Igor | w->get_alpha = alpha_is_8bit ? |
640 | 30628cb1 | Mitsyanko Igor | fimd_get_alpha_mult : fimd_get_alpha_mult_ext; |
641 | 30628cb1 | Mitsyanko Igor | } else {
|
642 | 30628cb1 | Mitsyanko Igor | w->get_alpha = alpha_is_8bit ? |
643 | 30628cb1 | Mitsyanko Igor | fimd_get_alpha_pix : fimd_get_alpha_pix_extlow; |
644 | 30628cb1 | Mitsyanko Igor | } |
645 | 30628cb1 | Mitsyanko Igor | } else {
|
646 | 30628cb1 | Mitsyanko Igor | if (IS_PALETTIZED_MODE(w) &&
|
647 | 30628cb1 | Mitsyanko Igor | PAL_MODE_WITH_ALPHA(exynos4210_fimd_palette_format(s, win))) { |
648 | 30628cb1 | Mitsyanko Igor | /* Alpha component has 8-bit numeric value */
|
649 | 30628cb1 | Mitsyanko Igor | w->get_alpha = alpha_is_8bit ? |
650 | 30628cb1 | Mitsyanko Igor | fimd_get_alpha_pix : fimd_get_alpha_pix_exthigh; |
651 | 30628cb1 | Mitsyanko Igor | } else {
|
652 | 30628cb1 | Mitsyanko Igor | /* Alpha has only two possible values (AEN) */
|
653 | 30628cb1 | Mitsyanko Igor | w->get_alpha = alpha_is_8bit ? |
654 | 30628cb1 | Mitsyanko Igor | fimd_get_alpha_aen : fimd_get_alpha_aen_ext; |
655 | 30628cb1 | Mitsyanko Igor | } |
656 | 30628cb1 | Mitsyanko Igor | } |
657 | 30628cb1 | Mitsyanko Igor | } else {
|
658 | 30628cb1 | Mitsyanko Igor | w->get_alpha = alpha_is_8bit ? fimd_get_alpha_sel : |
659 | 30628cb1 | Mitsyanko Igor | fimd_get_alpha_sel_ext; |
660 | 30628cb1 | Mitsyanko Igor | } |
661 | 30628cb1 | Mitsyanko Igor | } |
662 | 30628cb1 | Mitsyanko Igor | |
663 | 30628cb1 | Mitsyanko Igor | /* Blends current window's (w) pixel (foreground pixel *ret) with background
|
664 | 30628cb1 | Mitsyanko Igor | * window (w_blend) pixel p_bg according to formula:
|
665 | 30628cb1 | Mitsyanko Igor | * NEW_COLOR = a_coef x FG_PIXEL_COLOR + b_coef x BG_PIXEL_COLOR
|
666 | 30628cb1 | Mitsyanko Igor | * NEW_ALPHA = p_coef x FG_ALPHA + q_coef x BG_ALPHA
|
667 | 30628cb1 | Mitsyanko Igor | */
|
668 | 30628cb1 | Mitsyanko Igor | static void |
669 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_blend_pixel(Exynos4210fimdWindow *w, rgba p_bg, rgba *ret) |
670 | 30628cb1 | Mitsyanko Igor | { |
671 | 30628cb1 | Mitsyanko Igor | rgba p_fg = *ret; |
672 | 30628cb1 | Mitsyanko Igor | uint32_t bg_color = ((p_bg.r & 0xFF) << 16) | ((p_bg.g & 0xFF) << 8) | |
673 | 30628cb1 | Mitsyanko Igor | (p_bg.b & 0xFF);
|
674 | 30628cb1 | Mitsyanko Igor | uint32_t fg_color = ((p_fg.r & 0xFF) << 16) | ((p_fg.g & 0xFF) << 8) | |
675 | 30628cb1 | Mitsyanko Igor | (p_fg.b & 0xFF);
|
676 | 30628cb1 | Mitsyanko Igor | uint32_t alpha_fg = p_fg.a; |
677 | 30628cb1 | Mitsyanko Igor | int i;
|
678 | 30628cb1 | Mitsyanko Igor | /* It is possible that blending equation parameters a and b do not
|
679 | 30628cb1 | Mitsyanko Igor | * depend on window BLENEQ register. Account for this with first_coef */
|
680 | 30628cb1 | Mitsyanko Igor | enum { A_COEF = 0, B_COEF = 1, P_COEF = 2, Q_COEF = 3, COEF_NUM = 4}; |
681 | 30628cb1 | Mitsyanko Igor | uint32_t first_coef = A_COEF; |
682 | 30628cb1 | Mitsyanko Igor | uint32_t blend_param[COEF_NUM]; |
683 | 30628cb1 | Mitsyanko Igor | |
684 | 30628cb1 | Mitsyanko Igor | if (w->keycon[0] & FIMD_WKEYCON0_KEYEN) { |
685 | 30628cb1 | Mitsyanko Igor | uint32_t colorkey = (w->keycon[1] &
|
686 | 30628cb1 | Mitsyanko Igor | ~(w->keycon[0] & FIMD_WKEYCON0_COMPKEY)) & FIMD_WKEYCON0_COMPKEY;
|
687 | 30628cb1 | Mitsyanko Igor | |
688 | 30628cb1 | Mitsyanko Igor | if ((w->keycon[0] & FIMD_WKEYCON0_DIRCON) && |
689 | 30628cb1 | Mitsyanko Igor | (bg_color & ~(w->keycon[0] & FIMD_WKEYCON0_COMPKEY)) == colorkey) {
|
690 | 30628cb1 | Mitsyanko Igor | /* Foreground pixel is displayed */
|
691 | 30628cb1 | Mitsyanko Igor | if (w->keycon[0] & FIMD_WKEYCON0_KEYBLEN) { |
692 | 30628cb1 | Mitsyanko Igor | alpha_fg = w->keyalpha; |
693 | 30628cb1 | Mitsyanko Igor | blend_param[A_COEF] = alpha_fg; |
694 | 30628cb1 | Mitsyanko Igor | blend_param[B_COEF] = FIMD_1_MINUS_COLOR(alpha_fg); |
695 | 30628cb1 | Mitsyanko Igor | } else {
|
696 | 30628cb1 | Mitsyanko Igor | alpha_fg = 0;
|
697 | 30628cb1 | Mitsyanko Igor | blend_param[A_COEF] = 0xFFFFFF;
|
698 | 30628cb1 | Mitsyanko Igor | blend_param[B_COEF] = 0x0;
|
699 | 30628cb1 | Mitsyanko Igor | } |
700 | 30628cb1 | Mitsyanko Igor | first_coef = P_COEF; |
701 | 30628cb1 | Mitsyanko Igor | } else if ((w->keycon[0] & FIMD_WKEYCON0_DIRCON) == 0 && |
702 | 30628cb1 | Mitsyanko Igor | (fg_color & ~(w->keycon[0] & FIMD_WKEYCON0_COMPKEY)) == colorkey) {
|
703 | 30628cb1 | Mitsyanko Igor | /* Background pixel is displayed */
|
704 | 30628cb1 | Mitsyanko Igor | if (w->keycon[0] & FIMD_WKEYCON0_KEYBLEN) { |
705 | 30628cb1 | Mitsyanko Igor | alpha_fg = w->keyalpha; |
706 | 30628cb1 | Mitsyanko Igor | blend_param[A_COEF] = alpha_fg; |
707 | 30628cb1 | Mitsyanko Igor | blend_param[B_COEF] = FIMD_1_MINUS_COLOR(alpha_fg); |
708 | 30628cb1 | Mitsyanko Igor | } else {
|
709 | 30628cb1 | Mitsyanko Igor | alpha_fg = 0;
|
710 | 30628cb1 | Mitsyanko Igor | blend_param[A_COEF] = 0x0;
|
711 | 30628cb1 | Mitsyanko Igor | blend_param[B_COEF] = 0xFFFFFF;
|
712 | 30628cb1 | Mitsyanko Igor | } |
713 | 30628cb1 | Mitsyanko Igor | first_coef = P_COEF; |
714 | 30628cb1 | Mitsyanko Igor | } |
715 | 30628cb1 | Mitsyanko Igor | } |
716 | 30628cb1 | Mitsyanko Igor | |
717 | 30628cb1 | Mitsyanko Igor | for (i = first_coef; i < COEF_NUM; i++) {
|
718 | 30628cb1 | Mitsyanko Igor | switch ((w->blendeq >> i * 6) & FIMD_BLENDEQ_COEF_MASK) { |
719 | 30628cb1 | Mitsyanko Igor | case 0: |
720 | 30628cb1 | Mitsyanko Igor | blend_param[i] = 0;
|
721 | 30628cb1 | Mitsyanko Igor | break;
|
722 | 30628cb1 | Mitsyanko Igor | case 1: |
723 | 30628cb1 | Mitsyanko Igor | blend_param[i] = 0xFFFFFF;
|
724 | 30628cb1 | Mitsyanko Igor | break;
|
725 | 30628cb1 | Mitsyanko Igor | case 2: |
726 | 30628cb1 | Mitsyanko Igor | blend_param[i] = alpha_fg; |
727 | 30628cb1 | Mitsyanko Igor | break;
|
728 | 30628cb1 | Mitsyanko Igor | case 3: |
729 | 30628cb1 | Mitsyanko Igor | blend_param[i] = FIMD_1_MINUS_COLOR(alpha_fg); |
730 | 30628cb1 | Mitsyanko Igor | break;
|
731 | 30628cb1 | Mitsyanko Igor | case 4: |
732 | 30628cb1 | Mitsyanko Igor | blend_param[i] = p_bg.a; |
733 | 30628cb1 | Mitsyanko Igor | break;
|
734 | 30628cb1 | Mitsyanko Igor | case 5: |
735 | 30628cb1 | Mitsyanko Igor | blend_param[i] = FIMD_1_MINUS_COLOR(p_bg.a); |
736 | 30628cb1 | Mitsyanko Igor | break;
|
737 | 30628cb1 | Mitsyanko Igor | case 6: |
738 | 30628cb1 | Mitsyanko Igor | blend_param[i] = w->alpha_val[0];
|
739 | 30628cb1 | Mitsyanko Igor | break;
|
740 | 30628cb1 | Mitsyanko Igor | case 10: |
741 | 30628cb1 | Mitsyanko Igor | blend_param[i] = fg_color; |
742 | 30628cb1 | Mitsyanko Igor | break;
|
743 | 30628cb1 | Mitsyanko Igor | case 11: |
744 | 30628cb1 | Mitsyanko Igor | blend_param[i] = FIMD_1_MINUS_COLOR(fg_color); |
745 | 30628cb1 | Mitsyanko Igor | break;
|
746 | 30628cb1 | Mitsyanko Igor | case 12: |
747 | 30628cb1 | Mitsyanko Igor | blend_param[i] = bg_color; |
748 | 30628cb1 | Mitsyanko Igor | break;
|
749 | 30628cb1 | Mitsyanko Igor | case 13: |
750 | 30628cb1 | Mitsyanko Igor | blend_param[i] = FIMD_1_MINUS_COLOR(bg_color); |
751 | 30628cb1 | Mitsyanko Igor | break;
|
752 | 30628cb1 | Mitsyanko Igor | default:
|
753 | 30628cb1 | Mitsyanko Igor | hw_error("exynos4210.fimd: blend equation coef illegal value\n");
|
754 | 30628cb1 | Mitsyanko Igor | break;
|
755 | 30628cb1 | Mitsyanko Igor | } |
756 | 30628cb1 | Mitsyanko Igor | } |
757 | 30628cb1 | Mitsyanko Igor | |
758 | 30628cb1 | Mitsyanko Igor | fg_color = fimd_mult_and_sum_each_byte(bg_color, blend_param[B_COEF], |
759 | 30628cb1 | Mitsyanko Igor | fg_color, blend_param[A_COEF]); |
760 | 30628cb1 | Mitsyanko Igor | ret->b = fg_color & 0xFF;
|
761 | 30628cb1 | Mitsyanko Igor | fg_color >>= 8;
|
762 | 30628cb1 | Mitsyanko Igor | ret->g = fg_color & 0xFF;
|
763 | 30628cb1 | Mitsyanko Igor | fg_color >>= 8;
|
764 | 30628cb1 | Mitsyanko Igor | ret->r = fg_color & 0xFF;
|
765 | 30628cb1 | Mitsyanko Igor | ret->a = fimd_mult_and_sum_each_byte(alpha_fg, blend_param[P_COEF], |
766 | 30628cb1 | Mitsyanko Igor | p_bg.a, blend_param[Q_COEF]); |
767 | 30628cb1 | Mitsyanko Igor | } |
768 | 30628cb1 | Mitsyanko Igor | |
769 | 30628cb1 | Mitsyanko Igor | /* These routines read data from video frame buffer in system RAM, convert
|
770 | 30628cb1 | Mitsyanko Igor | * this data to display controller internal representation, if necessary,
|
771 | 30628cb1 | Mitsyanko Igor | * perform pixel blending with data, currently presented in internal buffer.
|
772 | 30628cb1 | Mitsyanko Igor | * Result is stored in display controller internal frame buffer. */
|
773 | 30628cb1 | Mitsyanko Igor | |
774 | 30628cb1 | Mitsyanko Igor | /* Draw line with index in palette table in RAM frame buffer data */
|
775 | 30628cb1 | Mitsyanko Igor | #define DEF_DRAW_LINE_PALETTE(N) \
|
776 | 30628cb1 | Mitsyanko Igor | static void glue(draw_line_palette_, N)(Exynos4210fimdWindow *w, uint8_t *src, \ |
777 | 30628cb1 | Mitsyanko Igor | uint8_t *dst, bool blend) \
|
778 | 30628cb1 | Mitsyanko Igor | { \ |
779 | 30628cb1 | Mitsyanko Igor | int width = w->rightbot_x - w->lefttop_x + 1; \ |
780 | 30628cb1 | Mitsyanko Igor | uint8_t *ifb = dst; \ |
781 | 30628cb1 | Mitsyanko Igor | uint8_t swap = (w->wincon & FIMD_WINCON_SWAP) >> FIMD_WINCON_SWAP_SHIFT; \ |
782 | 30628cb1 | Mitsyanko Igor | uint64_t data; \ |
783 | 30628cb1 | Mitsyanko Igor | rgba p, p_old; \ |
784 | 30628cb1 | Mitsyanko Igor | int i; \
|
785 | 30628cb1 | Mitsyanko Igor | do { \
|
786 | 30628cb1 | Mitsyanko Igor | data = ldq_raw((void *)src); \
|
787 | 30628cb1 | Mitsyanko Igor | src += 8; \
|
788 | 30628cb1 | Mitsyanko Igor | fimd_swap_data(swap, &data); \ |
789 | 30628cb1 | Mitsyanko Igor | for (i = (64 / (N) - 1); i >= 0; i--) { \ |
790 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb(w->palette[(data >> ((N) * i)) & \ |
791 | 30628cb1 | Mitsyanko Igor | ((1ULL << (N)) - 1)], &p); \ |
792 | 30628cb1 | Mitsyanko Igor | p.a = w->get_alpha(w, p.a); \ |
793 | 30628cb1 | Mitsyanko Igor | if (blend) { \
|
794 | 30628cb1 | Mitsyanko Igor | ifb += get_pixel_ifb(ifb, &p_old); \ |
795 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_blend_pixel(w, p_old, &p); \ |
796 | 30628cb1 | Mitsyanko Igor | } \ |
797 | 30628cb1 | Mitsyanko Igor | dst += put_pixel_ifb(p, dst); \ |
798 | 30628cb1 | Mitsyanko Igor | } \ |
799 | 30628cb1 | Mitsyanko Igor | width -= (64 / (N)); \
|
800 | 30628cb1 | Mitsyanko Igor | } while (width > 0); \ |
801 | 30628cb1 | Mitsyanko Igor | } |
802 | 30628cb1 | Mitsyanko Igor | |
803 | 30628cb1 | Mitsyanko Igor | /* Draw line with direct color value in RAM frame buffer data */
|
804 | 30628cb1 | Mitsyanko Igor | #define DEF_DRAW_LINE_NOPALETTE(N) \
|
805 | 30628cb1 | Mitsyanko Igor | static void glue(draw_line_, N)(Exynos4210fimdWindow *w, uint8_t *src, \ |
806 | 30628cb1 | Mitsyanko Igor | uint8_t *dst, bool blend) \
|
807 | 30628cb1 | Mitsyanko Igor | { \ |
808 | 30628cb1 | Mitsyanko Igor | int width = w->rightbot_x - w->lefttop_x + 1; \ |
809 | 30628cb1 | Mitsyanko Igor | uint8_t *ifb = dst; \ |
810 | 30628cb1 | Mitsyanko Igor | uint8_t swap = (w->wincon & FIMD_WINCON_SWAP) >> FIMD_WINCON_SWAP_SHIFT; \ |
811 | 30628cb1 | Mitsyanko Igor | uint64_t data; \ |
812 | 30628cb1 | Mitsyanko Igor | rgba p, p_old; \ |
813 | 30628cb1 | Mitsyanko Igor | int i; \
|
814 | 30628cb1 | Mitsyanko Igor | do { \
|
815 | 30628cb1 | Mitsyanko Igor | data = ldq_raw((void *)src); \
|
816 | 30628cb1 | Mitsyanko Igor | src += 8; \
|
817 | 30628cb1 | Mitsyanko Igor | fimd_swap_data(swap, &data); \ |
818 | 30628cb1 | Mitsyanko Igor | for (i = (64 / (N) - 1); i >= 0; i--) { \ |
819 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb((data >> ((N) * i)) & ((1ULL << (N)) - 1), &p); \ |
820 | 30628cb1 | Mitsyanko Igor | p.a = w->get_alpha(w, p.a); \ |
821 | 30628cb1 | Mitsyanko Igor | if (blend) { \
|
822 | 30628cb1 | Mitsyanko Igor | ifb += get_pixel_ifb(ifb, &p_old); \ |
823 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_blend_pixel(w, p_old, &p); \ |
824 | 30628cb1 | Mitsyanko Igor | } \ |
825 | 30628cb1 | Mitsyanko Igor | dst += put_pixel_ifb(p, dst); \ |
826 | 30628cb1 | Mitsyanko Igor | } \ |
827 | 30628cb1 | Mitsyanko Igor | width -= (64 / (N)); \
|
828 | 30628cb1 | Mitsyanko Igor | } while (width > 0); \ |
829 | 30628cb1 | Mitsyanko Igor | } |
830 | 30628cb1 | Mitsyanko Igor | |
831 | 30628cb1 | Mitsyanko Igor | DEF_DRAW_LINE_PALETTE(1)
|
832 | 30628cb1 | Mitsyanko Igor | DEF_DRAW_LINE_PALETTE(2)
|
833 | 30628cb1 | Mitsyanko Igor | DEF_DRAW_LINE_PALETTE(4)
|
834 | 30628cb1 | Mitsyanko Igor | DEF_DRAW_LINE_PALETTE(8)
|
835 | 30628cb1 | Mitsyanko Igor | DEF_DRAW_LINE_NOPALETTE(8) /* 8bpp mode has palette and non-palette versions */ |
836 | 30628cb1 | Mitsyanko Igor | DEF_DRAW_LINE_NOPALETTE(16)
|
837 | 30628cb1 | Mitsyanko Igor | DEF_DRAW_LINE_NOPALETTE(32)
|
838 | 30628cb1 | Mitsyanko Igor | |
839 | 30628cb1 | Mitsyanko Igor | /* Special draw line routine for window color map case */
|
840 | 30628cb1 | Mitsyanko Igor | static void draw_line_mapcolor(Exynos4210fimdWindow *w, uint8_t *src, |
841 | 30628cb1 | Mitsyanko Igor | uint8_t *dst, bool blend)
|
842 | 30628cb1 | Mitsyanko Igor | { |
843 | 30628cb1 | Mitsyanko Igor | rgba p, p_old; |
844 | 30628cb1 | Mitsyanko Igor | uint8_t *ifb = dst; |
845 | 30628cb1 | Mitsyanko Igor | int width = w->rightbot_x - w->lefttop_x + 1; |
846 | 30628cb1 | Mitsyanko Igor | uint32_t map_color = w->winmap & FIMD_WINMAP_COLOR_MASK; |
847 | 30628cb1 | Mitsyanko Igor | |
848 | 30628cb1 | Mitsyanko Igor | do {
|
849 | 30628cb1 | Mitsyanko Igor | pixel_888_to_rgb(map_color, &p); |
850 | 30628cb1 | Mitsyanko Igor | p.a = w->get_alpha(w, p.a); |
851 | 30628cb1 | Mitsyanko Igor | if (blend) {
|
852 | 30628cb1 | Mitsyanko Igor | ifb += get_pixel_ifb(ifb, &p_old); |
853 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_blend_pixel(w, p_old, &p); |
854 | 30628cb1 | Mitsyanko Igor | } |
855 | 30628cb1 | Mitsyanko Igor | dst += put_pixel_ifb(p, dst); |
856 | 30628cb1 | Mitsyanko Igor | } while (--width);
|
857 | 30628cb1 | Mitsyanko Igor | } |
858 | 30628cb1 | Mitsyanko Igor | |
859 | 30628cb1 | Mitsyanko Igor | /* Write RGB to QEMU's GraphicConsole framebuffer */
|
860 | 30628cb1 | Mitsyanko Igor | |
861 | 30628cb1 | Mitsyanko Igor | static int put_to_qemufb_pixel8(const rgba p, uint8_t *d) |
862 | 30628cb1 | Mitsyanko Igor | { |
863 | 30628cb1 | Mitsyanko Igor | uint32_t pixel = rgb_to_pixel8(p.r, p.g, p.b); |
864 | 30628cb1 | Mitsyanko Igor | *(uint8_t *)d = pixel; |
865 | 30628cb1 | Mitsyanko Igor | return 1; |
866 | 30628cb1 | Mitsyanko Igor | } |
867 | 30628cb1 | Mitsyanko Igor | |
868 | 30628cb1 | Mitsyanko Igor | static int put_to_qemufb_pixel15(const rgba p, uint8_t *d) |
869 | 30628cb1 | Mitsyanko Igor | { |
870 | 30628cb1 | Mitsyanko Igor | uint32_t pixel = rgb_to_pixel15(p.r, p.g, p.b); |
871 | 30628cb1 | Mitsyanko Igor | *(uint16_t *)d = pixel; |
872 | 30628cb1 | Mitsyanko Igor | return 2; |
873 | 30628cb1 | Mitsyanko Igor | } |
874 | 30628cb1 | Mitsyanko Igor | |
875 | 30628cb1 | Mitsyanko Igor | static int put_to_qemufb_pixel16(const rgba p, uint8_t *d) |
876 | 30628cb1 | Mitsyanko Igor | { |
877 | 30628cb1 | Mitsyanko Igor | uint32_t pixel = rgb_to_pixel16(p.r, p.g, p.b); |
878 | 30628cb1 | Mitsyanko Igor | *(uint16_t *)d = pixel; |
879 | 30628cb1 | Mitsyanko Igor | return 2; |
880 | 30628cb1 | Mitsyanko Igor | } |
881 | 30628cb1 | Mitsyanko Igor | |
882 | 30628cb1 | Mitsyanko Igor | static int put_to_qemufb_pixel24(const rgba p, uint8_t *d) |
883 | 30628cb1 | Mitsyanko Igor | { |
884 | 30628cb1 | Mitsyanko Igor | uint32_t pixel = rgb_to_pixel24(p.r, p.g, p.b); |
885 | 30628cb1 | Mitsyanko Igor | *(uint8_t *)d++ = (pixel >> 0) & 0xFF; |
886 | 30628cb1 | Mitsyanko Igor | *(uint8_t *)d++ = (pixel >> 8) & 0xFF; |
887 | 30628cb1 | Mitsyanko Igor | *(uint8_t *)d++ = (pixel >> 16) & 0xFF; |
888 | 30628cb1 | Mitsyanko Igor | return 3; |
889 | 30628cb1 | Mitsyanko Igor | } |
890 | 30628cb1 | Mitsyanko Igor | |
891 | 30628cb1 | Mitsyanko Igor | static int put_to_qemufb_pixel32(const rgba p, uint8_t *d) |
892 | 30628cb1 | Mitsyanko Igor | { |
893 | 30628cb1 | Mitsyanko Igor | uint32_t pixel = rgb_to_pixel24(p.r, p.g, p.b); |
894 | 30628cb1 | Mitsyanko Igor | *(uint32_t *)d = pixel; |
895 | 30628cb1 | Mitsyanko Igor | return 4; |
896 | 30628cb1 | Mitsyanko Igor | } |
897 | 30628cb1 | Mitsyanko Igor | |
898 | 30628cb1 | Mitsyanko Igor | /* Routine to copy pixel from internal buffer to QEMU buffer */
|
899 | 30628cb1 | Mitsyanko Igor | static int (*put_pixel_toqemu)(const rgba p, uint8_t *pixel); |
900 | 30628cb1 | Mitsyanko Igor | static inline void fimd_update_putpix_qemu(int bpp) |
901 | 30628cb1 | Mitsyanko Igor | { |
902 | 30628cb1 | Mitsyanko Igor | switch (bpp) {
|
903 | 30628cb1 | Mitsyanko Igor | case 8: |
904 | 30628cb1 | Mitsyanko Igor | put_pixel_toqemu = put_to_qemufb_pixel8; |
905 | 30628cb1 | Mitsyanko Igor | break;
|
906 | 30628cb1 | Mitsyanko Igor | case 15: |
907 | 30628cb1 | Mitsyanko Igor | put_pixel_toqemu = put_to_qemufb_pixel15; |
908 | 30628cb1 | Mitsyanko Igor | break;
|
909 | 30628cb1 | Mitsyanko Igor | case 16: |
910 | 30628cb1 | Mitsyanko Igor | put_pixel_toqemu = put_to_qemufb_pixel16; |
911 | 30628cb1 | Mitsyanko Igor | break;
|
912 | 30628cb1 | Mitsyanko Igor | case 24: |
913 | 30628cb1 | Mitsyanko Igor | put_pixel_toqemu = put_to_qemufb_pixel24; |
914 | 30628cb1 | Mitsyanko Igor | break;
|
915 | 30628cb1 | Mitsyanko Igor | case 32: |
916 | 30628cb1 | Mitsyanko Igor | put_pixel_toqemu = put_to_qemufb_pixel32; |
917 | 30628cb1 | Mitsyanko Igor | break;
|
918 | 30628cb1 | Mitsyanko Igor | default:
|
919 | 30628cb1 | Mitsyanko Igor | hw_error("exynos4210.fimd: unsupported BPP (%d)", bpp);
|
920 | 30628cb1 | Mitsyanko Igor | break;
|
921 | 30628cb1 | Mitsyanko Igor | } |
922 | 30628cb1 | Mitsyanko Igor | } |
923 | 30628cb1 | Mitsyanko Igor | |
924 | 30628cb1 | Mitsyanko Igor | /* Routine to copy a line from internal frame buffer to QEMU display */
|
925 | 30628cb1 | Mitsyanko Igor | static void fimd_copy_line_toqemu(int width, uint8_t *src, uint8_t *dst) |
926 | 30628cb1 | Mitsyanko Igor | { |
927 | 30628cb1 | Mitsyanko Igor | rgba p; |
928 | 30628cb1 | Mitsyanko Igor | |
929 | 30628cb1 | Mitsyanko Igor | do {
|
930 | 30628cb1 | Mitsyanko Igor | src += get_pixel_ifb(src, &p); |
931 | 30628cb1 | Mitsyanko Igor | dst += put_pixel_toqemu(p, dst); |
932 | 30628cb1 | Mitsyanko Igor | } while (--width);
|
933 | 30628cb1 | Mitsyanko Igor | } |
934 | 30628cb1 | Mitsyanko Igor | |
935 | 30628cb1 | Mitsyanko Igor | /* Parse BPPMODE_F = WINCON1[5:2] bits */
|
936 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_update_win_bppmode(Exynos4210fimdState *s, int win) |
937 | 30628cb1 | Mitsyanko Igor | { |
938 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdWindow *w = &s->window[win]; |
939 | 30628cb1 | Mitsyanko Igor | |
940 | 30628cb1 | Mitsyanko Igor | if (w->winmap & FIMD_WINMAP_EN) {
|
941 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_mapcolor; |
942 | 30628cb1 | Mitsyanko Igor | return;
|
943 | 30628cb1 | Mitsyanko Igor | } |
944 | 30628cb1 | Mitsyanko Igor | |
945 | 30628cb1 | Mitsyanko Igor | switch (WIN_BPP_MODE(w)) {
|
946 | 30628cb1 | Mitsyanko Igor | case 0: |
947 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_palette_1; |
948 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = |
949 | 30628cb1 | Mitsyanko Igor | palette_data_format[exynos4210_fimd_palette_format(s, win)]; |
950 | 30628cb1 | Mitsyanko Igor | break;
|
951 | 30628cb1 | Mitsyanko Igor | case 1: |
952 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_palette_2; |
953 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = |
954 | 30628cb1 | Mitsyanko Igor | palette_data_format[exynos4210_fimd_palette_format(s, win)]; |
955 | 30628cb1 | Mitsyanko Igor | break;
|
956 | 30628cb1 | Mitsyanko Igor | case 2: |
957 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_palette_4; |
958 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = |
959 | 30628cb1 | Mitsyanko Igor | palette_data_format[exynos4210_fimd_palette_format(s, win)]; |
960 | 30628cb1 | Mitsyanko Igor | break;
|
961 | 30628cb1 | Mitsyanko Igor | case 3: |
962 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_palette_8; |
963 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = |
964 | 30628cb1 | Mitsyanko Igor | palette_data_format[exynos4210_fimd_palette_format(s, win)]; |
965 | 30628cb1 | Mitsyanko Igor | break;
|
966 | 30628cb1 | Mitsyanko Igor | case 4: |
967 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_8; |
968 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_a232_to_rgb; |
969 | 30628cb1 | Mitsyanko Igor | break;
|
970 | 30628cb1 | Mitsyanko Igor | case 5: |
971 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_16; |
972 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_565_to_rgb; |
973 | 30628cb1 | Mitsyanko Igor | break;
|
974 | 30628cb1 | Mitsyanko Igor | case 6: |
975 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_16; |
976 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_a555_to_rgb; |
977 | 30628cb1 | Mitsyanko Igor | break;
|
978 | 30628cb1 | Mitsyanko Igor | case 7: |
979 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_16; |
980 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_1555_to_rgb; |
981 | 30628cb1 | Mitsyanko Igor | break;
|
982 | 30628cb1 | Mitsyanko Igor | case 8: |
983 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_32; |
984 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_666_to_rgb; |
985 | 30628cb1 | Mitsyanko Igor | break;
|
986 | 30628cb1 | Mitsyanko Igor | case 9: |
987 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_32; |
988 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_a665_to_rgb; |
989 | 30628cb1 | Mitsyanko Igor | break;
|
990 | 30628cb1 | Mitsyanko Igor | case 10: |
991 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_32; |
992 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_a666_to_rgb; |
993 | 30628cb1 | Mitsyanko Igor | break;
|
994 | 30628cb1 | Mitsyanko Igor | case 11: |
995 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_32; |
996 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_888_to_rgb; |
997 | 30628cb1 | Mitsyanko Igor | break;
|
998 | 30628cb1 | Mitsyanko Igor | case 12: |
999 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_32; |
1000 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_a887_to_rgb; |
1001 | 30628cb1 | Mitsyanko Igor | break;
|
1002 | 30628cb1 | Mitsyanko Igor | case 13: |
1003 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_32; |
1004 | 30628cb1 | Mitsyanko Igor | if ((w->wincon & FIMD_WINCON_BLD_PIX) && (w->wincon &
|
1005 | 30628cb1 | Mitsyanko Igor | FIMD_WINCON_ALPHA_SEL)) { |
1006 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_8888_to_rgb; |
1007 | 30628cb1 | Mitsyanko Igor | } else {
|
1008 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_a888_to_rgb; |
1009 | 30628cb1 | Mitsyanko Igor | } |
1010 | 30628cb1 | Mitsyanko Igor | break;
|
1011 | 30628cb1 | Mitsyanko Igor | case 14: |
1012 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_16; |
1013 | 30628cb1 | Mitsyanko Igor | if ((w->wincon & FIMD_WINCON_BLD_PIX) && (w->wincon &
|
1014 | 30628cb1 | Mitsyanko Igor | FIMD_WINCON_ALPHA_SEL)) { |
1015 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_4444_to_rgb; |
1016 | 30628cb1 | Mitsyanko Igor | } else {
|
1017 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_a444_to_rgb; |
1018 | 30628cb1 | Mitsyanko Igor | } |
1019 | 30628cb1 | Mitsyanko Igor | break;
|
1020 | 30628cb1 | Mitsyanko Igor | case 15: |
1021 | 30628cb1 | Mitsyanko Igor | w->draw_line = draw_line_16; |
1022 | 30628cb1 | Mitsyanko Igor | w->pixel_to_rgb = pixel_555_to_rgb; |
1023 | 30628cb1 | Mitsyanko Igor | break;
|
1024 | 30628cb1 | Mitsyanko Igor | } |
1025 | 30628cb1 | Mitsyanko Igor | } |
1026 | 30628cb1 | Mitsyanko Igor | |
1027 | 30628cb1 | Mitsyanko Igor | #if EXYNOS4210_FIMD_MODE_TRACE > 0 |
1028 | 30628cb1 | Mitsyanko Igor | static const char *exynos4210_fimd_get_bppmode(int mode_code) |
1029 | 30628cb1 | Mitsyanko Igor | { |
1030 | 30628cb1 | Mitsyanko Igor | switch (mode_code) {
|
1031 | 30628cb1 | Mitsyanko Igor | case 0: |
1032 | 30628cb1 | Mitsyanko Igor | return "1 bpp"; |
1033 | 30628cb1 | Mitsyanko Igor | case 1: |
1034 | 30628cb1 | Mitsyanko Igor | return "2 bpp"; |
1035 | 30628cb1 | Mitsyanko Igor | case 2: |
1036 | 30628cb1 | Mitsyanko Igor | return "4 bpp"; |
1037 | 30628cb1 | Mitsyanko Igor | case 3: |
1038 | 30628cb1 | Mitsyanko Igor | return "8 bpp (palettized)"; |
1039 | 30628cb1 | Mitsyanko Igor | case 4: |
1040 | 30628cb1 | Mitsyanko Igor | return "8 bpp (non-palettized, A: 1-R:2-G:3-B:2)"; |
1041 | 30628cb1 | Mitsyanko Igor | case 5: |
1042 | 30628cb1 | Mitsyanko Igor | return "16 bpp (non-palettized, R:5-G:6-B:5)"; |
1043 | 30628cb1 | Mitsyanko Igor | case 6: |
1044 | 30628cb1 | Mitsyanko Igor | return "16 bpp (non-palettized, A:1-R:5-G:5-B:5)"; |
1045 | 30628cb1 | Mitsyanko Igor | case 7: |
1046 | 30628cb1 | Mitsyanko Igor | return "16 bpp (non-palettized, I :1-R:5-G:5-B:5)"; |
1047 | 30628cb1 | Mitsyanko Igor | case 8: |
1048 | 30628cb1 | Mitsyanko Igor | return "Unpacked 18 bpp (non-palettized, R:6-G:6-B:6)"; |
1049 | 30628cb1 | Mitsyanko Igor | case 9: |
1050 | 30628cb1 | Mitsyanko Igor | return "Unpacked 18bpp (non-palettized,A:1-R:6-G:6-B:5)"; |
1051 | 30628cb1 | Mitsyanko Igor | case 10: |
1052 | 30628cb1 | Mitsyanko Igor | return "Unpacked 19bpp (non-palettized,A:1-R:6-G:6-B:6)"; |
1053 | 30628cb1 | Mitsyanko Igor | case 11: |
1054 | 30628cb1 | Mitsyanko Igor | return "Unpacked 24 bpp (non-palettized R:8-G:8-B:8)"; |
1055 | 30628cb1 | Mitsyanko Igor | case 12: |
1056 | 30628cb1 | Mitsyanko Igor | return "Unpacked 24 bpp (non-palettized A:1-R:8-G:8-B:7)"; |
1057 | 30628cb1 | Mitsyanko Igor | case 13: |
1058 | 30628cb1 | Mitsyanko Igor | return "Unpacked 25 bpp (non-palettized A:1-R:8-G:8-B:8)"; |
1059 | 30628cb1 | Mitsyanko Igor | case 14: |
1060 | 30628cb1 | Mitsyanko Igor | return "Unpacked 13 bpp (non-palettized A:1-R:4-G:4-B:4)"; |
1061 | 30628cb1 | Mitsyanko Igor | case 15: |
1062 | 30628cb1 | Mitsyanko Igor | return "Unpacked 15 bpp (non-palettized R:5-G:5-B:5)"; |
1063 | 30628cb1 | Mitsyanko Igor | default:
|
1064 | 30628cb1 | Mitsyanko Igor | return "Non-existing bpp mode"; |
1065 | 30628cb1 | Mitsyanko Igor | } |
1066 | 30628cb1 | Mitsyanko Igor | } |
1067 | 30628cb1 | Mitsyanko Igor | |
1068 | 30628cb1 | Mitsyanko Igor | static inline void exynos4210_fimd_trace_bppmode(Exynos4210fimdState *s, |
1069 | 30628cb1 | Mitsyanko Igor | int win_num, uint32_t val)
|
1070 | 30628cb1 | Mitsyanko Igor | { |
1071 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdWindow *w = &s->window[win_num]; |
1072 | 30628cb1 | Mitsyanko Igor | |
1073 | 30628cb1 | Mitsyanko Igor | if (w->winmap & FIMD_WINMAP_EN) {
|
1074 | 30628cb1 | Mitsyanko Igor | printf("QEMU FIMD: Window %d is mapped with MAPCOLOR=0x%x\n",
|
1075 | 30628cb1 | Mitsyanko Igor | win_num, w->winmap & 0xFFFFFF);
|
1076 | 30628cb1 | Mitsyanko Igor | return;
|
1077 | 30628cb1 | Mitsyanko Igor | } |
1078 | 30628cb1 | Mitsyanko Igor | |
1079 | 30628cb1 | Mitsyanko Igor | if ((val != 0xFFFFFFFF) && ((w->wincon >> 2) & 0xF) == ((val >> 2) & 0xF)) { |
1080 | 30628cb1 | Mitsyanko Igor | return;
|
1081 | 30628cb1 | Mitsyanko Igor | } |
1082 | 30628cb1 | Mitsyanko Igor | printf("QEMU FIMD: Window %d BPP mode set to %s\n", win_num,
|
1083 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_get_bppmode((val >> 2) & 0xF)); |
1084 | 30628cb1 | Mitsyanko Igor | } |
1085 | 30628cb1 | Mitsyanko Igor | #else
|
1086 | 30628cb1 | Mitsyanko Igor | static inline void exynos4210_fimd_trace_bppmode(Exynos4210fimdState *s, |
1087 | 30628cb1 | Mitsyanko Igor | int win_num, uint32_t val)
|
1088 | 30628cb1 | Mitsyanko Igor | { |
1089 | 30628cb1 | Mitsyanko Igor | |
1090 | 30628cb1 | Mitsyanko Igor | } |
1091 | 30628cb1 | Mitsyanko Igor | #endif
|
1092 | 30628cb1 | Mitsyanko Igor | |
1093 | 30628cb1 | Mitsyanko Igor | static inline int fimd_get_buffer_id(Exynos4210fimdWindow *w) |
1094 | 30628cb1 | Mitsyanko Igor | { |
1095 | 30628cb1 | Mitsyanko Igor | switch (w->wincon & FIMD_WINCON_BUFSTATUS) {
|
1096 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_BUF0_STAT:
|
1097 | 30628cb1 | Mitsyanko Igor | return 0; |
1098 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_BUF1_STAT:
|
1099 | 30628cb1 | Mitsyanko Igor | return 1; |
1100 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_BUF2_STAT:
|
1101 | 30628cb1 | Mitsyanko Igor | return 2; |
1102 | 30628cb1 | Mitsyanko Igor | default:
|
1103 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("Non-existent buffer index\n");
|
1104 | 30628cb1 | Mitsyanko Igor | return 0; |
1105 | 30628cb1 | Mitsyanko Igor | } |
1106 | 30628cb1 | Mitsyanko Igor | } |
1107 | 30628cb1 | Mitsyanko Igor | |
1108 | 30628cb1 | Mitsyanko Igor | /* Updates specified window's MemorySection based on values of WINCON,
|
1109 | 30628cb1 | Mitsyanko Igor | * VIDOSDA, VIDOSDB, VIDWADDx and SHADOWCON registers */
|
1110 | 30628cb1 | Mitsyanko Igor | static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win) |
1111 | 30628cb1 | Mitsyanko Igor | { |
1112 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdWindow *w = &s->window[win]; |
1113 | 30628cb1 | Mitsyanko Igor | target_phys_addr_t fb_start_addr, fb_mapped_len; |
1114 | 30628cb1 | Mitsyanko Igor | |
1115 | 30628cb1 | Mitsyanko Igor | if (!s->enabled || !(w->wincon & FIMD_WINCON_ENWIN) ||
|
1116 | 30628cb1 | Mitsyanko Igor | FIMD_WINDOW_PROTECTED(s->shadowcon, win)) { |
1117 | 30628cb1 | Mitsyanko Igor | return;
|
1118 | 30628cb1 | Mitsyanko Igor | } |
1119 | 30628cb1 | Mitsyanko Igor | |
1120 | 30628cb1 | Mitsyanko Igor | if (w->host_fb_addr) {
|
1121 | 30628cb1 | Mitsyanko Igor | cpu_physical_memory_unmap(w->host_fb_addr, w->fb_len, 0, 0); |
1122 | 30628cb1 | Mitsyanko Igor | w->host_fb_addr = NULL;
|
1123 | 30628cb1 | Mitsyanko Igor | w->fb_len = 0;
|
1124 | 30628cb1 | Mitsyanko Igor | } |
1125 | 30628cb1 | Mitsyanko Igor | |
1126 | 30628cb1 | Mitsyanko Igor | fb_start_addr = w->buf_start[fimd_get_buffer_id(w)]; |
1127 | 30628cb1 | Mitsyanko Igor | /* Total number of bytes of virtual screen used by current window */
|
1128 | 30628cb1 | Mitsyanko Igor | w->fb_len = fb_mapped_len = (w->virtpage_width + w->virtpage_offsize) * |
1129 | 30628cb1 | Mitsyanko Igor | (w->rightbot_y - w->lefttop_y + 1);
|
1130 | 30628cb1 | Mitsyanko Igor | w->mem_section = memory_region_find(sysbus_address_space(&s->busdev), |
1131 | 30628cb1 | Mitsyanko Igor | fb_start_addr, w->fb_len); |
1132 | 30628cb1 | Mitsyanko Igor | assert(w->mem_section.mr); |
1133 | 30628cb1 | Mitsyanko Igor | assert(w->mem_section.offset_within_address_space == fb_start_addr); |
1134 | 30628cb1 | Mitsyanko Igor | DPRINT_TRACE("Window %u framebuffer changed: address=0x%08x, len=0x%x\n",
|
1135 | 30628cb1 | Mitsyanko Igor | win, fb_start_addr, w->fb_len); |
1136 | 30628cb1 | Mitsyanko Igor | |
1137 | 30628cb1 | Mitsyanko Igor | if (w->mem_section.size != w->fb_len ||
|
1138 | 30628cb1 | Mitsyanko Igor | !memory_region_is_ram(w->mem_section.mr)) { |
1139 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("Failed to find window %u framebuffer region\n", win);
|
1140 | 30628cb1 | Mitsyanko Igor | goto error_return;
|
1141 | 30628cb1 | Mitsyanko Igor | } |
1142 | 30628cb1 | Mitsyanko Igor | |
1143 | 30628cb1 | Mitsyanko Igor | w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len, 0);
|
1144 | 30628cb1 | Mitsyanko Igor | if (!w->host_fb_addr) {
|
1145 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("Failed to map window %u framebuffer\n", win);
|
1146 | 30628cb1 | Mitsyanko Igor | goto error_return;
|
1147 | 30628cb1 | Mitsyanko Igor | } |
1148 | 30628cb1 | Mitsyanko Igor | |
1149 | 30628cb1 | Mitsyanko Igor | if (fb_mapped_len != w->fb_len) {
|
1150 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("Window %u mapped framebuffer length is less then "
|
1151 | 30628cb1 | Mitsyanko Igor | "expected\n", win);
|
1152 | 30628cb1 | Mitsyanko Igor | cpu_physical_memory_unmap(w->host_fb_addr, fb_mapped_len, 0, 0); |
1153 | 30628cb1 | Mitsyanko Igor | goto error_return;
|
1154 | 30628cb1 | Mitsyanko Igor | } |
1155 | 30628cb1 | Mitsyanko Igor | return;
|
1156 | 30628cb1 | Mitsyanko Igor | |
1157 | 30628cb1 | Mitsyanko Igor | error_return:
|
1158 | 30628cb1 | Mitsyanko Igor | w->mem_section.mr = NULL;
|
1159 | 30628cb1 | Mitsyanko Igor | w->mem_section.size = 0;
|
1160 | 30628cb1 | Mitsyanko Igor | w->host_fb_addr = NULL;
|
1161 | 30628cb1 | Mitsyanko Igor | w->fb_len = 0;
|
1162 | 30628cb1 | Mitsyanko Igor | } |
1163 | 30628cb1 | Mitsyanko Igor | |
1164 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_enable(Exynos4210fimdState *s, bool enabled) |
1165 | 30628cb1 | Mitsyanko Igor | { |
1166 | 30628cb1 | Mitsyanko Igor | if (enabled && !s->enabled) {
|
1167 | 30628cb1 | Mitsyanko Igor | unsigned w;
|
1168 | 30628cb1 | Mitsyanko Igor | s->enabled = true;
|
1169 | 30628cb1 | Mitsyanko Igor | for (w = 0; w < NUM_OF_WINDOWS; w++) { |
1170 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1171 | 30628cb1 | Mitsyanko Igor | } |
1172 | 30628cb1 | Mitsyanko Igor | } |
1173 | 30628cb1 | Mitsyanko Igor | s->enabled = enabled; |
1174 | 30628cb1 | Mitsyanko Igor | DPRINT_TRACE("display controller %s\n", enabled ? "enabled" : "disabled"); |
1175 | 30628cb1 | Mitsyanko Igor | } |
1176 | 30628cb1 | Mitsyanko Igor | |
1177 | 30628cb1 | Mitsyanko Igor | static inline uint32_t unpack_upper_4(uint32_t x) |
1178 | 30628cb1 | Mitsyanko Igor | { |
1179 | 30628cb1 | Mitsyanko Igor | return ((x & 0xF00) << 12) | ((x & 0xF0) << 8) | ((x & 0xF) << 4); |
1180 | 30628cb1 | Mitsyanko Igor | } |
1181 | 30628cb1 | Mitsyanko Igor | |
1182 | 30628cb1 | Mitsyanko Igor | static inline uint32_t pack_upper_4(uint32_t x) |
1183 | 30628cb1 | Mitsyanko Igor | { |
1184 | 30628cb1 | Mitsyanko Igor | return (((x & 0xF00000) >> 12) | ((x & 0xF000) >> 8) | |
1185 | 30628cb1 | Mitsyanko Igor | ((x & 0xF0) >> 4)) & 0xFFF; |
1186 | 30628cb1 | Mitsyanko Igor | } |
1187 | 30628cb1 | Mitsyanko Igor | |
1188 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_update_irq(Exynos4210fimdState *s) |
1189 | 30628cb1 | Mitsyanko Igor | { |
1190 | 30628cb1 | Mitsyanko Igor | if (!(s->vidintcon[0] & FIMD_VIDINT_INTEN)) { |
1191 | 30628cb1 | Mitsyanko Igor | qemu_irq_lower(s->irq[0]);
|
1192 | 30628cb1 | Mitsyanko Igor | qemu_irq_lower(s->irq[1]);
|
1193 | 30628cb1 | Mitsyanko Igor | qemu_irq_lower(s->irq[2]);
|
1194 | 30628cb1 | Mitsyanko Igor | return;
|
1195 | 30628cb1 | Mitsyanko Igor | } |
1196 | 30628cb1 | Mitsyanko Igor | if ((s->vidintcon[0] & FIMD_VIDINT_INTFIFOEN) && |
1197 | 30628cb1 | Mitsyanko Igor | (s->vidintcon[1] & FIMD_VIDINT_INTFIFOPEND)) {
|
1198 | 30628cb1 | Mitsyanko Igor | qemu_irq_raise(s->irq[0]);
|
1199 | 30628cb1 | Mitsyanko Igor | } else {
|
1200 | 30628cb1 | Mitsyanko Igor | qemu_irq_lower(s->irq[0]);
|
1201 | 30628cb1 | Mitsyanko Igor | } |
1202 | 30628cb1 | Mitsyanko Igor | if ((s->vidintcon[0] & FIMD_VIDINT_INTFRMEN) && |
1203 | 30628cb1 | Mitsyanko Igor | (s->vidintcon[1] & FIMD_VIDINT_INTFRMPEND)) {
|
1204 | 30628cb1 | Mitsyanko Igor | qemu_irq_raise(s->irq[1]);
|
1205 | 30628cb1 | Mitsyanko Igor | } else {
|
1206 | 30628cb1 | Mitsyanko Igor | qemu_irq_lower(s->irq[1]);
|
1207 | 30628cb1 | Mitsyanko Igor | } |
1208 | 30628cb1 | Mitsyanko Igor | if ((s->vidintcon[0] & FIMD_VIDINT_I80IFDONE) && |
1209 | 30628cb1 | Mitsyanko Igor | (s->vidintcon[1] & FIMD_VIDINT_INTI80PEND)) {
|
1210 | 30628cb1 | Mitsyanko Igor | qemu_irq_raise(s->irq[2]);
|
1211 | 30628cb1 | Mitsyanko Igor | } else {
|
1212 | 30628cb1 | Mitsyanko Igor | qemu_irq_lower(s->irq[2]);
|
1213 | 30628cb1 | Mitsyanko Igor | } |
1214 | 30628cb1 | Mitsyanko Igor | } |
1215 | 30628cb1 | Mitsyanko Igor | |
1216 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_invalidate(void *opaque) |
1217 | 30628cb1 | Mitsyanko Igor | { |
1218 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdState *s = (Exynos4210fimdState *)opaque; |
1219 | 30628cb1 | Mitsyanko Igor | s->invalidate = true;
|
1220 | 30628cb1 | Mitsyanko Igor | } |
1221 | 30628cb1 | Mitsyanko Igor | |
1222 | 30628cb1 | Mitsyanko Igor | static void exynos4210_update_resolution(Exynos4210fimdState *s) |
1223 | 30628cb1 | Mitsyanko Igor | { |
1224 | 30628cb1 | Mitsyanko Igor | /* LCD resolution is stored in VIDEO TIME CONTROL REGISTER 2 */
|
1225 | 30628cb1 | Mitsyanko Igor | uint32_t width = ((s->vidtcon[2] >> FIMD_VIDTCON2_HOR_SHIFT) &
|
1226 | 30628cb1 | Mitsyanko Igor | FIMD_VIDTCON2_SIZE_MASK) + 1;
|
1227 | 30628cb1 | Mitsyanko Igor | uint32_t height = ((s->vidtcon[2] >> FIMD_VIDTCON2_VER_SHIFT) &
|
1228 | 30628cb1 | Mitsyanko Igor | FIMD_VIDTCON2_SIZE_MASK) + 1;
|
1229 | 30628cb1 | Mitsyanko Igor | |
1230 | 30628cb1 | Mitsyanko Igor | if (s->ifb == NULL || ds_get_width(s->console) != width || |
1231 | 30628cb1 | Mitsyanko Igor | ds_get_height(s->console) != height) { |
1232 | 30628cb1 | Mitsyanko Igor | DPRINT_L1("Resolution changed from %ux%u to %ux%u\n",
|
1233 | 30628cb1 | Mitsyanko Igor | ds_get_width(s->console), ds_get_height(s->console), width, height); |
1234 | 30628cb1 | Mitsyanko Igor | qemu_console_resize(s->console, width, height); |
1235 | 30628cb1 | Mitsyanko Igor | s->ifb = g_realloc(s->ifb, width * height * RGBA_SIZE + 1);
|
1236 | 30628cb1 | Mitsyanko Igor | memset(s->ifb, 0, width * height * RGBA_SIZE + 1); |
1237 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_invalidate(s); |
1238 | 30628cb1 | Mitsyanko Igor | } |
1239 | 30628cb1 | Mitsyanko Igor | } |
1240 | 30628cb1 | Mitsyanko Igor | |
1241 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_update(void *opaque) |
1242 | 30628cb1 | Mitsyanko Igor | { |
1243 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdState *s = (Exynos4210fimdState *)opaque; |
1244 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdWindow *w; |
1245 | 30628cb1 | Mitsyanko Igor | int i, line;
|
1246 | 30628cb1 | Mitsyanko Igor | target_phys_addr_t fb_line_addr, inc_size; |
1247 | 30628cb1 | Mitsyanko Igor | int scrn_height;
|
1248 | 30628cb1 | Mitsyanko Igor | int first_line = -1, last_line = -1, scrn_width; |
1249 | 30628cb1 | Mitsyanko Igor | bool blend = false; |
1250 | 30628cb1 | Mitsyanko Igor | uint8_t *host_fb_addr; |
1251 | 30628cb1 | Mitsyanko Igor | bool is_dirty = false; |
1252 | 30628cb1 | Mitsyanko Igor | const int global_width = (s->vidtcon[2] & FIMD_VIDTCON2_SIZE_MASK) + 1; |
1253 | 30628cb1 | Mitsyanko Igor | const int global_height = ((s->vidtcon[2] >> FIMD_VIDTCON2_VER_SHIFT) & |
1254 | 30628cb1 | Mitsyanko Igor | FIMD_VIDTCON2_SIZE_MASK) + 1;
|
1255 | 30628cb1 | Mitsyanko Igor | |
1256 | 30628cb1 | Mitsyanko Igor | if (!s || !s->console || !ds_get_bits_per_pixel(s->console) ||
|
1257 | 30628cb1 | Mitsyanko Igor | !s->enabled) { |
1258 | 30628cb1 | Mitsyanko Igor | return;
|
1259 | 30628cb1 | Mitsyanko Igor | } |
1260 | 30628cb1 | Mitsyanko Igor | exynos4210_update_resolution(s); |
1261 | 30628cb1 | Mitsyanko Igor | |
1262 | 30628cb1 | Mitsyanko Igor | for (i = 0; i < NUM_OF_WINDOWS; i++) { |
1263 | 30628cb1 | Mitsyanko Igor | w = &s->window[i]; |
1264 | 30628cb1 | Mitsyanko Igor | if ((w->wincon & FIMD_WINCON_ENWIN) && w->host_fb_addr) {
|
1265 | 30628cb1 | Mitsyanko Igor | scrn_height = w->rightbot_y - w->lefttop_y + 1;
|
1266 | 30628cb1 | Mitsyanko Igor | scrn_width = w->virtpage_width; |
1267 | 30628cb1 | Mitsyanko Igor | /* Total width of virtual screen page in bytes */
|
1268 | 30628cb1 | Mitsyanko Igor | inc_size = scrn_width + w->virtpage_offsize; |
1269 | 30628cb1 | Mitsyanko Igor | memory_region_sync_dirty_bitmap(w->mem_section.mr); |
1270 | 30628cb1 | Mitsyanko Igor | host_fb_addr = w->host_fb_addr; |
1271 | 30628cb1 | Mitsyanko Igor | fb_line_addr = w->mem_section.offset_within_region; |
1272 | 30628cb1 | Mitsyanko Igor | |
1273 | 30628cb1 | Mitsyanko Igor | for (line = 0; line < scrn_height; line++) { |
1274 | 30628cb1 | Mitsyanko Igor | is_dirty = memory_region_get_dirty(w->mem_section.mr, |
1275 | 30628cb1 | Mitsyanko Igor | fb_line_addr, scrn_width, DIRTY_MEMORY_VGA); |
1276 | 30628cb1 | Mitsyanko Igor | |
1277 | 30628cb1 | Mitsyanko Igor | if (s->invalidate || is_dirty) {
|
1278 | 30628cb1 | Mitsyanko Igor | if (first_line == -1) { |
1279 | 30628cb1 | Mitsyanko Igor | first_line = line; |
1280 | 30628cb1 | Mitsyanko Igor | } |
1281 | 30628cb1 | Mitsyanko Igor | last_line = line; |
1282 | 30628cb1 | Mitsyanko Igor | w->draw_line(w, host_fb_addr, s->ifb + |
1283 | 30628cb1 | Mitsyanko Igor | w->lefttop_x * RGBA_SIZE + (w->lefttop_y + line) * |
1284 | 30628cb1 | Mitsyanko Igor | global_width * RGBA_SIZE, blend); |
1285 | 30628cb1 | Mitsyanko Igor | } |
1286 | 30628cb1 | Mitsyanko Igor | host_fb_addr += inc_size; |
1287 | 30628cb1 | Mitsyanko Igor | fb_line_addr += inc_size; |
1288 | 30628cb1 | Mitsyanko Igor | is_dirty = false;
|
1289 | 30628cb1 | Mitsyanko Igor | } |
1290 | 30628cb1 | Mitsyanko Igor | memory_region_reset_dirty(w->mem_section.mr, |
1291 | 30628cb1 | Mitsyanko Igor | w->mem_section.offset_within_region, |
1292 | 30628cb1 | Mitsyanko Igor | w->fb_len, DIRTY_MEMORY_VGA); |
1293 | 30628cb1 | Mitsyanko Igor | blend = true;
|
1294 | 30628cb1 | Mitsyanko Igor | } |
1295 | 30628cb1 | Mitsyanko Igor | } |
1296 | 30628cb1 | Mitsyanko Igor | |
1297 | 30628cb1 | Mitsyanko Igor | /* Copy resulting image to QEMU_CONSOLE. */
|
1298 | 30628cb1 | Mitsyanko Igor | if (first_line >= 0) { |
1299 | 30628cb1 | Mitsyanko Igor | uint8_t *d; |
1300 | 30628cb1 | Mitsyanko Igor | int bpp;
|
1301 | 30628cb1 | Mitsyanko Igor | |
1302 | 30628cb1 | Mitsyanko Igor | bpp = ds_get_bits_per_pixel(s->console); |
1303 | 30628cb1 | Mitsyanko Igor | fimd_update_putpix_qemu(bpp); |
1304 | 30628cb1 | Mitsyanko Igor | bpp = (bpp + 1) >> 3; |
1305 | 30628cb1 | Mitsyanko Igor | d = ds_get_data(s->console); |
1306 | 30628cb1 | Mitsyanko Igor | for (line = first_line; line <= last_line; line++) {
|
1307 | 30628cb1 | Mitsyanko Igor | fimd_copy_line_toqemu(global_width, s->ifb + global_width * line * |
1308 | 30628cb1 | Mitsyanko Igor | RGBA_SIZE, d + global_width * line * bpp); |
1309 | 30628cb1 | Mitsyanko Igor | } |
1310 | 30628cb1 | Mitsyanko Igor | dpy_update(s->console, 0, 0, global_width, global_height); |
1311 | 30628cb1 | Mitsyanko Igor | } |
1312 | 30628cb1 | Mitsyanko Igor | s->invalidate = false;
|
1313 | 30628cb1 | Mitsyanko Igor | s->vidintcon[1] |= FIMD_VIDINT_INTFRMPEND;
|
1314 | 30628cb1 | Mitsyanko Igor | if ((s->vidcon[0] & FIMD_VIDCON0_ENVID_F) == 0) { |
1315 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_enable(s, false);
|
1316 | 30628cb1 | Mitsyanko Igor | } |
1317 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update_irq(s); |
1318 | 30628cb1 | Mitsyanko Igor | } |
1319 | 30628cb1 | Mitsyanko Igor | |
1320 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_reset(DeviceState *d) |
1321 | 30628cb1 | Mitsyanko Igor | { |
1322 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdState *s = DO_UPCAST(Exynos4210fimdState, busdev.qdev, d); |
1323 | 30628cb1 | Mitsyanko Igor | unsigned w;
|
1324 | 30628cb1 | Mitsyanko Igor | |
1325 | 30628cb1 | Mitsyanko Igor | DPRINT_TRACE("Display controller reset\n");
|
1326 | 30628cb1 | Mitsyanko Igor | /* Set all display controller registers to 0 */
|
1327 | 30628cb1 | Mitsyanko Igor | memset(&s->vidcon, 0, (uint8_t *)&s->window - (uint8_t *)&s->vidcon);
|
1328 | 30628cb1 | Mitsyanko Igor | for (w = 0; w < NUM_OF_WINDOWS; w++) { |
1329 | 30628cb1 | Mitsyanko Igor | memset(&s->window[w], 0, sizeof(Exynos4210fimdWindow)); |
1330 | 30628cb1 | Mitsyanko Igor | s->window[w].blendeq = 0xC2;
|
1331 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update_win_bppmode(s, w); |
1332 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_trace_bppmode(s, w, 0xFFFFFFFF);
|
1333 | 30628cb1 | Mitsyanko Igor | fimd_update_get_alpha(s, w); |
1334 | 30628cb1 | Mitsyanko Igor | } |
1335 | 30628cb1 | Mitsyanko Igor | |
1336 | 30628cb1 | Mitsyanko Igor | if (s->ifb != NULL) { |
1337 | 30628cb1 | Mitsyanko Igor | g_free(s->ifb); |
1338 | 30628cb1 | Mitsyanko Igor | } |
1339 | 30628cb1 | Mitsyanko Igor | s->ifb = NULL;
|
1340 | 30628cb1 | Mitsyanko Igor | |
1341 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_invalidate(s); |
1342 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_enable(s, false);
|
1343 | 30628cb1 | Mitsyanko Igor | /* Some registers have non-zero initial values */
|
1344 | 30628cb1 | Mitsyanko Igor | s->winchmap = 0x7D517D51;
|
1345 | 30628cb1 | Mitsyanko Igor | s->colorgaincon = 0x10040100;
|
1346 | 30628cb1 | Mitsyanko Igor | s->huecoef_cr[0] = s->huecoef_cr[3] = 0x01000100; |
1347 | 30628cb1 | Mitsyanko Igor | s->huecoef_cb[0] = s->huecoef_cb[3] = 0x01000100; |
1348 | 30628cb1 | Mitsyanko Igor | s->hueoffset = 0x01800080;
|
1349 | 30628cb1 | Mitsyanko Igor | } |
1350 | 30628cb1 | Mitsyanko Igor | |
1351 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_write(void *opaque, target_phys_addr_t offset, |
1352 | 30628cb1 | Mitsyanko Igor | uint64_t val, unsigned size)
|
1353 | 30628cb1 | Mitsyanko Igor | { |
1354 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdState *s = (Exynos4210fimdState *)opaque; |
1355 | 30628cb1 | Mitsyanko Igor | unsigned w, i;
|
1356 | 30628cb1 | Mitsyanko Igor | uint32_t old_value; |
1357 | 30628cb1 | Mitsyanko Igor | |
1358 | 30628cb1 | Mitsyanko Igor | DPRINT_L2("write offset 0x%08x, value=%llu(0x%08llx)\n", offset,
|
1359 | 30628cb1 | Mitsyanko Igor | (long long unsigned int)val, (long long unsigned int)val); |
1360 | 30628cb1 | Mitsyanko Igor | |
1361 | 30628cb1 | Mitsyanko Igor | switch (offset) {
|
1362 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDCON0:
|
1363 | 30628cb1 | Mitsyanko Igor | if ((val & FIMD_VIDCON0_ENVID_MASK) == FIMD_VIDCON0_ENVID_MASK) {
|
1364 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_enable(s, true);
|
1365 | 30628cb1 | Mitsyanko Igor | } else {
|
1366 | 30628cb1 | Mitsyanko Igor | if ((val & FIMD_VIDCON0_ENVID) == 0) { |
1367 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_enable(s, false);
|
1368 | 30628cb1 | Mitsyanko Igor | } |
1369 | 30628cb1 | Mitsyanko Igor | } |
1370 | 30628cb1 | Mitsyanko Igor | s->vidcon[0] = val;
|
1371 | 30628cb1 | Mitsyanko Igor | break;
|
1372 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDCON1:
|
1373 | 30628cb1 | Mitsyanko Igor | /* Leave read-only bits as is */
|
1374 | 30628cb1 | Mitsyanko Igor | val = (val & (~FIMD_VIDCON1_ROMASK)) | |
1375 | 30628cb1 | Mitsyanko Igor | (s->vidcon[1] & FIMD_VIDCON1_ROMASK);
|
1376 | 30628cb1 | Mitsyanko Igor | s->vidcon[1] = val;
|
1377 | 30628cb1 | Mitsyanko Igor | break;
|
1378 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDCON2 ... FIMD_VIDCON3:
|
1379 | 30628cb1 | Mitsyanko Igor | s->vidcon[(offset) >> 2] = val;
|
1380 | 30628cb1 | Mitsyanko Igor | break;
|
1381 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDTCON_START ... FIMD_VIDTCON_END:
|
1382 | 30628cb1 | Mitsyanko Igor | s->vidtcon[(offset - FIMD_VIDTCON_START) >> 2] = val;
|
1383 | 30628cb1 | Mitsyanko Igor | break;
|
1384 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_START ... FIMD_WINCON_END:
|
1385 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_WINCON_START) >> 2;
|
1386 | 30628cb1 | Mitsyanko Igor | /* Window's current buffer ID */
|
1387 | 30628cb1 | Mitsyanko Igor | i = fimd_get_buffer_id(&s->window[w]); |
1388 | 30628cb1 | Mitsyanko Igor | old_value = s->window[w].wincon; |
1389 | 30628cb1 | Mitsyanko Igor | val = (val & ~FIMD_WINCON_ROMASK) | |
1390 | 30628cb1 | Mitsyanko Igor | (s->window[w].wincon & FIMD_WINCON_ROMASK); |
1391 | 30628cb1 | Mitsyanko Igor | if (w == 0) { |
1392 | 30628cb1 | Mitsyanko Igor | /* Window 0 wincon ALPHA_MUL bit must always be 0 */
|
1393 | 30628cb1 | Mitsyanko Igor | val &= ~FIMD_WINCON_ALPHA_MUL; |
1394 | 30628cb1 | Mitsyanko Igor | } |
1395 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_trace_bppmode(s, w, val); |
1396 | 30628cb1 | Mitsyanko Igor | switch (val & FIMD_WINCON_BUFSELECT) {
|
1397 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_BUF0_SEL:
|
1398 | 30628cb1 | Mitsyanko Igor | val &= ~FIMD_WINCON_BUFSTATUS; |
1399 | 30628cb1 | Mitsyanko Igor | break;
|
1400 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_BUF1_SEL:
|
1401 | 30628cb1 | Mitsyanko Igor | val = (val & ~FIMD_WINCON_BUFSTAT_H) | FIMD_WINCON_BUFSTAT_L; |
1402 | 30628cb1 | Mitsyanko Igor | break;
|
1403 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_BUF2_SEL:
|
1404 | 30628cb1 | Mitsyanko Igor | if (val & FIMD_WINCON_BUFMODE) {
|
1405 | 30628cb1 | Mitsyanko Igor | val = (val & ~FIMD_WINCON_BUFSTAT_L) | FIMD_WINCON_BUFSTAT_H; |
1406 | 30628cb1 | Mitsyanko Igor | } |
1407 | 30628cb1 | Mitsyanko Igor | break;
|
1408 | 30628cb1 | Mitsyanko Igor | default:
|
1409 | 30628cb1 | Mitsyanko Igor | break;
|
1410 | 30628cb1 | Mitsyanko Igor | } |
1411 | 30628cb1 | Mitsyanko Igor | s->window[w].wincon = val; |
1412 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update_win_bppmode(s, w); |
1413 | 30628cb1 | Mitsyanko Igor | fimd_update_get_alpha(s, w); |
1414 | 30628cb1 | Mitsyanko Igor | if ((i != fimd_get_buffer_id(&s->window[w])) ||
|
1415 | 30628cb1 | Mitsyanko Igor | (!(old_value & FIMD_WINCON_ENWIN) && (s->window[w].wincon & |
1416 | 30628cb1 | Mitsyanko Igor | FIMD_WINCON_ENWIN))) { |
1417 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1418 | 30628cb1 | Mitsyanko Igor | } |
1419 | 30628cb1 | Mitsyanko Igor | break;
|
1420 | 30628cb1 | Mitsyanko Igor | case FIMD_SHADOWCON:
|
1421 | 30628cb1 | Mitsyanko Igor | old_value = s->shadowcon; |
1422 | 30628cb1 | Mitsyanko Igor | s->shadowcon = val; |
1423 | 30628cb1 | Mitsyanko Igor | for (w = 0; w < NUM_OF_WINDOWS; w++) { |
1424 | 30628cb1 | Mitsyanko Igor | if (FIMD_WINDOW_PROTECTED(old_value, w) &&
|
1425 | 30628cb1 | Mitsyanko Igor | !FIMD_WINDOW_PROTECTED(s->shadowcon, w)) { |
1426 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1427 | 30628cb1 | Mitsyanko Igor | } |
1428 | 30628cb1 | Mitsyanko Igor | } |
1429 | 30628cb1 | Mitsyanko Igor | break;
|
1430 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCHMAP:
|
1431 | 30628cb1 | Mitsyanko Igor | s->winchmap = val; |
1432 | 30628cb1 | Mitsyanko Igor | break;
|
1433 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDOSD_START ... FIMD_VIDOSD_END:
|
1434 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDOSD_START) >> 4;
|
1435 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDOSD_START) & 0xF) >> 2; |
1436 | 30628cb1 | Mitsyanko Igor | switch (i) {
|
1437 | 30628cb1 | Mitsyanko Igor | case 0: |
1438 | 30628cb1 | Mitsyanko Igor | old_value = s->window[w].lefttop_y; |
1439 | 30628cb1 | Mitsyanko Igor | s->window[w].lefttop_x = (val >> FIMD_VIDOSD_HOR_SHIFT) & |
1440 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_COORD_MASK; |
1441 | 30628cb1 | Mitsyanko Igor | s->window[w].lefttop_y = (val >> FIMD_VIDOSD_VER_SHIFT) & |
1442 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_COORD_MASK; |
1443 | 30628cb1 | Mitsyanko Igor | if (s->window[w].lefttop_y != old_value) {
|
1444 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1445 | 30628cb1 | Mitsyanko Igor | } |
1446 | 30628cb1 | Mitsyanko Igor | break;
|
1447 | 30628cb1 | Mitsyanko Igor | case 1: |
1448 | 30628cb1 | Mitsyanko Igor | old_value = s->window[w].rightbot_y; |
1449 | 30628cb1 | Mitsyanko Igor | s->window[w].rightbot_x = (val >> FIMD_VIDOSD_HOR_SHIFT) & |
1450 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_COORD_MASK; |
1451 | 30628cb1 | Mitsyanko Igor | s->window[w].rightbot_y = (val >> FIMD_VIDOSD_VER_SHIFT) & |
1452 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_COORD_MASK; |
1453 | 30628cb1 | Mitsyanko Igor | if (s->window[w].rightbot_y != old_value) {
|
1454 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1455 | 30628cb1 | Mitsyanko Igor | } |
1456 | 30628cb1 | Mitsyanko Igor | break;
|
1457 | 30628cb1 | Mitsyanko Igor | case 2: |
1458 | 30628cb1 | Mitsyanko Igor | if (w == 0) { |
1459 | 30628cb1 | Mitsyanko Igor | s->window[w].osdsize = val; |
1460 | 30628cb1 | Mitsyanko Igor | } else {
|
1461 | 30628cb1 | Mitsyanko Igor | s->window[w].alpha_val[0] =
|
1462 | 30628cb1 | Mitsyanko Igor | unpack_upper_4((val & FIMD_VIDOSD_ALPHA_AEN0) >> |
1463 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_AEN0_SHIFT) | |
1464 | 30628cb1 | Mitsyanko Igor | (s->window[w].alpha_val[0] & FIMD_VIDALPHA_ALPHA_LOWER);
|
1465 | 30628cb1 | Mitsyanko Igor | s->window[w].alpha_val[1] =
|
1466 | 30628cb1 | Mitsyanko Igor | unpack_upper_4(val & FIMD_VIDOSD_ALPHA_AEN1) | |
1467 | 30628cb1 | Mitsyanko Igor | (s->window[w].alpha_val[1] & FIMD_VIDALPHA_ALPHA_LOWER);
|
1468 | 30628cb1 | Mitsyanko Igor | } |
1469 | 30628cb1 | Mitsyanko Igor | break;
|
1470 | 30628cb1 | Mitsyanko Igor | case 3: |
1471 | 30628cb1 | Mitsyanko Igor | if (w != 1 && w != 2) { |
1472 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("Bad write offset 0x%08x\n", offset);
|
1473 | 30628cb1 | Mitsyanko Igor | return;
|
1474 | 30628cb1 | Mitsyanko Igor | } |
1475 | 30628cb1 | Mitsyanko Igor | s->window[w].osdsize = val; |
1476 | 30628cb1 | Mitsyanko Igor | break;
|
1477 | 30628cb1 | Mitsyanko Igor | } |
1478 | 30628cb1 | Mitsyanko Igor | break;
|
1479 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWADD0_START ... FIMD_VIDWADD0_END:
|
1480 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDWADD0_START) >> 3;
|
1481 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDWADD0_START) >> 2) & 1; |
1482 | 30628cb1 | Mitsyanko Igor | if (i == fimd_get_buffer_id(&s->window[w]) &&
|
1483 | 30628cb1 | Mitsyanko Igor | s->window[w].buf_start[i] != val) { |
1484 | 30628cb1 | Mitsyanko Igor | s->window[w].buf_start[i] = val; |
1485 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1486 | 30628cb1 | Mitsyanko Igor | break;
|
1487 | 30628cb1 | Mitsyanko Igor | } |
1488 | 30628cb1 | Mitsyanko Igor | s->window[w].buf_start[i] = val; |
1489 | 30628cb1 | Mitsyanko Igor | break;
|
1490 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWADD1_START ... FIMD_VIDWADD1_END:
|
1491 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDWADD1_START) >> 3;
|
1492 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDWADD1_START) >> 2) & 1; |
1493 | 30628cb1 | Mitsyanko Igor | s->window[w].buf_end[i] = val; |
1494 | 30628cb1 | Mitsyanko Igor | break;
|
1495 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWADD2_START ... FIMD_VIDWADD2_END:
|
1496 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDWADD2_START) >> 2;
|
1497 | 30628cb1 | Mitsyanko Igor | if (((val & FIMD_VIDWADD2_PAGEWIDTH) != s->window[w].virtpage_width) ||
|
1498 | 30628cb1 | Mitsyanko Igor | (((val >> FIMD_VIDWADD2_OFFSIZE_SHIFT) & FIMD_VIDWADD2_OFFSIZE) != |
1499 | 30628cb1 | Mitsyanko Igor | s->window[w].virtpage_offsize)) { |
1500 | 30628cb1 | Mitsyanko Igor | s->window[w].virtpage_width = val & FIMD_VIDWADD2_PAGEWIDTH; |
1501 | 30628cb1 | Mitsyanko Igor | s->window[w].virtpage_offsize = |
1502 | 30628cb1 | Mitsyanko Igor | (val >> FIMD_VIDWADD2_OFFSIZE_SHIFT) & FIMD_VIDWADD2_OFFSIZE; |
1503 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1504 | 30628cb1 | Mitsyanko Igor | } |
1505 | 30628cb1 | Mitsyanko Igor | break;
|
1506 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDINTCON0:
|
1507 | 30628cb1 | Mitsyanko Igor | s->vidintcon[0] = val;
|
1508 | 30628cb1 | Mitsyanko Igor | break;
|
1509 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDINTCON1:
|
1510 | 30628cb1 | Mitsyanko Igor | s->vidintcon[1] &= ~(val & 7); |
1511 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update_irq(s); |
1512 | 30628cb1 | Mitsyanko Igor | break;
|
1513 | 30628cb1 | Mitsyanko Igor | case FIMD_WKEYCON_START ... FIMD_WKEYCON_END:
|
1514 | 30628cb1 | Mitsyanko Igor | w = ((offset - FIMD_WKEYCON_START) >> 3) + 1; |
1515 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_WKEYCON_START) >> 2) & 1; |
1516 | 30628cb1 | Mitsyanko Igor | s->window[w].keycon[i] = val; |
1517 | 30628cb1 | Mitsyanko Igor | break;
|
1518 | 30628cb1 | Mitsyanko Igor | case FIMD_WKEYALPHA_START ... FIMD_WKEYALPHA_END:
|
1519 | 30628cb1 | Mitsyanko Igor | w = ((offset - FIMD_WKEYALPHA_START) >> 2) + 1; |
1520 | 30628cb1 | Mitsyanko Igor | s->window[w].keyalpha = val; |
1521 | 30628cb1 | Mitsyanko Igor | break;
|
1522 | 30628cb1 | Mitsyanko Igor | case FIMD_DITHMODE:
|
1523 | 30628cb1 | Mitsyanko Igor | s->dithmode = val; |
1524 | 30628cb1 | Mitsyanko Igor | break;
|
1525 | 30628cb1 | Mitsyanko Igor | case FIMD_WINMAP_START ... FIMD_WINMAP_END:
|
1526 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_WINMAP_START) >> 2;
|
1527 | 30628cb1 | Mitsyanko Igor | old_value = s->window[w].winmap; |
1528 | 30628cb1 | Mitsyanko Igor | s->window[w].winmap = val; |
1529 | 30628cb1 | Mitsyanko Igor | if ((val & FIMD_WINMAP_EN) ^ (old_value & FIMD_WINMAP_EN)) {
|
1530 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_invalidate(s); |
1531 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update_win_bppmode(s, w); |
1532 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_trace_bppmode(s, w, 0xFFFFFFFF);
|
1533 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update(s); |
1534 | 30628cb1 | Mitsyanko Igor | } |
1535 | 30628cb1 | Mitsyanko Igor | break;
|
1536 | 30628cb1 | Mitsyanko Igor | case FIMD_WPALCON_HIGH ... FIMD_WPALCON_LOW:
|
1537 | 30628cb1 | Mitsyanko Igor | i = (offset - FIMD_WPALCON_HIGH) >> 2;
|
1538 | 30628cb1 | Mitsyanko Igor | s->wpalcon[i] = val; |
1539 | 30628cb1 | Mitsyanko Igor | if (s->wpalcon[1] & FIMD_WPALCON_UPDATEEN) { |
1540 | 30628cb1 | Mitsyanko Igor | for (w = 0; w < NUM_OF_WINDOWS; w++) { |
1541 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update_win_bppmode(s, w); |
1542 | 30628cb1 | Mitsyanko Igor | fimd_update_get_alpha(s, w); |
1543 | 30628cb1 | Mitsyanko Igor | } |
1544 | 30628cb1 | Mitsyanko Igor | } |
1545 | 30628cb1 | Mitsyanko Igor | break;
|
1546 | 30628cb1 | Mitsyanko Igor | case FIMD_TRIGCON:
|
1547 | 30628cb1 | Mitsyanko Igor | val = (val & ~FIMD_TRIGCON_ROMASK) | (s->trigcon & FIMD_TRIGCON_ROMASK); |
1548 | 30628cb1 | Mitsyanko Igor | s->trigcon = val; |
1549 | 30628cb1 | Mitsyanko Igor | break;
|
1550 | 30628cb1 | Mitsyanko Igor | case FIMD_I80IFCON_START ... FIMD_I80IFCON_END:
|
1551 | 30628cb1 | Mitsyanko Igor | s->i80ifcon[(offset - FIMD_I80IFCON_START) >> 2] = val;
|
1552 | 30628cb1 | Mitsyanko Igor | break;
|
1553 | 30628cb1 | Mitsyanko Igor | case FIMD_COLORGAINCON:
|
1554 | 30628cb1 | Mitsyanko Igor | s->colorgaincon = val; |
1555 | 30628cb1 | Mitsyanko Igor | break;
|
1556 | 30628cb1 | Mitsyanko Igor | case FIMD_LDI_CMDCON0 ... FIMD_LDI_CMDCON1:
|
1557 | 30628cb1 | Mitsyanko Igor | s->ldi_cmdcon[(offset - FIMD_LDI_CMDCON0) >> 2] = val;
|
1558 | 30628cb1 | Mitsyanko Igor | break;
|
1559 | 30628cb1 | Mitsyanko Igor | case FIMD_SIFCCON0 ... FIMD_SIFCCON2:
|
1560 | 30628cb1 | Mitsyanko Igor | i = (offset - FIMD_SIFCCON0) >> 2;
|
1561 | 30628cb1 | Mitsyanko Igor | if (i != 2) { |
1562 | 30628cb1 | Mitsyanko Igor | s->sifccon[i] = val; |
1563 | 30628cb1 | Mitsyanko Igor | } |
1564 | 30628cb1 | Mitsyanko Igor | break;
|
1565 | 30628cb1 | Mitsyanko Igor | case FIMD_HUECOEFCR_START ... FIMD_HUECOEFCR_END:
|
1566 | 30628cb1 | Mitsyanko Igor | i = (offset - FIMD_HUECOEFCR_START) >> 2;
|
1567 | 30628cb1 | Mitsyanko Igor | s->huecoef_cr[i] = val; |
1568 | 30628cb1 | Mitsyanko Igor | break;
|
1569 | 30628cb1 | Mitsyanko Igor | case FIMD_HUECOEFCB_START ... FIMD_HUECOEFCB_END:
|
1570 | 30628cb1 | Mitsyanko Igor | i = (offset - FIMD_HUECOEFCB_START) >> 2;
|
1571 | 30628cb1 | Mitsyanko Igor | s->huecoef_cb[i] = val; |
1572 | 30628cb1 | Mitsyanko Igor | break;
|
1573 | 30628cb1 | Mitsyanko Igor | case FIMD_HUEOFFSET:
|
1574 | 30628cb1 | Mitsyanko Igor | s->hueoffset = val; |
1575 | 30628cb1 | Mitsyanko Igor | break;
|
1576 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWALPHA_START ... FIMD_VIDWALPHA_END:
|
1577 | 30628cb1 | Mitsyanko Igor | w = ((offset - FIMD_VIDWALPHA_START) >> 3);
|
1578 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDWALPHA_START) >> 2) & 1; |
1579 | 30628cb1 | Mitsyanko Igor | if (w == 0) { |
1580 | 30628cb1 | Mitsyanko Igor | s->window[w].alpha_val[i] = val; |
1581 | 30628cb1 | Mitsyanko Igor | } else {
|
1582 | 30628cb1 | Mitsyanko Igor | s->window[w].alpha_val[i] = (val & FIMD_VIDALPHA_ALPHA_LOWER) | |
1583 | 30628cb1 | Mitsyanko Igor | (s->window[w].alpha_val[i] & FIMD_VIDALPHA_ALPHA_UPPER); |
1584 | 30628cb1 | Mitsyanko Igor | } |
1585 | 30628cb1 | Mitsyanko Igor | break;
|
1586 | 30628cb1 | Mitsyanko Igor | case FIMD_BLENDEQ_START ... FIMD_BLENDEQ_END:
|
1587 | 30628cb1 | Mitsyanko Igor | s->window[(offset - FIMD_BLENDEQ_START) >> 2].blendeq = val;
|
1588 | 30628cb1 | Mitsyanko Igor | break;
|
1589 | 30628cb1 | Mitsyanko Igor | case FIMD_BLENDCON:
|
1590 | 30628cb1 | Mitsyanko Igor | old_value = s->blendcon; |
1591 | 30628cb1 | Mitsyanko Igor | s->blendcon = val; |
1592 | 30628cb1 | Mitsyanko Igor | if ((s->blendcon & FIMD_ALPHA_8BIT) != (old_value & FIMD_ALPHA_8BIT)) {
|
1593 | 30628cb1 | Mitsyanko Igor | for (w = 0; w < NUM_OF_WINDOWS; w++) { |
1594 | 30628cb1 | Mitsyanko Igor | fimd_update_get_alpha(s, w); |
1595 | 30628cb1 | Mitsyanko Igor | } |
1596 | 30628cb1 | Mitsyanko Igor | } |
1597 | 30628cb1 | Mitsyanko Igor | break;
|
1598 | 30628cb1 | Mitsyanko Igor | case FIMD_WRTQOSCON_START ... FIMD_WRTQOSCON_END:
|
1599 | 30628cb1 | Mitsyanko Igor | s->window[(offset - FIMD_WRTQOSCON_START) >> 2].rtqoscon = val;
|
1600 | 30628cb1 | Mitsyanko Igor | break;
|
1601 | 30628cb1 | Mitsyanko Igor | case FIMD_I80IFCMD_START ... FIMD_I80IFCMD_END:
|
1602 | 30628cb1 | Mitsyanko Igor | s->i80ifcmd[(offset - FIMD_I80IFCMD_START) >> 2] = val;
|
1603 | 30628cb1 | Mitsyanko Igor | break;
|
1604 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDW0ADD0_B2 ... FIMD_VIDW4ADD0_B2:
|
1605 | 30628cb1 | Mitsyanko Igor | if (offset & 0x0004) { |
1606 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("bad write offset 0x%08x\n", offset);
|
1607 | 30628cb1 | Mitsyanko Igor | break;
|
1608 | 30628cb1 | Mitsyanko Igor | } |
1609 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDW0ADD0_B2) >> 3;
|
1610 | 30628cb1 | Mitsyanko Igor | if (fimd_get_buffer_id(&s->window[w]) == 2 && |
1611 | 30628cb1 | Mitsyanko Igor | s->window[w].buf_start[2] != val) {
|
1612 | 30628cb1 | Mitsyanko Igor | s->window[w].buf_start[2] = val;
|
1613 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1614 | 30628cb1 | Mitsyanko Igor | break;
|
1615 | 30628cb1 | Mitsyanko Igor | } |
1616 | 30628cb1 | Mitsyanko Igor | s->window[w].buf_start[2] = val;
|
1617 | 30628cb1 | Mitsyanko Igor | break;
|
1618 | 30628cb1 | Mitsyanko Igor | case FIMD_SHD_ADD0_START ... FIMD_SHD_ADD0_END:
|
1619 | 30628cb1 | Mitsyanko Igor | if (offset & 0x0004) { |
1620 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("bad write offset 0x%08x\n", offset);
|
1621 | 30628cb1 | Mitsyanko Igor | break;
|
1622 | 30628cb1 | Mitsyanko Igor | } |
1623 | 30628cb1 | Mitsyanko Igor | s->window[(offset - FIMD_SHD_ADD0_START) >> 3].shadow_buf_start = val;
|
1624 | 30628cb1 | Mitsyanko Igor | break;
|
1625 | 30628cb1 | Mitsyanko Igor | case FIMD_SHD_ADD1_START ... FIMD_SHD_ADD1_END:
|
1626 | 30628cb1 | Mitsyanko Igor | if (offset & 0x0004) { |
1627 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("bad write offset 0x%08x\n", offset);
|
1628 | 30628cb1 | Mitsyanko Igor | break;
|
1629 | 30628cb1 | Mitsyanko Igor | } |
1630 | 30628cb1 | Mitsyanko Igor | s->window[(offset - FIMD_SHD_ADD1_START) >> 3].shadow_buf_end = val;
|
1631 | 30628cb1 | Mitsyanko Igor | break;
|
1632 | 30628cb1 | Mitsyanko Igor | case FIMD_SHD_ADD2_START ... FIMD_SHD_ADD2_END:
|
1633 | 30628cb1 | Mitsyanko Igor | s->window[(offset - FIMD_SHD_ADD2_START) >> 2].shadow_buf_size = val;
|
1634 | 30628cb1 | Mitsyanko Igor | break;
|
1635 | 30628cb1 | Mitsyanko Igor | case FIMD_PAL_MEM_START ... FIMD_PAL_MEM_END:
|
1636 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_PAL_MEM_START) >> 10;
|
1637 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_PAL_MEM_START) >> 2) & 0xFF; |
1638 | 30628cb1 | Mitsyanko Igor | s->window[w].palette[i] = val; |
1639 | 30628cb1 | Mitsyanko Igor | break;
|
1640 | 30628cb1 | Mitsyanko Igor | case FIMD_PALMEM_AL_START ... FIMD_PALMEM_AL_END:
|
1641 | 30628cb1 | Mitsyanko Igor | /* Palette memory aliases for windows 0 and 1 */
|
1642 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_PALMEM_AL_START) >> 10;
|
1643 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_PALMEM_AL_START) >> 2) & 0xFF; |
1644 | 30628cb1 | Mitsyanko Igor | s->window[w].palette[i] = val; |
1645 | 30628cb1 | Mitsyanko Igor | break;
|
1646 | 30628cb1 | Mitsyanko Igor | default:
|
1647 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("bad write offset 0x%08x\n", offset);
|
1648 | 30628cb1 | Mitsyanko Igor | break;
|
1649 | 30628cb1 | Mitsyanko Igor | } |
1650 | 30628cb1 | Mitsyanko Igor | } |
1651 | 30628cb1 | Mitsyanko Igor | |
1652 | 30628cb1 | Mitsyanko Igor | static uint64_t exynos4210_fimd_read(void *opaque, target_phys_addr_t offset, |
1653 | 30628cb1 | Mitsyanko Igor | unsigned size)
|
1654 | 30628cb1 | Mitsyanko Igor | { |
1655 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdState *s = (Exynos4210fimdState *)opaque; |
1656 | 30628cb1 | Mitsyanko Igor | int w, i;
|
1657 | 30628cb1 | Mitsyanko Igor | uint32_t ret = 0;
|
1658 | 30628cb1 | Mitsyanko Igor | |
1659 | 30628cb1 | Mitsyanko Igor | DPRINT_L2("read offset 0x%08x\n", offset);
|
1660 | 30628cb1 | Mitsyanko Igor | |
1661 | 30628cb1 | Mitsyanko Igor | switch (offset) {
|
1662 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDCON0 ... FIMD_VIDCON3:
|
1663 | 30628cb1 | Mitsyanko Igor | return s->vidcon[(offset - FIMD_VIDCON0) >> 2]; |
1664 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDTCON_START ... FIMD_VIDTCON_END:
|
1665 | 30628cb1 | Mitsyanko Igor | return s->vidtcon[(offset - FIMD_VIDTCON_START) >> 2]; |
1666 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCON_START ... FIMD_WINCON_END:
|
1667 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_WINCON_START) >> 2].wincon; |
1668 | 30628cb1 | Mitsyanko Igor | case FIMD_SHADOWCON:
|
1669 | 30628cb1 | Mitsyanko Igor | return s->shadowcon;
|
1670 | 30628cb1 | Mitsyanko Igor | case FIMD_WINCHMAP:
|
1671 | 30628cb1 | Mitsyanko Igor | return s->winchmap;
|
1672 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDOSD_START ... FIMD_VIDOSD_END:
|
1673 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDOSD_START) >> 4;
|
1674 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDOSD_START) & 0xF) >> 2; |
1675 | 30628cb1 | Mitsyanko Igor | switch (i) {
|
1676 | 30628cb1 | Mitsyanko Igor | case 0: |
1677 | 30628cb1 | Mitsyanko Igor | ret = ((s->window[w].lefttop_x & FIMD_VIDOSD_COORD_MASK) << |
1678 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_HOR_SHIFT) | |
1679 | 30628cb1 | Mitsyanko Igor | (s->window[w].lefttop_y & FIMD_VIDOSD_COORD_MASK); |
1680 | 30628cb1 | Mitsyanko Igor | break;
|
1681 | 30628cb1 | Mitsyanko Igor | case 1: |
1682 | 30628cb1 | Mitsyanko Igor | ret = ((s->window[w].rightbot_x & FIMD_VIDOSD_COORD_MASK) << |
1683 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_HOR_SHIFT) | |
1684 | 30628cb1 | Mitsyanko Igor | (s->window[w].rightbot_y & FIMD_VIDOSD_COORD_MASK); |
1685 | 30628cb1 | Mitsyanko Igor | break;
|
1686 | 30628cb1 | Mitsyanko Igor | case 2: |
1687 | 30628cb1 | Mitsyanko Igor | if (w == 0) { |
1688 | 30628cb1 | Mitsyanko Igor | ret = s->window[w].osdsize; |
1689 | 30628cb1 | Mitsyanko Igor | } else {
|
1690 | 30628cb1 | Mitsyanko Igor | ret = (pack_upper_4(s->window[w].alpha_val[0]) <<
|
1691 | 30628cb1 | Mitsyanko Igor | FIMD_VIDOSD_AEN0_SHIFT) | |
1692 | 30628cb1 | Mitsyanko Igor | pack_upper_4(s->window[w].alpha_val[1]);
|
1693 | 30628cb1 | Mitsyanko Igor | } |
1694 | 30628cb1 | Mitsyanko Igor | break;
|
1695 | 30628cb1 | Mitsyanko Igor | case 3: |
1696 | 30628cb1 | Mitsyanko Igor | if (w != 1 && w != 2) { |
1697 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("bad read offset 0x%08x\n", offset);
|
1698 | 30628cb1 | Mitsyanko Igor | return 0xBAADBAAD; |
1699 | 30628cb1 | Mitsyanko Igor | } |
1700 | 30628cb1 | Mitsyanko Igor | ret = s->window[w].osdsize; |
1701 | 30628cb1 | Mitsyanko Igor | break;
|
1702 | 30628cb1 | Mitsyanko Igor | } |
1703 | 30628cb1 | Mitsyanko Igor | return ret;
|
1704 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWADD0_START ... FIMD_VIDWADD0_END:
|
1705 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDWADD0_START) >> 3;
|
1706 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDWADD0_START) >> 2) & 1; |
1707 | 30628cb1 | Mitsyanko Igor | return s->window[w].buf_start[i];
|
1708 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWADD1_START ... FIMD_VIDWADD1_END:
|
1709 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDWADD1_START) >> 3;
|
1710 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDWADD1_START) >> 2) & 1; |
1711 | 30628cb1 | Mitsyanko Igor | return s->window[w].buf_end[i];
|
1712 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWADD2_START ... FIMD_VIDWADD2_END:
|
1713 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_VIDWADD2_START) >> 2;
|
1714 | 30628cb1 | Mitsyanko Igor | return s->window[w].virtpage_width | (s->window[w].virtpage_offsize <<
|
1715 | 30628cb1 | Mitsyanko Igor | FIMD_VIDWADD2_OFFSIZE_SHIFT); |
1716 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDINTCON0 ... FIMD_VIDINTCON1:
|
1717 | 30628cb1 | Mitsyanko Igor | return s->vidintcon[(offset - FIMD_VIDINTCON0) >> 2]; |
1718 | 30628cb1 | Mitsyanko Igor | case FIMD_WKEYCON_START ... FIMD_WKEYCON_END:
|
1719 | 30628cb1 | Mitsyanko Igor | w = ((offset - FIMD_WKEYCON_START) >> 3) + 1; |
1720 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_WKEYCON_START) >> 2) & 1; |
1721 | 30628cb1 | Mitsyanko Igor | return s->window[w].keycon[i];
|
1722 | 30628cb1 | Mitsyanko Igor | case FIMD_WKEYALPHA_START ... FIMD_WKEYALPHA_END:
|
1723 | 30628cb1 | Mitsyanko Igor | w = ((offset - FIMD_WKEYALPHA_START) >> 2) + 1; |
1724 | 30628cb1 | Mitsyanko Igor | return s->window[w].keyalpha;
|
1725 | 30628cb1 | Mitsyanko Igor | case FIMD_DITHMODE:
|
1726 | 30628cb1 | Mitsyanko Igor | return s->dithmode;
|
1727 | 30628cb1 | Mitsyanko Igor | case FIMD_WINMAP_START ... FIMD_WINMAP_END:
|
1728 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_WINMAP_START) >> 2].winmap; |
1729 | 30628cb1 | Mitsyanko Igor | case FIMD_WPALCON_HIGH ... FIMD_WPALCON_LOW:
|
1730 | 30628cb1 | Mitsyanko Igor | return s->wpalcon[(offset - FIMD_WPALCON_HIGH) >> 2]; |
1731 | 30628cb1 | Mitsyanko Igor | case FIMD_TRIGCON:
|
1732 | 30628cb1 | Mitsyanko Igor | return s->trigcon;
|
1733 | 30628cb1 | Mitsyanko Igor | case FIMD_I80IFCON_START ... FIMD_I80IFCON_END:
|
1734 | 30628cb1 | Mitsyanko Igor | return s->i80ifcon[(offset - FIMD_I80IFCON_START) >> 2]; |
1735 | 30628cb1 | Mitsyanko Igor | case FIMD_COLORGAINCON:
|
1736 | 30628cb1 | Mitsyanko Igor | return s->colorgaincon;
|
1737 | 30628cb1 | Mitsyanko Igor | case FIMD_LDI_CMDCON0 ... FIMD_LDI_CMDCON1:
|
1738 | 30628cb1 | Mitsyanko Igor | return s->ldi_cmdcon[(offset - FIMD_LDI_CMDCON0) >> 2]; |
1739 | 30628cb1 | Mitsyanko Igor | case FIMD_SIFCCON0 ... FIMD_SIFCCON2:
|
1740 | 30628cb1 | Mitsyanko Igor | i = (offset - FIMD_SIFCCON0) >> 2;
|
1741 | 30628cb1 | Mitsyanko Igor | return s->sifccon[i];
|
1742 | 30628cb1 | Mitsyanko Igor | case FIMD_HUECOEFCR_START ... FIMD_HUECOEFCR_END:
|
1743 | 30628cb1 | Mitsyanko Igor | i = (offset - FIMD_HUECOEFCR_START) >> 2;
|
1744 | 30628cb1 | Mitsyanko Igor | return s->huecoef_cr[i];
|
1745 | 30628cb1 | Mitsyanko Igor | case FIMD_HUECOEFCB_START ... FIMD_HUECOEFCB_END:
|
1746 | 30628cb1 | Mitsyanko Igor | i = (offset - FIMD_HUECOEFCB_START) >> 2;
|
1747 | 30628cb1 | Mitsyanko Igor | return s->huecoef_cb[i];
|
1748 | 30628cb1 | Mitsyanko Igor | case FIMD_HUEOFFSET:
|
1749 | 30628cb1 | Mitsyanko Igor | return s->hueoffset;
|
1750 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDWALPHA_START ... FIMD_VIDWALPHA_END:
|
1751 | 30628cb1 | Mitsyanko Igor | w = ((offset - FIMD_VIDWALPHA_START) >> 3);
|
1752 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_VIDWALPHA_START) >> 2) & 1; |
1753 | 30628cb1 | Mitsyanko Igor | return s->window[w].alpha_val[i] &
|
1754 | 30628cb1 | Mitsyanko Igor | (w == 0 ? 0xFFFFFF : FIMD_VIDALPHA_ALPHA_LOWER); |
1755 | 30628cb1 | Mitsyanko Igor | case FIMD_BLENDEQ_START ... FIMD_BLENDEQ_END:
|
1756 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_BLENDEQ_START) >> 2].blendeq; |
1757 | 30628cb1 | Mitsyanko Igor | case FIMD_BLENDCON:
|
1758 | 30628cb1 | Mitsyanko Igor | return s->blendcon;
|
1759 | 30628cb1 | Mitsyanko Igor | case FIMD_WRTQOSCON_START ... FIMD_WRTQOSCON_END:
|
1760 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_WRTQOSCON_START) >> 2].rtqoscon; |
1761 | 30628cb1 | Mitsyanko Igor | case FIMD_I80IFCMD_START ... FIMD_I80IFCMD_END:
|
1762 | 30628cb1 | Mitsyanko Igor | return s->i80ifcmd[(offset - FIMD_I80IFCMD_START) >> 2]; |
1763 | 30628cb1 | Mitsyanko Igor | case FIMD_VIDW0ADD0_B2 ... FIMD_VIDW4ADD0_B2:
|
1764 | 30628cb1 | Mitsyanko Igor | if (offset & 0x0004) { |
1765 | 30628cb1 | Mitsyanko Igor | break;
|
1766 | 30628cb1 | Mitsyanko Igor | } |
1767 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_VIDW0ADD0_B2) >> 3].buf_start[2]; |
1768 | 30628cb1 | Mitsyanko Igor | case FIMD_SHD_ADD0_START ... FIMD_SHD_ADD0_END:
|
1769 | 30628cb1 | Mitsyanko Igor | if (offset & 0x0004) { |
1770 | 30628cb1 | Mitsyanko Igor | break;
|
1771 | 30628cb1 | Mitsyanko Igor | } |
1772 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_SHD_ADD0_START) >> 3].shadow_buf_start; |
1773 | 30628cb1 | Mitsyanko Igor | case FIMD_SHD_ADD1_START ... FIMD_SHD_ADD1_END:
|
1774 | 30628cb1 | Mitsyanko Igor | if (offset & 0x0004) { |
1775 | 30628cb1 | Mitsyanko Igor | break;
|
1776 | 30628cb1 | Mitsyanko Igor | } |
1777 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_SHD_ADD1_START) >> 3].shadow_buf_end; |
1778 | 30628cb1 | Mitsyanko Igor | case FIMD_SHD_ADD2_START ... FIMD_SHD_ADD2_END:
|
1779 | 30628cb1 | Mitsyanko Igor | return s->window[(offset - FIMD_SHD_ADD2_START) >> 2].shadow_buf_size; |
1780 | 30628cb1 | Mitsyanko Igor | case FIMD_PAL_MEM_START ... FIMD_PAL_MEM_END:
|
1781 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_PAL_MEM_START) >> 10;
|
1782 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_PAL_MEM_START) >> 2) & 0xFF; |
1783 | 30628cb1 | Mitsyanko Igor | return s->window[w].palette[i];
|
1784 | 30628cb1 | Mitsyanko Igor | case FIMD_PALMEM_AL_START ... FIMD_PALMEM_AL_END:
|
1785 | 30628cb1 | Mitsyanko Igor | /* Palette aliases for win 0,1 */
|
1786 | 30628cb1 | Mitsyanko Igor | w = (offset - FIMD_PALMEM_AL_START) >> 10;
|
1787 | 30628cb1 | Mitsyanko Igor | i = ((offset - FIMD_PALMEM_AL_START) >> 2) & 0xFF; |
1788 | 30628cb1 | Mitsyanko Igor | return s->window[w].palette[i];
|
1789 | 30628cb1 | Mitsyanko Igor | } |
1790 | 30628cb1 | Mitsyanko Igor | |
1791 | 30628cb1 | Mitsyanko Igor | DPRINT_ERROR("bad read offset 0x%08x\n", offset);
|
1792 | 30628cb1 | Mitsyanko Igor | return 0xBAADBAAD; |
1793 | 30628cb1 | Mitsyanko Igor | } |
1794 | 30628cb1 | Mitsyanko Igor | |
1795 | 30628cb1 | Mitsyanko Igor | static const MemoryRegionOps exynos4210_fimd_mmio_ops = { |
1796 | 30628cb1 | Mitsyanko Igor | .read = exynos4210_fimd_read, |
1797 | 30628cb1 | Mitsyanko Igor | .write = exynos4210_fimd_write, |
1798 | 30628cb1 | Mitsyanko Igor | .valid = { |
1799 | 30628cb1 | Mitsyanko Igor | .min_access_size = 4,
|
1800 | 30628cb1 | Mitsyanko Igor | .max_access_size = 4,
|
1801 | 30628cb1 | Mitsyanko Igor | .unaligned = false
|
1802 | 30628cb1 | Mitsyanko Igor | }, |
1803 | 30628cb1 | Mitsyanko Igor | .endianness = DEVICE_NATIVE_ENDIAN, |
1804 | 30628cb1 | Mitsyanko Igor | }; |
1805 | 30628cb1 | Mitsyanko Igor | |
1806 | 30628cb1 | Mitsyanko Igor | static int exynos4210_fimd_load(void *opaque, int version_id) |
1807 | 30628cb1 | Mitsyanko Igor | { |
1808 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdState *s = (Exynos4210fimdState *)opaque; |
1809 | 30628cb1 | Mitsyanko Igor | int w;
|
1810 | 30628cb1 | Mitsyanko Igor | |
1811 | 30628cb1 | Mitsyanko Igor | if (version_id != 1) { |
1812 | 30628cb1 | Mitsyanko Igor | return -EINVAL;
|
1813 | 30628cb1 | Mitsyanko Igor | } |
1814 | 30628cb1 | Mitsyanko Igor | |
1815 | 30628cb1 | Mitsyanko Igor | for (w = 0; w < NUM_OF_WINDOWS; w++) { |
1816 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_update_win_bppmode(s, w); |
1817 | 30628cb1 | Mitsyanko Igor | fimd_update_get_alpha(s, w); |
1818 | 30628cb1 | Mitsyanko Igor | fimd_update_memory_section(s, w); |
1819 | 30628cb1 | Mitsyanko Igor | } |
1820 | 30628cb1 | Mitsyanko Igor | |
1821 | 30628cb1 | Mitsyanko Igor | /* Redraw the whole screen */
|
1822 | 30628cb1 | Mitsyanko Igor | exynos4210_update_resolution(s); |
1823 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_invalidate(s); |
1824 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_enable(s, (s->vidcon[0] & FIMD_VIDCON0_ENVID_MASK) ==
|
1825 | 30628cb1 | Mitsyanko Igor | FIMD_VIDCON0_ENVID_MASK); |
1826 | 30628cb1 | Mitsyanko Igor | return 0; |
1827 | 30628cb1 | Mitsyanko Igor | } |
1828 | 30628cb1 | Mitsyanko Igor | |
1829 | 30628cb1 | Mitsyanko Igor | static const VMStateDescription exynos4210_fimd_window_vmstate = { |
1830 | 30628cb1 | Mitsyanko Igor | .name = "exynos4210.fimd_window",
|
1831 | 30628cb1 | Mitsyanko Igor | .version_id = 1,
|
1832 | 30628cb1 | Mitsyanko Igor | .minimum_version_id = 1,
|
1833 | 30628cb1 | Mitsyanko Igor | .fields = (VMStateField[]) { |
1834 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(wincon, Exynos4210fimdWindow), |
1835 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(buf_start, Exynos4210fimdWindow, 3),
|
1836 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(buf_end, Exynos4210fimdWindow, 3),
|
1837 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(keycon, Exynos4210fimdWindow, 2),
|
1838 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(keyalpha, Exynos4210fimdWindow), |
1839 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(winmap, Exynos4210fimdWindow), |
1840 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(blendeq, Exynos4210fimdWindow), |
1841 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(rtqoscon, Exynos4210fimdWindow), |
1842 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(palette, Exynos4210fimdWindow, 256),
|
1843 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(shadow_buf_start, Exynos4210fimdWindow), |
1844 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(shadow_buf_end, Exynos4210fimdWindow), |
1845 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(shadow_buf_size, Exynos4210fimdWindow), |
1846 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT16(lefttop_x, Exynos4210fimdWindow), |
1847 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT16(lefttop_y, Exynos4210fimdWindow), |
1848 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT16(rightbot_x, Exynos4210fimdWindow), |
1849 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT16(rightbot_y, Exynos4210fimdWindow), |
1850 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(osdsize, Exynos4210fimdWindow), |
1851 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(alpha_val, Exynos4210fimdWindow, 2),
|
1852 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT16(virtpage_width, Exynos4210fimdWindow), |
1853 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT16(virtpage_offsize, Exynos4210fimdWindow), |
1854 | 30628cb1 | Mitsyanko Igor | VMSTATE_END_OF_LIST() |
1855 | 30628cb1 | Mitsyanko Igor | } |
1856 | 30628cb1 | Mitsyanko Igor | }; |
1857 | 30628cb1 | Mitsyanko Igor | |
1858 | 30628cb1 | Mitsyanko Igor | static const VMStateDescription exynos4210_fimd_vmstate = { |
1859 | 30628cb1 | Mitsyanko Igor | .name = "exynos4210.fimd",
|
1860 | 30628cb1 | Mitsyanko Igor | .version_id = 1,
|
1861 | 30628cb1 | Mitsyanko Igor | .minimum_version_id = 1,
|
1862 | 30628cb1 | Mitsyanko Igor | .post_load = exynos4210_fimd_load, |
1863 | 30628cb1 | Mitsyanko Igor | .fields = (VMStateField[]) { |
1864 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(vidcon, Exynos4210fimdState, 4),
|
1865 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(vidtcon, Exynos4210fimdState, 4),
|
1866 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(shadowcon, Exynos4210fimdState), |
1867 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(winchmap, Exynos4210fimdState), |
1868 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(vidintcon, Exynos4210fimdState, 2),
|
1869 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(dithmode, Exynos4210fimdState), |
1870 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(wpalcon, Exynos4210fimdState, 2),
|
1871 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(trigcon, Exynos4210fimdState), |
1872 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(i80ifcon, Exynos4210fimdState, 4),
|
1873 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(colorgaincon, Exynos4210fimdState), |
1874 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(ldi_cmdcon, Exynos4210fimdState, 2),
|
1875 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(sifccon, Exynos4210fimdState, 3),
|
1876 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(huecoef_cr, Exynos4210fimdState, 4),
|
1877 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(huecoef_cb, Exynos4210fimdState, 4),
|
1878 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(hueoffset, Exynos4210fimdState), |
1879 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32_ARRAY(i80ifcmd, Exynos4210fimdState, 12),
|
1880 | 30628cb1 | Mitsyanko Igor | VMSTATE_UINT32(blendcon, Exynos4210fimdState), |
1881 | 30628cb1 | Mitsyanko Igor | VMSTATE_STRUCT_ARRAY(window, Exynos4210fimdState, 5, 1, |
1882 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_window_vmstate, Exynos4210fimdWindow), |
1883 | 30628cb1 | Mitsyanko Igor | VMSTATE_END_OF_LIST() |
1884 | 30628cb1 | Mitsyanko Igor | } |
1885 | 30628cb1 | Mitsyanko Igor | }; |
1886 | 30628cb1 | Mitsyanko Igor | |
1887 | 30628cb1 | Mitsyanko Igor | static int exynos4210_fimd_init(SysBusDevice *dev) |
1888 | 30628cb1 | Mitsyanko Igor | { |
1889 | 30628cb1 | Mitsyanko Igor | Exynos4210fimdState *s = FROM_SYSBUS(Exynos4210fimdState, dev); |
1890 | 30628cb1 | Mitsyanko Igor | |
1891 | 30628cb1 | Mitsyanko Igor | s->ifb = NULL;
|
1892 | 30628cb1 | Mitsyanko Igor | |
1893 | 30628cb1 | Mitsyanko Igor | sysbus_init_irq(dev, &s->irq[0]);
|
1894 | 30628cb1 | Mitsyanko Igor | sysbus_init_irq(dev, &s->irq[1]);
|
1895 | 30628cb1 | Mitsyanko Igor | sysbus_init_irq(dev, &s->irq[2]);
|
1896 | 30628cb1 | Mitsyanko Igor | |
1897 | 30628cb1 | Mitsyanko Igor | memory_region_init_io(&s->iomem, &exynos4210_fimd_mmio_ops, s, |
1898 | 30628cb1 | Mitsyanko Igor | "exynos4210.fimd", FIMD_REGS_SIZE);
|
1899 | 30628cb1 | Mitsyanko Igor | sysbus_init_mmio(dev, &s->iomem); |
1900 | 30628cb1 | Mitsyanko Igor | s->console = graphic_console_init(exynos4210_fimd_update, |
1901 | 30628cb1 | Mitsyanko Igor | exynos4210_fimd_invalidate, NULL, NULL, s); |
1902 | 30628cb1 | Mitsyanko Igor | |
1903 | 30628cb1 | Mitsyanko Igor | return 0; |
1904 | 30628cb1 | Mitsyanko Igor | } |
1905 | 30628cb1 | Mitsyanko Igor | |
1906 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_class_init(ObjectClass *klass, void *data) |
1907 | 30628cb1 | Mitsyanko Igor | { |
1908 | 30628cb1 | Mitsyanko Igor | DeviceClass *dc = DEVICE_CLASS(klass); |
1909 | 30628cb1 | Mitsyanko Igor | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
1910 | 30628cb1 | Mitsyanko Igor | |
1911 | 30628cb1 | Mitsyanko Igor | dc->vmsd = &exynos4210_fimd_vmstate; |
1912 | 30628cb1 | Mitsyanko Igor | dc->reset = exynos4210_fimd_reset; |
1913 | 30628cb1 | Mitsyanko Igor | k->init = exynos4210_fimd_init; |
1914 | 30628cb1 | Mitsyanko Igor | } |
1915 | 30628cb1 | Mitsyanko Igor | |
1916 | 30628cb1 | Mitsyanko Igor | static TypeInfo exynos4210_fimd_info = {
|
1917 | 30628cb1 | Mitsyanko Igor | .name = "exynos4210.fimd",
|
1918 | 30628cb1 | Mitsyanko Igor | .parent = TYPE_SYS_BUS_DEVICE, |
1919 | 30628cb1 | Mitsyanko Igor | .instance_size = sizeof(Exynos4210fimdState),
|
1920 | 30628cb1 | Mitsyanko Igor | .class_init = exynos4210_fimd_class_init, |
1921 | 30628cb1 | Mitsyanko Igor | }; |
1922 | 30628cb1 | Mitsyanko Igor | |
1923 | 30628cb1 | Mitsyanko Igor | static void exynos4210_fimd_register_types(void) |
1924 | 30628cb1 | Mitsyanko Igor | { |
1925 | 30628cb1 | Mitsyanko Igor | type_register_static(&exynos4210_fimd_info); |
1926 | 30628cb1 | Mitsyanko Igor | } |
1927 | 30628cb1 | Mitsyanko Igor | |
1928 | 30628cb1 | Mitsyanko Igor | type_init(exynos4210_fimd_register_types) |