root / hw / piix_pci.c @ fa2ddcb4
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1 | 502a5395 | pbrook | /*
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2 | 502a5395 | pbrook | * QEMU i440FX/PIIX3 PCI Bridge Emulation
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3 | 502a5395 | pbrook | *
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4 | 502a5395 | pbrook | * Copyright (c) 2006 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 502a5395 | pbrook | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 502a5395 | pbrook | * of this software and associated documentation files (the "Software"), to deal
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8 | 502a5395 | pbrook | * in the Software without restriction, including without limitation the rights
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9 | 502a5395 | pbrook | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 502a5395 | pbrook | * copies of the Software, and to permit persons to whom the Software is
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11 | 502a5395 | pbrook | * furnished to do so, subject to the following conditions:
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12 | 502a5395 | pbrook | *
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13 | 502a5395 | pbrook | * The above copyright notice and this permission notice shall be included in
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14 | 502a5395 | pbrook | * all copies or substantial portions of the Software.
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15 | 502a5395 | pbrook | *
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16 | 502a5395 | pbrook | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 502a5395 | pbrook | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 502a5395 | pbrook | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 502a5395 | pbrook | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 502a5395 | pbrook | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 502a5395 | pbrook | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 502a5395 | pbrook | * THE SOFTWARE.
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23 | 502a5395 | pbrook | */
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24 | 502a5395 | pbrook | |
25 | 87ecb68b | pbrook | #include "hw.h" |
26 | 87ecb68b | pbrook | #include "pc.h" |
27 | 87ecb68b | pbrook | #include "pci.h" |
28 | 4f5e19e6 | Isaku Yamahata | #include "pci_host.h" |
29 | f75247f1 | Gerd Hoffmann | #include "isa.h" |
30 | 8a14daa5 | Gerd Hoffmann | #include "sysbus.h" |
31 | bf1b0071 | Blue Swirl | #include "range.h" |
32 | 41445300 | Anthony PERARD | #include "xen.h" |
33 | 87ecb68b | pbrook | |
34 | 56594fe3 | Isaku Yamahata | /*
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35 | 56594fe3 | Isaku Yamahata | * I440FX chipset data sheet.
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36 | 56594fe3 | Isaku Yamahata | * http://download.intel.com/design/chipsets/datashts/29054901.pdf
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37 | 56594fe3 | Isaku Yamahata | */
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38 | 56594fe3 | Isaku Yamahata | |
39 | 67c332fd | Andreas Färber | typedef struct I440FXState { |
40 | 67c332fd | Andreas Färber | PCIHostState parent_obj; |
41 | 67c332fd | Andreas Färber | } I440FXState; |
42 | 502a5395 | pbrook | |
43 | ab431c28 | Isaku Yamahata | #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ |
44 | e735b55a | Isaku Yamahata | #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ |
45 | bf09551a | Stefano Stabellini | #define XEN_PIIX_NUM_PIRQS 128ULL |
46 | ab431c28 | Isaku Yamahata | #define PIIX_PIRQC 0x60 |
47 | e735b55a | Isaku Yamahata | |
48 | fd37d881 | Juan Quintela | typedef struct PIIX3State { |
49 | fd37d881 | Juan Quintela | PCIDevice dev; |
50 | ab431c28 | Isaku Yamahata | |
51 | ab431c28 | Isaku Yamahata | /*
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52 | ab431c28 | Isaku Yamahata | * bitmap to track pic levels.
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53 | ab431c28 | Isaku Yamahata | * The pic level is the logical OR of all the PCI irqs mapped to it
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54 | ab431c28 | Isaku Yamahata | * So one PIC level is tracked by PIIX_NUM_PIRQS bits.
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55 | ab431c28 | Isaku Yamahata | *
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56 | ab431c28 | Isaku Yamahata | * PIRQ is mapped to PIC pins, we track it by
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57 | ab431c28 | Isaku Yamahata | * PIIX_NUM_PIRQS * PIIX_NUM_PIC_IRQS = 64 bits with
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58 | ab431c28 | Isaku Yamahata | * pic_irq * PIIX_NUM_PIRQS + pirq
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59 | ab431c28 | Isaku Yamahata | */
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60 | ab431c28 | Isaku Yamahata | #if PIIX_NUM_PIC_IRQS * PIIX_NUM_PIRQS > 64 |
61 | ab431c28 | Isaku Yamahata | #error "unable to encode pic state in 64bit in pic_levels." |
62 | ab431c28 | Isaku Yamahata | #endif
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63 | ab431c28 | Isaku Yamahata | uint64_t pic_levels; |
64 | ab431c28 | Isaku Yamahata | |
65 | bd7dce87 | Juan Quintela | qemu_irq *pic; |
66 | e735b55a | Isaku Yamahata | |
67 | e735b55a | Isaku Yamahata | /* This member isn't used. Just for save/load compatibility */
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68 | e735b55a | Isaku Yamahata | int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; |
69 | 7cd9eee0 | Gerd Hoffmann | } PIIX3State; |
70 | bd7dce87 | Juan Quintela | |
71 | ae0a5466 | Avi Kivity | typedef struct PAMMemoryRegion { |
72 | ae0a5466 | Avi Kivity | MemoryRegion mem; |
73 | ae0a5466 | Avi Kivity | bool initialized;
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74 | ae0a5466 | Avi Kivity | } PAMMemoryRegion; |
75 | ae0a5466 | Avi Kivity | |
76 | 0a3bacf3 | Juan Quintela | struct PCII440FXState {
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77 | 0a3bacf3 | Juan Quintela | PCIDevice dev; |
78 | ae0a5466 | Avi Kivity | MemoryRegion *system_memory; |
79 | ae0a5466 | Avi Kivity | MemoryRegion *pci_address_space; |
80 | ae0a5466 | Avi Kivity | MemoryRegion *ram_memory; |
81 | ae0a5466 | Avi Kivity | MemoryRegion pci_hole; |
82 | ae0a5466 | Avi Kivity | MemoryRegion pci_hole_64bit; |
83 | ae0a5466 | Avi Kivity | PAMMemoryRegion pam_regions[13];
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84 | ae0a5466 | Avi Kivity | MemoryRegion smram_region; |
85 | 6c009fa4 | Juan Quintela | uint8_t smm_enabled; |
86 | 0a3bacf3 | Juan Quintela | }; |
87 | 0a3bacf3 | Juan Quintela | |
88 | f2c688bb | Isaku Yamahata | |
89 | f2c688bb | Isaku Yamahata | #define I440FX_PAM 0x59 |
90 | f2c688bb | Isaku Yamahata | #define I440FX_PAM_SIZE 7 |
91 | f2c688bb | Isaku Yamahata | #define I440FX_SMRAM 0x72 |
92 | f2c688bb | Isaku Yamahata | |
93 | ab431c28 | Isaku Yamahata | static void piix3_set_irq(void *opaque, int pirq, int level); |
94 | 3afa9bb4 | Michael S. Tsirkin | static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pci_intx); |
95 | bf09551a | Stefano Stabellini | static void piix3_write_config_xen(PCIDevice *dev, |
96 | bf09551a | Stefano Stabellini | uint32_t address, uint32_t val, int len);
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97 | d2b59317 | pbrook | |
98 | d2b59317 | pbrook | /* return the global irq number corresponding to a given device irq
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99 | d2b59317 | pbrook | pin. We could also use the bus number to have a more precise
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100 | d2b59317 | pbrook | mapping. */
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101 | ab431c28 | Isaku Yamahata | static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) |
102 | d2b59317 | pbrook | { |
103 | d2b59317 | pbrook | int slot_addend;
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104 | d2b59317 | pbrook | slot_addend = (pci_dev->devfn >> 3) - 1; |
105 | ab431c28 | Isaku Yamahata | return (pci_intx + slot_addend) & 3; |
106 | d2b59317 | pbrook | } |
107 | 502a5395 | pbrook | |
108 | ae0a5466 | Avi Kivity | static void update_pam(PCII440FXState *d, uint32_t start, uint32_t end, int r, |
109 | ae0a5466 | Avi Kivity | PAMMemoryRegion *mem) |
110 | 84631fd7 | bellard | { |
111 | ae0a5466 | Avi Kivity | if (mem->initialized) {
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112 | ae0a5466 | Avi Kivity | memory_region_del_subregion(d->system_memory, &mem->mem); |
113 | ae0a5466 | Avi Kivity | memory_region_destroy(&mem->mem); |
114 | ae0a5466 | Avi Kivity | } |
115 | 84631fd7 | bellard | |
116 | 84631fd7 | bellard | // printf("ISA mapping %08x-0x%08x: %d\n", start, end, r);
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117 | 84631fd7 | bellard | switch(r) {
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118 | 84631fd7 | bellard | case 3: |
119 | 84631fd7 | bellard | /* RAM */
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120 | ae0a5466 | Avi Kivity | memory_region_init_alias(&mem->mem, "pam-ram", d->ram_memory,
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121 | ae0a5466 | Avi Kivity | start, end - start); |
122 | 84631fd7 | bellard | break;
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123 | 84631fd7 | bellard | case 1: |
124 | 84631fd7 | bellard | /* ROM (XXX: not quite correct) */
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125 | ae0a5466 | Avi Kivity | memory_region_init_alias(&mem->mem, "pam-rom", d->ram_memory,
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126 | ae0a5466 | Avi Kivity | start, end - start); |
127 | ae0a5466 | Avi Kivity | memory_region_set_readonly(&mem->mem, true);
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128 | 84631fd7 | bellard | break;
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129 | 84631fd7 | bellard | case 2: |
130 | 84631fd7 | bellard | case 0: |
131 | 84631fd7 | bellard | /* XXX: should distinguish read/write cases */
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132 | ae0a5466 | Avi Kivity | memory_region_init_alias(&mem->mem, "pam-pci", d->pci_address_space,
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133 | ae0a5466 | Avi Kivity | start, end - start); |
134 | 84631fd7 | bellard | break;
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135 | 84631fd7 | bellard | } |
136 | ae0a5466 | Avi Kivity | memory_region_add_subregion_overlap(d->system_memory, |
137 | ae0a5466 | Avi Kivity | start, &mem->mem, 1);
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138 | ae0a5466 | Avi Kivity | mem->initialized = true;
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139 | 84631fd7 | bellard | } |
140 | ee0ea1d0 | bellard | |
141 | 0a3bacf3 | Juan Quintela | static void i440fx_update_memory_mappings(PCII440FXState *d) |
142 | ee0ea1d0 | bellard | { |
143 | ee0ea1d0 | bellard | int i, r;
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144 | ae0a5466 | Avi Kivity | uint32_t smram; |
145 | b41e1ed4 | Avi Kivity | bool smram_enabled;
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146 | 84631fd7 | bellard | |
147 | 72124c01 | Avi Kivity | memory_region_transaction_begin(); |
148 | ae0a5466 | Avi Kivity | update_pam(d, 0xf0000, 0x100000, (d->dev.config[I440FX_PAM] >> 4) & 3, |
149 | ae0a5466 | Avi Kivity | &d->pam_regions[0]);
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150 | 84631fd7 | bellard | for(i = 0; i < 12; i++) { |
151 | f2c688bb | Isaku Yamahata | r = (d->dev.config[(i >> 1) + (I440FX_PAM + 1)] >> ((i & 1) * 4)) & 3; |
152 | ae0a5466 | Avi Kivity | update_pam(d, 0xc0000 + 0x4000 * i, 0xc0000 + 0x4000 * (i + 1), r, |
153 | ae0a5466 | Avi Kivity | &d->pam_regions[i+1]);
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154 | ee0ea1d0 | bellard | } |
155 | f2c688bb | Isaku Yamahata | smram = d->dev.config[I440FX_SMRAM]; |
156 | b41e1ed4 | Avi Kivity | smram_enabled = (d->smm_enabled && (smram & 0x08)) || (smram & 0x40); |
157 | b41e1ed4 | Avi Kivity | memory_region_set_enabled(&d->smram_region, !smram_enabled); |
158 | 72124c01 | Avi Kivity | memory_region_transaction_commit(); |
159 | ee0ea1d0 | bellard | } |
160 | ee0ea1d0 | bellard | |
161 | f885f1ea | Isaku Yamahata | static void i440fx_set_smm(int val, void *arg) |
162 | ee0ea1d0 | bellard | { |
163 | f885f1ea | Isaku Yamahata | PCII440FXState *d = arg; |
164 | f885f1ea | Isaku Yamahata | |
165 | ee0ea1d0 | bellard | val = (val != 0);
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166 | 6c009fa4 | Juan Quintela | if (d->smm_enabled != val) {
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167 | 6c009fa4 | Juan Quintela | d->smm_enabled = val; |
168 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
169 | ee0ea1d0 | bellard | } |
170 | ee0ea1d0 | bellard | } |
171 | ee0ea1d0 | bellard | |
172 | ee0ea1d0 | bellard | |
173 | 0a3bacf3 | Juan Quintela | static void i440fx_write_config(PCIDevice *dev, |
174 | ee0ea1d0 | bellard | uint32_t address, uint32_t val, int len)
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175 | ee0ea1d0 | bellard | { |
176 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev); |
177 | 0a3bacf3 | Juan Quintela | |
178 | ee0ea1d0 | bellard | /* XXX: implement SMRAM.D_LOCK */
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179 | 0a3bacf3 | Juan Quintela | pci_default_write_config(dev, address, val, len); |
180 | 4da5fcd3 | Isaku Yamahata | if (ranges_overlap(address, len, I440FX_PAM, I440FX_PAM_SIZE) ||
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181 | 4da5fcd3 | Isaku Yamahata | range_covers_byte(address, len, I440FX_SMRAM)) { |
182 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
183 | 4da5fcd3 | Isaku Yamahata | } |
184 | ee0ea1d0 | bellard | } |
185 | ee0ea1d0 | bellard | |
186 | 0c7d19e5 | Juan Quintela | static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id) |
187 | ee0ea1d0 | bellard | { |
188 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = opaque; |
189 | 52fc1d83 | balrog | int ret, i;
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190 | ee0ea1d0 | bellard | |
191 | 0a3bacf3 | Juan Quintela | ret = pci_device_load(&d->dev, f); |
192 | ee0ea1d0 | bellard | if (ret < 0) |
193 | ee0ea1d0 | bellard | return ret;
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194 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
195 | 6c009fa4 | Juan Quintela | qemu_get_8s(f, &d->smm_enabled); |
196 | 52fc1d83 | balrog | |
197 | e735b55a | Isaku Yamahata | if (version_id == 2) { |
198 | e735b55a | Isaku Yamahata | for (i = 0; i < PIIX_NUM_PIRQS; i++) { |
199 | e735b55a | Isaku Yamahata | qemu_get_be32(f); /* dummy load for compatibility */
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200 | e735b55a | Isaku Yamahata | } |
201 | e735b55a | Isaku Yamahata | } |
202 | 52fc1d83 | balrog | |
203 | ee0ea1d0 | bellard | return 0; |
204 | ee0ea1d0 | bellard | } |
205 | ee0ea1d0 | bellard | |
206 | e59fb374 | Juan Quintela | static int i440fx_post_load(void *opaque, int version_id) |
207 | 0c7d19e5 | Juan Quintela | { |
208 | 0c7d19e5 | Juan Quintela | PCII440FXState *d = opaque; |
209 | 0c7d19e5 | Juan Quintela | |
210 | 0c7d19e5 | Juan Quintela | i440fx_update_memory_mappings(d); |
211 | 0c7d19e5 | Juan Quintela | return 0; |
212 | 0c7d19e5 | Juan Quintela | } |
213 | 0c7d19e5 | Juan Quintela | |
214 | 0c7d19e5 | Juan Quintela | static const VMStateDescription vmstate_i440fx = { |
215 | 0c7d19e5 | Juan Quintela | .name = "I440FX",
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216 | 0c7d19e5 | Juan Quintela | .version_id = 3,
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217 | 0c7d19e5 | Juan Quintela | .minimum_version_id = 3,
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218 | 0c7d19e5 | Juan Quintela | .minimum_version_id_old = 1,
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219 | 0c7d19e5 | Juan Quintela | .load_state_old = i440fx_load_old, |
220 | 752ff2fa | Juan Quintela | .post_load = i440fx_post_load, |
221 | 0c7d19e5 | Juan Quintela | .fields = (VMStateField []) { |
222 | 0c7d19e5 | Juan Quintela | VMSTATE_PCI_DEVICE(dev, PCII440FXState), |
223 | 0c7d19e5 | Juan Quintela | VMSTATE_UINT8(smm_enabled, PCII440FXState), |
224 | 0c7d19e5 | Juan Quintela | VMSTATE_END_OF_LIST() |
225 | 0c7d19e5 | Juan Quintela | } |
226 | 0c7d19e5 | Juan Quintela | }; |
227 | 0c7d19e5 | Juan Quintela | |
228 | 81a322d4 | Gerd Hoffmann | static int i440fx_pcihost_initfn(SysBusDevice *dev) |
229 | 502a5395 | pbrook | { |
230 | 8558d942 | Andreas Färber | PCIHostState *s = PCI_HOST_BRIDGE(dev); |
231 | 502a5395 | pbrook | |
232 | d0ed8076 | Avi Kivity | memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s, |
233 | d0ed8076 | Avi Kivity | "pci-conf-idx", 4); |
234 | d0ed8076 | Avi Kivity | sysbus_add_io(dev, 0xcf8, &s->conf_mem);
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235 | d0ed8076 | Avi Kivity | sysbus_init_ioports(&s->busdev, 0xcf8, 4); |
236 | d0ed8076 | Avi Kivity | |
237 | d0ed8076 | Avi Kivity | memory_region_init_io(&s->data_mem, &pci_host_data_le_ops, s, |
238 | d0ed8076 | Avi Kivity | "pci-conf-data", 4); |
239 | d0ed8076 | Avi Kivity | sysbus_add_io(dev, 0xcfc, &s->data_mem);
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240 | d0ed8076 | Avi Kivity | sysbus_init_ioports(&s->busdev, 0xcfc, 4); |
241 | 502a5395 | pbrook | |
242 | 81a322d4 | Gerd Hoffmann | return 0; |
243 | 8a14daa5 | Gerd Hoffmann | } |
244 | 502a5395 | pbrook | |
245 | 0a3bacf3 | Juan Quintela | static int i440fx_initfn(PCIDevice *dev) |
246 | 8a14daa5 | Gerd Hoffmann | { |
247 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev); |
248 | ee0ea1d0 | bellard | |
249 | f2c688bb | Isaku Yamahata | d->dev.config[I440FX_SMRAM] = 0x02;
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250 | ee0ea1d0 | bellard | |
251 | f885f1ea | Isaku Yamahata | cpu_smm_register(&i440fx_set_smm, d); |
252 | 81a322d4 | Gerd Hoffmann | return 0; |
253 | 8a14daa5 | Gerd Hoffmann | } |
254 | 8a14daa5 | Gerd Hoffmann | |
255 | 41445300 | Anthony PERARD | static PCIBus *i440fx_common_init(const char *device_name, |
256 | 41445300 | Anthony PERARD | PCII440FXState **pi440fx_state, |
257 | 41445300 | Anthony PERARD | int *piix3_devfn,
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258 | 60573079 | Hervé Poussineau | ISABus **isa_bus, qemu_irq *pic, |
259 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
260 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
261 | ae0a5466 | Avi Kivity | ram_addr_t ram_size, |
262 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_start, |
263 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_size, |
264 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_start, |
265 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_size, |
266 | ae0a5466 | Avi Kivity | MemoryRegion *pci_address_space, |
267 | ae0a5466 | Avi Kivity | MemoryRegion *ram_memory) |
268 | 8a14daa5 | Gerd Hoffmann | { |
269 | 8a14daa5 | Gerd Hoffmann | DeviceState *dev; |
270 | 8a14daa5 | Gerd Hoffmann | PCIBus *b; |
271 | 8a14daa5 | Gerd Hoffmann | PCIDevice *d; |
272 | 8558d942 | Andreas Färber | PCIHostState *s; |
273 | 7cd9eee0 | Gerd Hoffmann | PIIX3State *piix3; |
274 | ae0a5466 | Avi Kivity | PCII440FXState *f; |
275 | 8a14daa5 | Gerd Hoffmann | |
276 | 8a14daa5 | Gerd Hoffmann | dev = qdev_create(NULL, "i440FX-pcihost"); |
277 | 8558d942 | Andreas Färber | s = PCI_HOST_BRIDGE(dev); |
278 | aee97b84 | Avi Kivity | s->address_space = address_space_mem; |
279 | 67c332fd | Andreas Färber | b = pci_bus_new(dev, NULL, pci_address_space,
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280 | aee97b84 | Avi Kivity | address_space_io, 0);
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281 | 8a14daa5 | Gerd Hoffmann | s->bus = b; |
282 | f05f6b4a | Paolo Bonzini | object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL); |
283 | f424d5c4 | Paolo Bonzini | qdev_init_nofail(dev); |
284 | 8a14daa5 | Gerd Hoffmann | |
285 | 41445300 | Anthony PERARD | d = pci_create_simple(b, 0, device_name);
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286 | 0a3bacf3 | Juan Quintela | *pi440fx_state = DO_UPCAST(PCII440FXState, dev, d); |
287 | ae0a5466 | Avi Kivity | f = *pi440fx_state; |
288 | ae0a5466 | Avi Kivity | f->system_memory = address_space_mem; |
289 | ae0a5466 | Avi Kivity | f->pci_address_space = pci_address_space; |
290 | ae0a5466 | Avi Kivity | f->ram_memory = ram_memory; |
291 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->pci_hole, "pci-hole", f->pci_address_space,
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292 | ae0a5466 | Avi Kivity | pci_hole_start, pci_hole_size); |
293 | ae0a5466 | Avi Kivity | memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole); |
294 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->pci_hole_64bit, "pci-hole64",
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295 | ae0a5466 | Avi Kivity | f->pci_address_space, |
296 | ae0a5466 | Avi Kivity | pci_hole64_start, pci_hole64_size); |
297 | ae0a5466 | Avi Kivity | if (pci_hole64_size) {
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298 | ae0a5466 | Avi Kivity | memory_region_add_subregion(f->system_memory, pci_hole64_start, |
299 | ae0a5466 | Avi Kivity | &f->pci_hole_64bit); |
300 | ae0a5466 | Avi Kivity | } |
301 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->smram_region, "smram-region",
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302 | ae0a5466 | Avi Kivity | f->pci_address_space, 0xa0000, 0x20000); |
303 | b41e1ed4 | Avi Kivity | memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
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304 | b41e1ed4 | Avi Kivity | &f->smram_region, 1);
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305 | b41e1ed4 | Avi Kivity | memory_region_set_enabled(&f->smram_region, false);
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306 | 8a14daa5 | Gerd Hoffmann | |
307 | bf09551a | Stefano Stabellini | /* Xen supports additional interrupt routes from the PCI devices to
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308 | bf09551a | Stefano Stabellini | * the IOAPIC: the four pins of each PCI device on the bus are also
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309 | bf09551a | Stefano Stabellini | * connected to the IOAPIC directly.
|
310 | bf09551a | Stefano Stabellini | * These additional routes can be discovered through ACPI. */
|
311 | bf09551a | Stefano Stabellini | if (xen_enabled()) {
|
312 | bf09551a | Stefano Stabellini | piix3 = DO_UPCAST(PIIX3State, dev, |
313 | bf09551a | Stefano Stabellini | pci_create_simple_multifunction(b, -1, true, "PIIX3-xen")); |
314 | bf09551a | Stefano Stabellini | pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq, |
315 | bf09551a | Stefano Stabellini | piix3, XEN_PIIX_NUM_PIRQS); |
316 | bf09551a | Stefano Stabellini | } else {
|
317 | bf09551a | Stefano Stabellini | piix3 = DO_UPCAST(PIIX3State, dev, |
318 | bf09551a | Stefano Stabellini | pci_create_simple_multifunction(b, -1, true, "PIIX3")); |
319 | bf09551a | Stefano Stabellini | pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3, |
320 | bf09551a | Stefano Stabellini | PIIX_NUM_PIRQS); |
321 | 3afa9bb4 | Michael S. Tsirkin | pci_bus_set_route_irq_fn(b, piix3_route_intx_pin_to_irq); |
322 | bf09551a | Stefano Stabellini | } |
323 | 7cd9eee0 | Gerd Hoffmann | piix3->pic = pic; |
324 | 60573079 | Hervé Poussineau | *isa_bus = DO_UPCAST(ISABus, qbus, |
325 | 60573079 | Hervé Poussineau | qdev_get_child_bus(&piix3->dev.qdev, "isa.0"));
|
326 | 41445300 | Anthony PERARD | |
327 | 7cd9eee0 | Gerd Hoffmann | *piix3_devfn = piix3->dev.devfn; |
328 | 85a750ca | Juan Quintela | |
329 | ec5f92ce | Bernhard M. Wiedemann | ram_size = ram_size / 8 / 1024 / 1024; |
330 | ec5f92ce | Bernhard M. Wiedemann | if (ram_size > 255) |
331 | ec5f92ce | Bernhard M. Wiedemann | ram_size = 255;
|
332 | ec5f92ce | Bernhard M. Wiedemann | (*pi440fx_state)->dev.config[0x57]=ram_size;
|
333 | ec5f92ce | Bernhard M. Wiedemann | |
334 | ae0a5466 | Avi Kivity | i440fx_update_memory_mappings(f); |
335 | ae0a5466 | Avi Kivity | |
336 | 502a5395 | pbrook | return b;
|
337 | 502a5395 | pbrook | } |
338 | 502a5395 | pbrook | |
339 | 41445300 | Anthony PERARD | PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
|
340 | 60573079 | Hervé Poussineau | ISABus **isa_bus, qemu_irq *pic, |
341 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
342 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
343 | ae0a5466 | Avi Kivity | ram_addr_t ram_size, |
344 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_start, |
345 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_size, |
346 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_start, |
347 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_size, |
348 | ae0a5466 | Avi Kivity | MemoryRegion *pci_memory, MemoryRegion *ram_memory) |
349 | ae0a5466 | Avi Kivity | |
350 | 41445300 | Anthony PERARD | { |
351 | 41445300 | Anthony PERARD | PCIBus *b; |
352 | 41445300 | Anthony PERARD | |
353 | 60573079 | Hervé Poussineau | b = i440fx_common_init("i440FX", pi440fx_state, piix3_devfn, isa_bus, pic,
|
354 | ae0a5466 | Avi Kivity | address_space_mem, address_space_io, ram_size, |
355 | ae0a5466 | Avi Kivity | pci_hole_start, pci_hole_size, |
356 | d50c6c8b | Alexey Korolev | pci_hole64_start, pci_hole64_size, |
357 | ae0a5466 | Avi Kivity | pci_memory, ram_memory); |
358 | 41445300 | Anthony PERARD | return b;
|
359 | 41445300 | Anthony PERARD | } |
360 | 41445300 | Anthony PERARD | |
361 | 502a5395 | pbrook | /* PIIX3 PCI to ISA bridge */
|
362 | ab431c28 | Isaku Yamahata | static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) |
363 | ab431c28 | Isaku Yamahata | { |
364 | ab431c28 | Isaku Yamahata | qemu_set_irq(piix3->pic[pic_irq], |
365 | ab431c28 | Isaku Yamahata | !!(piix3->pic_levels & |
366 | 09de0f46 | TeLeMan | (((1ULL << PIIX_NUM_PIRQS) - 1) << |
367 | ab431c28 | Isaku Yamahata | (pic_irq * PIIX_NUM_PIRQS)))); |
368 | ab431c28 | Isaku Yamahata | } |
369 | 502a5395 | pbrook | |
370 | afe3ef1d | Isaku Yamahata | static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) |
371 | ab431c28 | Isaku Yamahata | { |
372 | ab431c28 | Isaku Yamahata | int pic_irq;
|
373 | ab431c28 | Isaku Yamahata | uint64_t mask; |
374 | ab431c28 | Isaku Yamahata | |
375 | ab431c28 | Isaku Yamahata | pic_irq = piix3->dev.config[PIIX_PIRQC + pirq]; |
376 | ab431c28 | Isaku Yamahata | if (pic_irq >= PIIX_NUM_PIC_IRQS) {
|
377 | ab431c28 | Isaku Yamahata | return;
|
378 | ab431c28 | Isaku Yamahata | } |
379 | ab431c28 | Isaku Yamahata | |
380 | ab431c28 | Isaku Yamahata | mask = 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq);
|
381 | ab431c28 | Isaku Yamahata | piix3->pic_levels &= ~mask; |
382 | ab431c28 | Isaku Yamahata | piix3->pic_levels |= mask * !!level; |
383 | ab431c28 | Isaku Yamahata | |
384 | afe3ef1d | Isaku Yamahata | piix3_set_irq_pic(piix3, pic_irq); |
385 | ab431c28 | Isaku Yamahata | } |
386 | ab431c28 | Isaku Yamahata | |
387 | ab431c28 | Isaku Yamahata | static void piix3_set_irq(void *opaque, int pirq, int level) |
388 | 502a5395 | pbrook | { |
389 | 7cd9eee0 | Gerd Hoffmann | PIIX3State *piix3 = opaque; |
390 | afe3ef1d | Isaku Yamahata | piix3_set_irq_level(piix3, pirq, level); |
391 | ab431c28 | Isaku Yamahata | } |
392 | 502a5395 | pbrook | |
393 | 3afa9bb4 | Michael S. Tsirkin | static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) |
394 | 3afa9bb4 | Michael S. Tsirkin | { |
395 | 3afa9bb4 | Michael S. Tsirkin | PIIX3State *piix3 = opaque; |
396 | 3afa9bb4 | Michael S. Tsirkin | int irq = piix3->dev.config[PIIX_PIRQC + pin];
|
397 | 3afa9bb4 | Michael S. Tsirkin | PCIINTxRoute route; |
398 | 3afa9bb4 | Michael S. Tsirkin | |
399 | 3afa9bb4 | Michael S. Tsirkin | if (irq < PIIX_NUM_PIC_IRQS) {
|
400 | 3afa9bb4 | Michael S. Tsirkin | route.mode = PCI_INTX_ENABLED; |
401 | 3afa9bb4 | Michael S. Tsirkin | route.irq = irq; |
402 | 3afa9bb4 | Michael S. Tsirkin | } else {
|
403 | 3afa9bb4 | Michael S. Tsirkin | route.mode = PCI_INTX_DISABLED; |
404 | 3afa9bb4 | Michael S. Tsirkin | route.irq = -1;
|
405 | 3afa9bb4 | Michael S. Tsirkin | } |
406 | 3afa9bb4 | Michael S. Tsirkin | return route;
|
407 | 3afa9bb4 | Michael S. Tsirkin | } |
408 | 3afa9bb4 | Michael S. Tsirkin | |
409 | ab431c28 | Isaku Yamahata | /* irq routing is changed. so rebuild bitmap */
|
410 | ab431c28 | Isaku Yamahata | static void piix3_update_irq_levels(PIIX3State *piix3) |
411 | ab431c28 | Isaku Yamahata | { |
412 | ab431c28 | Isaku Yamahata | int pirq;
|
413 | ab431c28 | Isaku Yamahata | |
414 | ab431c28 | Isaku Yamahata | piix3->pic_levels = 0;
|
415 | ab431c28 | Isaku Yamahata | for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) { |
416 | ab431c28 | Isaku Yamahata | piix3_set_irq_level(piix3, pirq, |
417 | afe3ef1d | Isaku Yamahata | pci_bus_get_irq_level(piix3->dev.bus, pirq)); |
418 | ab431c28 | Isaku Yamahata | } |
419 | ab431c28 | Isaku Yamahata | } |
420 | ab431c28 | Isaku Yamahata | |
421 | ab431c28 | Isaku Yamahata | static void piix3_write_config(PCIDevice *dev, |
422 | ab431c28 | Isaku Yamahata | uint32_t address, uint32_t val, int len)
|
423 | ab431c28 | Isaku Yamahata | { |
424 | ab431c28 | Isaku Yamahata | pci_default_write_config(dev, address, val, len); |
425 | ab431c28 | Isaku Yamahata | if (ranges_overlap(address, len, PIIX_PIRQC, 4)) { |
426 | ab431c28 | Isaku Yamahata | PIIX3State *piix3 = DO_UPCAST(PIIX3State, dev, dev); |
427 | ab431c28 | Isaku Yamahata | int pic_irq;
|
428 | 0ae16251 | Jan Kiszka | |
429 | 0ae16251 | Jan Kiszka | pci_bus_fire_intx_routing_notifier(piix3->dev.bus); |
430 | ab431c28 | Isaku Yamahata | piix3_update_irq_levels(piix3); |
431 | ab431c28 | Isaku Yamahata | for (pic_irq = 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { |
432 | ab431c28 | Isaku Yamahata | piix3_set_irq_pic(piix3, pic_irq); |
433 | d2b59317 | pbrook | } |
434 | 502a5395 | pbrook | } |
435 | 502a5395 | pbrook | } |
436 | 502a5395 | pbrook | |
437 | bf09551a | Stefano Stabellini | static void piix3_write_config_xen(PCIDevice *dev, |
438 | bf09551a | Stefano Stabellini | uint32_t address, uint32_t val, int len)
|
439 | bf09551a | Stefano Stabellini | { |
440 | bf09551a | Stefano Stabellini | xen_piix_pci_write_config_client(address, val, len); |
441 | bf09551a | Stefano Stabellini | piix3_write_config(dev, address, val, len); |
442 | bf09551a | Stefano Stabellini | } |
443 | bf09551a | Stefano Stabellini | |
444 | 15a1956a | Gleb Natapov | static void piix3_reset(void *opaque) |
445 | 502a5395 | pbrook | { |
446 | fd37d881 | Juan Quintela | PIIX3State *d = opaque; |
447 | fd37d881 | Juan Quintela | uint8_t *pci_conf = d->dev.config; |
448 | 502a5395 | pbrook | |
449 | 502a5395 | pbrook | pci_conf[0x04] = 0x07; // master, memory and I/O |
450 | 502a5395 | pbrook | pci_conf[0x05] = 0x00; |
451 | 502a5395 | pbrook | pci_conf[0x06] = 0x00; |
452 | 502a5395 | pbrook | pci_conf[0x07] = 0x02; // PCI_status_devsel_medium |
453 | 502a5395 | pbrook | pci_conf[0x4c] = 0x4d; |
454 | 502a5395 | pbrook | pci_conf[0x4e] = 0x03; |
455 | 502a5395 | pbrook | pci_conf[0x4f] = 0x00; |
456 | 502a5395 | pbrook | pci_conf[0x60] = 0x80; |
457 | 477afee3 | aurel32 | pci_conf[0x61] = 0x80; |
458 | 477afee3 | aurel32 | pci_conf[0x62] = 0x80; |
459 | 477afee3 | aurel32 | pci_conf[0x63] = 0x80; |
460 | 502a5395 | pbrook | pci_conf[0x69] = 0x02; |
461 | 502a5395 | pbrook | pci_conf[0x70] = 0x80; |
462 | 502a5395 | pbrook | pci_conf[0x76] = 0x0c; |
463 | 502a5395 | pbrook | pci_conf[0x77] = 0x0c; |
464 | 502a5395 | pbrook | pci_conf[0x78] = 0x02; |
465 | 502a5395 | pbrook | pci_conf[0x79] = 0x00; |
466 | 502a5395 | pbrook | pci_conf[0x80] = 0x00; |
467 | 502a5395 | pbrook | pci_conf[0x82] = 0x00; |
468 | 502a5395 | pbrook | pci_conf[0xa0] = 0x08; |
469 | 502a5395 | pbrook | pci_conf[0xa2] = 0x00; |
470 | 502a5395 | pbrook | pci_conf[0xa3] = 0x00; |
471 | 502a5395 | pbrook | pci_conf[0xa4] = 0x00; |
472 | 502a5395 | pbrook | pci_conf[0xa5] = 0x00; |
473 | 502a5395 | pbrook | pci_conf[0xa6] = 0x00; |
474 | 502a5395 | pbrook | pci_conf[0xa7] = 0x00; |
475 | 502a5395 | pbrook | pci_conf[0xa8] = 0x0f; |
476 | 502a5395 | pbrook | pci_conf[0xaa] = 0x00; |
477 | 502a5395 | pbrook | pci_conf[0xab] = 0x00; |
478 | 502a5395 | pbrook | pci_conf[0xac] = 0x00; |
479 | 502a5395 | pbrook | pci_conf[0xae] = 0x00; |
480 | ab431c28 | Isaku Yamahata | |
481 | ab431c28 | Isaku Yamahata | d->pic_levels = 0;
|
482 | ab431c28 | Isaku Yamahata | } |
483 | ab431c28 | Isaku Yamahata | |
484 | ab431c28 | Isaku Yamahata | static int piix3_post_load(void *opaque, int version_id) |
485 | ab431c28 | Isaku Yamahata | { |
486 | ab431c28 | Isaku Yamahata | PIIX3State *piix3 = opaque; |
487 | ab431c28 | Isaku Yamahata | piix3_update_irq_levels(piix3); |
488 | ab431c28 | Isaku Yamahata | return 0; |
489 | e735b55a | Isaku Yamahata | } |
490 | 15a1956a | Gleb Natapov | |
491 | e735b55a | Isaku Yamahata | static void piix3_pre_save(void *opaque) |
492 | e735b55a | Isaku Yamahata | { |
493 | e735b55a | Isaku Yamahata | int i;
|
494 | e735b55a | Isaku Yamahata | PIIX3State *piix3 = opaque; |
495 | e735b55a | Isaku Yamahata | |
496 | e735b55a | Isaku Yamahata | for (i = 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) { |
497 | e735b55a | Isaku Yamahata | piix3->pci_irq_levels_vmstate[i] = |
498 | e735b55a | Isaku Yamahata | pci_bus_get_irq_level(piix3->dev.bus, i); |
499 | e735b55a | Isaku Yamahata | } |
500 | 502a5395 | pbrook | } |
501 | 502a5395 | pbrook | |
502 | d1f171bd | Juan Quintela | static const VMStateDescription vmstate_piix3 = { |
503 | d1f171bd | Juan Quintela | .name = "PIIX3",
|
504 | d1f171bd | Juan Quintela | .version_id = 3,
|
505 | d1f171bd | Juan Quintela | .minimum_version_id = 2,
|
506 | d1f171bd | Juan Quintela | .minimum_version_id_old = 2,
|
507 | ab431c28 | Isaku Yamahata | .post_load = piix3_post_load, |
508 | e735b55a | Isaku Yamahata | .pre_save = piix3_pre_save, |
509 | d1f171bd | Juan Quintela | .fields = (VMStateField []) { |
510 | d1f171bd | Juan Quintela | VMSTATE_PCI_DEVICE(dev, PIIX3State), |
511 | e735b55a | Isaku Yamahata | VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIX3State, |
512 | e735b55a | Isaku Yamahata | PIIX_NUM_PIRQS, 3),
|
513 | d1f171bd | Juan Quintela | VMSTATE_END_OF_LIST() |
514 | da64182c | Juan Quintela | } |
515 | d1f171bd | Juan Quintela | }; |
516 | 1941d19c | bellard | |
517 | fd37d881 | Juan Quintela | static int piix3_initfn(PCIDevice *dev) |
518 | 502a5395 | pbrook | { |
519 | fd37d881 | Juan Quintela | PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev); |
520 | 502a5395 | pbrook | |
521 | c2d0d012 | Richard Henderson | isa_bus_new(&d->dev.qdev, pci_address_space_io(dev)); |
522 | a08d4367 | Jan Kiszka | qemu_register_reset(piix3_reset, d); |
523 | 81a322d4 | Gerd Hoffmann | return 0; |
524 | 502a5395 | pbrook | } |
525 | 5c2b87e3 | ths | |
526 | 40021f08 | Anthony Liguori | static void piix3_class_init(ObjectClass *klass, void *data) |
527 | 40021f08 | Anthony Liguori | { |
528 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
529 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
530 | 40021f08 | Anthony Liguori | |
531 | 39bffca2 | Anthony Liguori | dc->desc = "ISA bridge";
|
532 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_piix3; |
533 | 39bffca2 | Anthony Liguori | dc->no_user = 1,
|
534 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
535 | 40021f08 | Anthony Liguori | k->init = piix3_initfn; |
536 | 40021f08 | Anthony Liguori | k->config_write = piix3_write_config; |
537 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
538 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
|
539 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_ISA; |
540 | 40021f08 | Anthony Liguori | } |
541 | 40021f08 | Anthony Liguori | |
542 | 4240abff | Andreas Färber | static const TypeInfo piix3_info = { |
543 | 39bffca2 | Anthony Liguori | .name = "PIIX3",
|
544 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
545 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PIIX3State),
|
546 | 39bffca2 | Anthony Liguori | .class_init = piix3_class_init, |
547 | e855761c | Anthony Liguori | }; |
548 | e855761c | Anthony Liguori | |
549 | 40021f08 | Anthony Liguori | static void piix3_xen_class_init(ObjectClass *klass, void *data) |
550 | 40021f08 | Anthony Liguori | { |
551 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
552 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
553 | 40021f08 | Anthony Liguori | |
554 | 39bffca2 | Anthony Liguori | dc->desc = "ISA bridge";
|
555 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_piix3; |
556 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
557 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
558 | 40021f08 | Anthony Liguori | k->init = piix3_initfn; |
559 | 40021f08 | Anthony Liguori | k->config_write = piix3_write_config_xen; |
560 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
561 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
|
562 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_ISA; |
563 | e855761c | Anthony Liguori | }; |
564 | e855761c | Anthony Liguori | |
565 | 4240abff | Andreas Färber | static const TypeInfo piix3_xen_info = { |
566 | 39bffca2 | Anthony Liguori | .name = "PIIX3-xen",
|
567 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
568 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PIIX3State),
|
569 | 39bffca2 | Anthony Liguori | .class_init = piix3_xen_class_init, |
570 | 40021f08 | Anthony Liguori | }; |
571 | 40021f08 | Anthony Liguori | |
572 | 40021f08 | Anthony Liguori | static void i440fx_class_init(ObjectClass *klass, void *data) |
573 | 40021f08 | Anthony Liguori | { |
574 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
575 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
576 | 40021f08 | Anthony Liguori | |
577 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
578 | 40021f08 | Anthony Liguori | k->init = i440fx_initfn; |
579 | 40021f08 | Anthony Liguori | k->config_write = i440fx_write_config; |
580 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
581 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82441; |
582 | 40021f08 | Anthony Liguori | k->revision = 0x02;
|
583 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_HOST; |
584 | 39bffca2 | Anthony Liguori | dc->desc = "Host bridge";
|
585 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
586 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_i440fx; |
587 | 40021f08 | Anthony Liguori | } |
588 | 40021f08 | Anthony Liguori | |
589 | 4240abff | Andreas Färber | static const TypeInfo i440fx_info = { |
590 | 39bffca2 | Anthony Liguori | .name = "i440FX",
|
591 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
592 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PCII440FXState),
|
593 | 39bffca2 | Anthony Liguori | .class_init = i440fx_class_init, |
594 | 8a14daa5 | Gerd Hoffmann | }; |
595 | 8a14daa5 | Gerd Hoffmann | |
596 | 999e12bb | Anthony Liguori | static void i440fx_pcihost_class_init(ObjectClass *klass, void *data) |
597 | 999e12bb | Anthony Liguori | { |
598 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
599 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
600 | 999e12bb | Anthony Liguori | |
601 | 999e12bb | Anthony Liguori | k->init = i440fx_pcihost_initfn; |
602 | 39bffca2 | Anthony Liguori | dc->fw_name = "pci";
|
603 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
604 | 999e12bb | Anthony Liguori | } |
605 | 999e12bb | Anthony Liguori | |
606 | 4240abff | Andreas Färber | static const TypeInfo i440fx_pcihost_info = { |
607 | 39bffca2 | Anthony Liguori | .name = "i440FX-pcihost",
|
608 | 8558d942 | Andreas Färber | .parent = TYPE_PCI_HOST_BRIDGE, |
609 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(I440FXState),
|
610 | 39bffca2 | Anthony Liguori | .class_init = i440fx_pcihost_class_init, |
611 | 8a14daa5 | Gerd Hoffmann | }; |
612 | 8a14daa5 | Gerd Hoffmann | |
613 | 83f7d43a | Andreas Färber | static void i440fx_register_types(void) |
614 | 8a14daa5 | Gerd Hoffmann | { |
615 | 39bffca2 | Anthony Liguori | type_register_static(&i440fx_info); |
616 | 39bffca2 | Anthony Liguori | type_register_static(&piix3_info); |
617 | 39bffca2 | Anthony Liguori | type_register_static(&piix3_xen_info); |
618 | 39bffca2 | Anthony Liguori | type_register_static(&i440fx_pcihost_info); |
619 | 8a14daa5 | Gerd Hoffmann | } |
620 | 83f7d43a | Andreas Färber | |
621 | 83f7d43a | Andreas Färber | type_init(i440fx_register_types) |