root / tests / test-i386.c @ facc68be
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1 | 3a27ad0b | bellard | #define _GNU_SOURCE
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2 | 4d1135e4 | bellard | #include <stdlib.h> |
3 | 4d1135e4 | bellard | #include <stdio.h> |
4 | e3e86d56 | bellard | #include <string.h> |
5 | 6dbad63e | bellard | #include <inttypes.h> |
6 | 4d1135e4 | bellard | #include <math.h> |
7 | 3a27ad0b | bellard | #include <signal.h> |
8 | 3a27ad0b | bellard | #include <setjmp.h> |
9 | 070893f4 | bellard | #include <errno.h> |
10 | 3a27ad0b | bellard | #include <sys/ucontext.h> |
11 | 3a27ad0b | bellard | #include <sys/mman.h> |
12 | 3a27ad0b | bellard | #include <asm/vm86.h> |
13 | 4d1135e4 | bellard | |
14 | 03bfca94 | bellard | #define TEST_CMOV 0 |
15 | 03bfca94 | bellard | #define TEST_FCOMI 0 |
16 | 3ff0631e | bellard | //#define LINUX_VM86_IOPL_FIX
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17 | 5dd9488c | bellard | |
18 | 4d1135e4 | bellard | #define xglue(x, y) x ## y |
19 | 4d1135e4 | bellard | #define glue(x, y) xglue(x, y)
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20 | 4d1135e4 | bellard | #define stringify(s) tostring(s)
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21 | 4d1135e4 | bellard | #define tostring(s) #s |
22 | 4d1135e4 | bellard | |
23 | 4d1135e4 | bellard | #define CC_C 0x0001 |
24 | 4d1135e4 | bellard | #define CC_P 0x0004 |
25 | 4d1135e4 | bellard | #define CC_A 0x0010 |
26 | 4d1135e4 | bellard | #define CC_Z 0x0040 |
27 | 4d1135e4 | bellard | #define CC_S 0x0080 |
28 | 4d1135e4 | bellard | #define CC_O 0x0800 |
29 | 4d1135e4 | bellard | |
30 | 4d1135e4 | bellard | #define __init_call __attribute__ ((unused,__section__ (".initcall.init"))) |
31 | 4d1135e4 | bellard | |
32 | 4d1135e4 | bellard | static void *call_start __init_call = NULL; |
33 | 4d1135e4 | bellard | |
34 | 4b74fe1f | bellard | #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
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35 | 4b74fe1f | bellard | |
36 | 4d1135e4 | bellard | #define OP add
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37 | 4d1135e4 | bellard | #include "test-i386.h" |
38 | 4d1135e4 | bellard | |
39 | 4d1135e4 | bellard | #define OP sub
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40 | 4d1135e4 | bellard | #include "test-i386.h" |
41 | 4d1135e4 | bellard | |
42 | 4d1135e4 | bellard | #define OP xor
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43 | 4d1135e4 | bellard | #include "test-i386.h" |
44 | 4d1135e4 | bellard | |
45 | 4d1135e4 | bellard | #define OP and
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46 | 4d1135e4 | bellard | #include "test-i386.h" |
47 | 4d1135e4 | bellard | |
48 | 4d1135e4 | bellard | #define OP or
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49 | 4d1135e4 | bellard | #include "test-i386.h" |
50 | 4d1135e4 | bellard | |
51 | 4d1135e4 | bellard | #define OP cmp
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52 | 4d1135e4 | bellard | #include "test-i386.h" |
53 | 4d1135e4 | bellard | |
54 | 4d1135e4 | bellard | #define OP adc
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55 | 4d1135e4 | bellard | #define OP_CC
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56 | 4d1135e4 | bellard | #include "test-i386.h" |
57 | 4d1135e4 | bellard | |
58 | 4d1135e4 | bellard | #define OP sbb
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59 | 4d1135e4 | bellard | #define OP_CC
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60 | 4d1135e4 | bellard | #include "test-i386.h" |
61 | 4d1135e4 | bellard | |
62 | 4d1135e4 | bellard | #define OP inc
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63 | 4d1135e4 | bellard | #define OP_CC
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64 | 4d1135e4 | bellard | #define OP1
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65 | 4d1135e4 | bellard | #include "test-i386.h" |
66 | 4d1135e4 | bellard | |
67 | 4d1135e4 | bellard | #define OP dec
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68 | 4d1135e4 | bellard | #define OP_CC
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69 | 4d1135e4 | bellard | #define OP1
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70 | 4d1135e4 | bellard | #include "test-i386.h" |
71 | 4d1135e4 | bellard | |
72 | 4d1135e4 | bellard | #define OP neg
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73 | 4d1135e4 | bellard | #define OP_CC
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74 | 4d1135e4 | bellard | #define OP1
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75 | 4d1135e4 | bellard | #include "test-i386.h" |
76 | 4d1135e4 | bellard | |
77 | 4d1135e4 | bellard | #define OP not
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78 | 4d1135e4 | bellard | #define OP_CC
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79 | 4d1135e4 | bellard | #define OP1
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80 | 4d1135e4 | bellard | #include "test-i386.h" |
81 | 4d1135e4 | bellard | |
82 | 4b74fe1f | bellard | #undef CC_MASK
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83 | 4b74fe1f | bellard | #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
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84 | 4b74fe1f | bellard | |
85 | 379ca80d | bellard | #define OP shl
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86 | 379ca80d | bellard | #include "test-i386-shift.h" |
87 | 379ca80d | bellard | |
88 | 379ca80d | bellard | #define OP shr
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89 | 379ca80d | bellard | #include "test-i386-shift.h" |
90 | 379ca80d | bellard | |
91 | 379ca80d | bellard | #define OP sar
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92 | 379ca80d | bellard | #include "test-i386-shift.h" |
93 | 379ca80d | bellard | |
94 | 379ca80d | bellard | #define OP rol
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95 | 379ca80d | bellard | #include "test-i386-shift.h" |
96 | 379ca80d | bellard | |
97 | 379ca80d | bellard | #define OP ror
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98 | 379ca80d | bellard | #include "test-i386-shift.h" |
99 | 379ca80d | bellard | |
100 | 379ca80d | bellard | #define OP rcr
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101 | 379ca80d | bellard | #define OP_CC
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102 | 379ca80d | bellard | #include "test-i386-shift.h" |
103 | 379ca80d | bellard | |
104 | 379ca80d | bellard | #define OP rcl
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105 | 379ca80d | bellard | #define OP_CC
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106 | 379ca80d | bellard | #include "test-i386-shift.h" |
107 | 379ca80d | bellard | |
108 | d57c4e01 | bellard | #define OP shld
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109 | d57c4e01 | bellard | #define OP_SHIFTD
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110 | d57c4e01 | bellard | #define OP_NOBYTE
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111 | d57c4e01 | bellard | #include "test-i386-shift.h" |
112 | d57c4e01 | bellard | |
113 | d57c4e01 | bellard | #define OP shrd
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114 | d57c4e01 | bellard | #define OP_SHIFTD
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115 | d57c4e01 | bellard | #define OP_NOBYTE
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116 | d57c4e01 | bellard | #include "test-i386-shift.h" |
117 | d57c4e01 | bellard | |
118 | d57c4e01 | bellard | /* XXX: should be more precise ? */
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119 | d57c4e01 | bellard | #undef CC_MASK
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120 | d57c4e01 | bellard | #define CC_MASK (CC_C)
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121 | d57c4e01 | bellard | |
122 | d57c4e01 | bellard | #define OP bt
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123 | d57c4e01 | bellard | #define OP_NOBYTE
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124 | d57c4e01 | bellard | #include "test-i386-shift.h" |
125 | d57c4e01 | bellard | |
126 | d57c4e01 | bellard | #define OP bts
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127 | d57c4e01 | bellard | #define OP_NOBYTE
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128 | d57c4e01 | bellard | #include "test-i386-shift.h" |
129 | d57c4e01 | bellard | |
130 | d57c4e01 | bellard | #define OP btr
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131 | d57c4e01 | bellard | #define OP_NOBYTE
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132 | d57c4e01 | bellard | #include "test-i386-shift.h" |
133 | d57c4e01 | bellard | |
134 | d57c4e01 | bellard | #define OP btc
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135 | d57c4e01 | bellard | #define OP_NOBYTE
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136 | d57c4e01 | bellard | #include "test-i386-shift.h" |
137 | 379ca80d | bellard | |
138 | 4d1135e4 | bellard | /* lea test (modrm support) */
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139 | 4d1135e4 | bellard | #define TEST_LEA(STR)\
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140 | 4d1135e4 | bellard | {\ |
141 | 4d1135e4 | bellard | asm("leal " STR ", %0"\ |
142 | 4d1135e4 | bellard | : "=r" (res)\
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143 | 4d1135e4 | bellard | : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\ |
144 | 4d1135e4 | bellard | printf("lea %s = %08x\n", STR, res);\
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145 | 4d1135e4 | bellard | } |
146 | 4d1135e4 | bellard | |
147 | 4d1135e4 | bellard | #define TEST_LEA16(STR)\
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148 | 4d1135e4 | bellard | {\ |
149 | 4d1135e4 | bellard | asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\ |
150 | 4d1135e4 | bellard | : "=wq" (res)\
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151 | 4d1135e4 | bellard | : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\ |
152 | 4d1135e4 | bellard | printf("lea %s = %08x\n", STR, res);\
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153 | 4d1135e4 | bellard | } |
154 | 4d1135e4 | bellard | |
155 | 4d1135e4 | bellard | |
156 | 4d1135e4 | bellard | void test_lea(void) |
157 | 4d1135e4 | bellard | { |
158 | 4d1135e4 | bellard | int eax, ebx, ecx, edx, esi, edi, res;
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159 | 4d1135e4 | bellard | eax = 0x0001;
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160 | 4d1135e4 | bellard | ebx = 0x0002;
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161 | 4d1135e4 | bellard | ecx = 0x0004;
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162 | 4d1135e4 | bellard | edx = 0x0008;
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163 | 4d1135e4 | bellard | esi = 0x0010;
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164 | 4d1135e4 | bellard | edi = 0x0020;
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165 | 4d1135e4 | bellard | |
166 | 4d1135e4 | bellard | TEST_LEA("0x4000");
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167 | 4d1135e4 | bellard | |
168 | 4d1135e4 | bellard | TEST_LEA("(%%eax)");
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169 | 4d1135e4 | bellard | TEST_LEA("(%%ebx)");
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170 | 4d1135e4 | bellard | TEST_LEA("(%%ecx)");
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171 | 4d1135e4 | bellard | TEST_LEA("(%%edx)");
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172 | 4d1135e4 | bellard | TEST_LEA("(%%esi)");
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173 | 4d1135e4 | bellard | TEST_LEA("(%%edi)");
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174 | 4d1135e4 | bellard | |
175 | 4d1135e4 | bellard | TEST_LEA("0x40(%%eax)");
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176 | 4d1135e4 | bellard | TEST_LEA("0x40(%%ebx)");
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177 | 4d1135e4 | bellard | TEST_LEA("0x40(%%ecx)");
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178 | 4d1135e4 | bellard | TEST_LEA("0x40(%%edx)");
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179 | 4d1135e4 | bellard | TEST_LEA("0x40(%%esi)");
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180 | 4d1135e4 | bellard | TEST_LEA("0x40(%%edi)");
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181 | 4d1135e4 | bellard | |
182 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%eax)");
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183 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%ebx)");
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184 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%ecx)");
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185 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%edx)");
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186 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%esi)");
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187 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%edi)");
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188 | 4d1135e4 | bellard | |
189 | 4d1135e4 | bellard | TEST_LEA("(%%eax, %%ecx)");
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190 | 4d1135e4 | bellard | TEST_LEA("(%%ebx, %%edx)");
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191 | 4d1135e4 | bellard | TEST_LEA("(%%ecx, %%ecx)");
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192 | 4d1135e4 | bellard | TEST_LEA("(%%edx, %%ecx)");
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193 | 4d1135e4 | bellard | TEST_LEA("(%%esi, %%ecx)");
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194 | 4d1135e4 | bellard | TEST_LEA("(%%edi, %%ecx)");
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195 | 4d1135e4 | bellard | |
196 | 4d1135e4 | bellard | TEST_LEA("0x40(%%eax, %%ecx)");
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197 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%ebx, %%edx)");
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198 | 4d1135e4 | bellard | |
199 | 4d1135e4 | bellard | TEST_LEA("(%%ecx, %%ecx, 2)");
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200 | 4d1135e4 | bellard | TEST_LEA("(%%edx, %%ecx, 4)");
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201 | 4d1135e4 | bellard | TEST_LEA("(%%esi, %%ecx, 8)");
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202 | 4d1135e4 | bellard | |
203 | 4d1135e4 | bellard | TEST_LEA("(,%%eax, 2)");
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204 | 4d1135e4 | bellard | TEST_LEA("(,%%ebx, 4)");
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205 | 4d1135e4 | bellard | TEST_LEA("(,%%ecx, 8)");
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206 | 4d1135e4 | bellard | |
207 | 4d1135e4 | bellard | TEST_LEA("0x40(,%%eax, 2)");
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208 | 4d1135e4 | bellard | TEST_LEA("0x40(,%%ebx, 4)");
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209 | 4d1135e4 | bellard | TEST_LEA("0x40(,%%ecx, 8)");
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210 | 4d1135e4 | bellard | |
211 | 4d1135e4 | bellard | |
212 | 4d1135e4 | bellard | TEST_LEA("-10(%%ecx, %%ecx, 2)");
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213 | 4d1135e4 | bellard | TEST_LEA("-10(%%edx, %%ecx, 4)");
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214 | 4d1135e4 | bellard | TEST_LEA("-10(%%esi, %%ecx, 8)");
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215 | 4d1135e4 | bellard | |
216 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
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217 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%edx, %%ecx, 4)");
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218 | 4d1135e4 | bellard | TEST_LEA("0x4000(%%esi, %%ecx, 8)");
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219 | 4d1135e4 | bellard | |
220 | 4d1135e4 | bellard | /* limited 16 bit addressing test */
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221 | 4d1135e4 | bellard | TEST_LEA16("0x4000");
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222 | 4d1135e4 | bellard | TEST_LEA16("(%%bx)");
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223 | 4d1135e4 | bellard | TEST_LEA16("(%%si)");
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224 | 4d1135e4 | bellard | TEST_LEA16("(%%di)");
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225 | 4d1135e4 | bellard | TEST_LEA16("0x40(%%bx)");
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226 | 4d1135e4 | bellard | TEST_LEA16("0x40(%%si)");
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227 | 4d1135e4 | bellard | TEST_LEA16("0x40(%%di)");
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228 | 4d1135e4 | bellard | TEST_LEA16("0x4000(%%bx)");
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229 | 4d1135e4 | bellard | TEST_LEA16("0x4000(%%si)");
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230 | 4d1135e4 | bellard | TEST_LEA16("(%%bx,%%si)");
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231 | 4d1135e4 | bellard | TEST_LEA16("(%%bx,%%di)");
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232 | 4d1135e4 | bellard | TEST_LEA16("0x40(%%bx,%%si)");
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233 | 4d1135e4 | bellard | TEST_LEA16("0x40(%%bx,%%di)");
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234 | 4d1135e4 | bellard | TEST_LEA16("0x4000(%%bx,%%si)");
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235 | 4d1135e4 | bellard | TEST_LEA16("0x4000(%%bx,%%di)");
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236 | 4d1135e4 | bellard | } |
237 | 4d1135e4 | bellard | |
238 | 4d1135e4 | bellard | #define TEST_JCC(JCC, v1, v2)\
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239 | 4d1135e4 | bellard | {\ |
240 | 5dd9488c | bellard | int res;\
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241 | 4d1135e4 | bellard | asm("movl $1, %0\n\t"\ |
242 | 4d1135e4 | bellard | "cmpl %2, %1\n\t"\
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243 | 5dd9488c | bellard | "j" JCC " 1f\n\t"\ |
244 | 4d1135e4 | bellard | "movl $0, %0\n\t"\
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245 | 4d1135e4 | bellard | "1:\n\t"\
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246 | 4d1135e4 | bellard | : "=r" (res)\
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247 | 4d1135e4 | bellard | : "r" (v1), "r" (v2));\ |
248 | 5dd9488c | bellard | printf("%-10s %d\n", "j" JCC, res);\ |
249 | 5dd9488c | bellard | \ |
250 | 5dd9488c | bellard | asm("movl $0, %0\n\t"\ |
251 | 5dd9488c | bellard | "cmpl %2, %1\n\t"\
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252 | 5dd9488c | bellard | "set" JCC " %b0\n\t"\ |
253 | 5dd9488c | bellard | : "=r" (res)\
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254 | 5dd9488c | bellard | : "r" (v1), "r" (v2));\ |
255 | 5dd9488c | bellard | printf("%-10s %d\n", "set" JCC, res);\ |
256 | 5dd9488c | bellard | if (TEST_CMOV) {\
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257 | 5dd9488c | bellard | asm("movl $0x12345678, %0\n\t"\ |
258 | 5dd9488c | bellard | "cmpl %2, %1\n\t"\
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259 | 5dd9488c | bellard | "cmov" JCC "l %3, %0\n\t"\ |
260 | 5dd9488c | bellard | : "=r" (res)\
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261 | 5dd9488c | bellard | : "r" (v1), "r" (v2), "m" (1));\ |
262 | 5dd9488c | bellard | printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\ |
263 | 5dd9488c | bellard | asm("movl $0x12345678, %0\n\t"\ |
264 | 5dd9488c | bellard | "cmpl %2, %1\n\t"\
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265 | 5dd9488c | bellard | "cmov" JCC "w %w3, %w0\n\t"\ |
266 | 5dd9488c | bellard | : "=r" (res)\
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267 | 5dd9488c | bellard | : "r" (v1), "r" (v2), "r" (1));\ |
268 | 5dd9488c | bellard | printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\ |
269 | 5dd9488c | bellard | } \ |
270 | 4d1135e4 | bellard | } |
271 | 4d1135e4 | bellard | |
272 | 4d1135e4 | bellard | /* various jump tests */
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273 | 4d1135e4 | bellard | void test_jcc(void) |
274 | 4d1135e4 | bellard | { |
275 | 5dd9488c | bellard | TEST_JCC("ne", 1, 1); |
276 | 5dd9488c | bellard | TEST_JCC("ne", 1, 0); |
277 | 4d1135e4 | bellard | |
278 | 5dd9488c | bellard | TEST_JCC("e", 1, 1); |
279 | 5dd9488c | bellard | TEST_JCC("e", 1, 0); |
280 | 4d1135e4 | bellard | |
281 | 5dd9488c | bellard | TEST_JCC("l", 1, 1); |
282 | 5dd9488c | bellard | TEST_JCC("l", 1, 0); |
283 | 5dd9488c | bellard | TEST_JCC("l", 1, -1); |
284 | 4d1135e4 | bellard | |
285 | 5dd9488c | bellard | TEST_JCC("le", 1, 1); |
286 | 5dd9488c | bellard | TEST_JCC("le", 1, 0); |
287 | 5dd9488c | bellard | TEST_JCC("le", 1, -1); |
288 | 4d1135e4 | bellard | |
289 | 5dd9488c | bellard | TEST_JCC("ge", 1, 1); |
290 | 5dd9488c | bellard | TEST_JCC("ge", 1, 0); |
291 | 5dd9488c | bellard | TEST_JCC("ge", -1, 1); |
292 | 4d1135e4 | bellard | |
293 | 5dd9488c | bellard | TEST_JCC("g", 1, 1); |
294 | 5dd9488c | bellard | TEST_JCC("g", 1, 0); |
295 | 5dd9488c | bellard | TEST_JCC("g", 1, -1); |
296 | 4d1135e4 | bellard | |
297 | 5dd9488c | bellard | TEST_JCC("b", 1, 1); |
298 | 5dd9488c | bellard | TEST_JCC("b", 1, 0); |
299 | 5dd9488c | bellard | TEST_JCC("b", 1, -1); |
300 | 4d1135e4 | bellard | |
301 | 5dd9488c | bellard | TEST_JCC("be", 1, 1); |
302 | 5dd9488c | bellard | TEST_JCC("be", 1, 0); |
303 | 5dd9488c | bellard | TEST_JCC("be", 1, -1); |
304 | 4d1135e4 | bellard | |
305 | 5dd9488c | bellard | TEST_JCC("ae", 1, 1); |
306 | 5dd9488c | bellard | TEST_JCC("ae", 1, 0); |
307 | 5dd9488c | bellard | TEST_JCC("ae", 1, -1); |
308 | 4d1135e4 | bellard | |
309 | 5dd9488c | bellard | TEST_JCC("a", 1, 1); |
310 | 5dd9488c | bellard | TEST_JCC("a", 1, 0); |
311 | 5dd9488c | bellard | TEST_JCC("a", 1, -1); |
312 | 4d1135e4 | bellard | |
313 | 4d1135e4 | bellard | |
314 | 5dd9488c | bellard | TEST_JCC("p", 1, 1); |
315 | 5dd9488c | bellard | TEST_JCC("p", 1, 0); |
316 | 4d1135e4 | bellard | |
317 | 5dd9488c | bellard | TEST_JCC("np", 1, 1); |
318 | 5dd9488c | bellard | TEST_JCC("np", 1, 0); |
319 | 4d1135e4 | bellard | |
320 | 5dd9488c | bellard | TEST_JCC("o", 0x7fffffff, 0); |
321 | 5dd9488c | bellard | TEST_JCC("o", 0x7fffffff, -1); |
322 | 4d1135e4 | bellard | |
323 | 5dd9488c | bellard | TEST_JCC("no", 0x7fffffff, 0); |
324 | 5dd9488c | bellard | TEST_JCC("no", 0x7fffffff, -1); |
325 | 4d1135e4 | bellard | |
326 | 5dd9488c | bellard | TEST_JCC("s", 0, 1); |
327 | 5dd9488c | bellard | TEST_JCC("s", 0, -1); |
328 | 5dd9488c | bellard | TEST_JCC("s", 0, 0); |
329 | 4d1135e4 | bellard | |
330 | 5dd9488c | bellard | TEST_JCC("ns", 0, 1); |
331 | 5dd9488c | bellard | TEST_JCC("ns", 0, -1); |
332 | 5dd9488c | bellard | TEST_JCC("ns", 0, 0); |
333 | 4d1135e4 | bellard | } |
334 | 4d1135e4 | bellard | |
335 | 4b74fe1f | bellard | #undef CC_MASK
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336 | 4b74fe1f | bellard | #define CC_MASK (CC_O | CC_C)
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337 | 4b74fe1f | bellard | |
338 | 4b74fe1f | bellard | #define OP mul
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339 | 4b74fe1f | bellard | #include "test-i386-muldiv.h" |
340 | 4b74fe1f | bellard | |
341 | 4b74fe1f | bellard | #define OP imul
|
342 | 4b74fe1f | bellard | #include "test-i386-muldiv.h" |
343 | 4b74fe1f | bellard | |
344 | 4b74fe1f | bellard | #undef CC_MASK
|
345 | 4b74fe1f | bellard | #define CC_MASK (0) |
346 | 4b74fe1f | bellard | |
347 | 4b74fe1f | bellard | #define OP div
|
348 | 4b74fe1f | bellard | #include "test-i386-muldiv.h" |
349 | 4b74fe1f | bellard | |
350 | 4b74fe1f | bellard | #define OP idiv
|
351 | 4b74fe1f | bellard | #include "test-i386-muldiv.h" |
352 | 4b74fe1f | bellard | |
353 | 4b74fe1f | bellard | void test_imulw2(int op0, int op1) |
354 | 4b74fe1f | bellard | { |
355 | 4b74fe1f | bellard | int res, s1, s0, flags;
|
356 | 4b74fe1f | bellard | s0 = op0; |
357 | 4b74fe1f | bellard | s1 = op1; |
358 | 4b74fe1f | bellard | res = s0; |
359 | 4b74fe1f | bellard | flags = 0;
|
360 | 4b74fe1f | bellard | asm ("push %4\n\t" |
361 | 4b74fe1f | bellard | "popf\n\t"
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362 | 4b74fe1f | bellard | "imulw %w2, %w0\n\t"
|
363 | 4b74fe1f | bellard | "pushf\n\t"
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364 | 4b74fe1f | bellard | "popl %1\n\t"
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365 | 4b74fe1f | bellard | : "=q" (res), "=g" (flags) |
366 | 4b74fe1f | bellard | : "q" (s1), "0" (res), "1" (flags)); |
367 | 4b74fe1f | bellard | printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
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368 | 4b74fe1f | bellard | "imulw", s0, s1, res, flags & CC_MASK);
|
369 | 4b74fe1f | bellard | } |
370 | 4b74fe1f | bellard | |
371 | 4b74fe1f | bellard | void test_imull2(int op0, int op1) |
372 | 4b74fe1f | bellard | { |
373 | 4b74fe1f | bellard | int res, s1, s0, flags;
|
374 | 4b74fe1f | bellard | s0 = op0; |
375 | 4b74fe1f | bellard | s1 = op1; |
376 | 4b74fe1f | bellard | res = s0; |
377 | 4b74fe1f | bellard | flags = 0;
|
378 | 4b74fe1f | bellard | asm ("push %4\n\t" |
379 | 4b74fe1f | bellard | "popf\n\t"
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380 | 4b74fe1f | bellard | "imull %2, %0\n\t"
|
381 | 4b74fe1f | bellard | "pushf\n\t"
|
382 | 4b74fe1f | bellard | "popl %1\n\t"
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383 | 4b74fe1f | bellard | : "=q" (res), "=g" (flags) |
384 | 4b74fe1f | bellard | : "q" (s1), "0" (res), "1" (flags)); |
385 | 4b74fe1f | bellard | printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
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386 | 4b74fe1f | bellard | "imull", s0, s1, res, flags & CC_MASK);
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387 | 4b74fe1f | bellard | } |
388 | 4b74fe1f | bellard | |
389 | 4b74fe1f | bellard | void test_mul(void) |
390 | 4b74fe1f | bellard | { |
391 | 4b74fe1f | bellard | test_imulb(0x1234561d, 4); |
392 | 4b74fe1f | bellard | test_imulb(3, -4); |
393 | 4b74fe1f | bellard | test_imulb(0x80, 0x80); |
394 | 4b74fe1f | bellard | test_imulb(0x10, 0x10); |
395 | 4b74fe1f | bellard | |
396 | 4b74fe1f | bellard | test_imulw(0, 0x1234001d, 45); |
397 | 4b74fe1f | bellard | test_imulw(0, 23, -45); |
398 | 4b74fe1f | bellard | test_imulw(0, 0x8000, 0x8000); |
399 | 4b74fe1f | bellard | test_imulw(0, 0x100, 0x100); |
400 | 4b74fe1f | bellard | |
401 | 4b74fe1f | bellard | test_imull(0, 0x1234001d, 45); |
402 | 4b74fe1f | bellard | test_imull(0, 23, -45); |
403 | 4b74fe1f | bellard | test_imull(0, 0x80000000, 0x80000000); |
404 | 4b74fe1f | bellard | test_imull(0, 0x10000, 0x10000); |
405 | 4b74fe1f | bellard | |
406 | 4b74fe1f | bellard | test_mulb(0x1234561d, 4); |
407 | 4b74fe1f | bellard | test_mulb(3, -4); |
408 | 4b74fe1f | bellard | test_mulb(0x80, 0x80); |
409 | 4b74fe1f | bellard | test_mulb(0x10, 0x10); |
410 | 4b74fe1f | bellard | |
411 | 4b74fe1f | bellard | test_mulw(0, 0x1234001d, 45); |
412 | 4b74fe1f | bellard | test_mulw(0, 23, -45); |
413 | 4b74fe1f | bellard | test_mulw(0, 0x8000, 0x8000); |
414 | 4b74fe1f | bellard | test_mulw(0, 0x100, 0x100); |
415 | 4b74fe1f | bellard | |
416 | 4b74fe1f | bellard | test_mull(0, 0x1234001d, 45); |
417 | 4b74fe1f | bellard | test_mull(0, 23, -45); |
418 | 4b74fe1f | bellard | test_mull(0, 0x80000000, 0x80000000); |
419 | 4b74fe1f | bellard | test_mull(0, 0x10000, 0x10000); |
420 | 4b74fe1f | bellard | |
421 | 4b74fe1f | bellard | test_imulw2(0x1234001d, 45); |
422 | 4b74fe1f | bellard | test_imulw2(23, -45); |
423 | 4b74fe1f | bellard | test_imulw2(0x8000, 0x8000); |
424 | 4b74fe1f | bellard | test_imulw2(0x100, 0x100); |
425 | 4b74fe1f | bellard | |
426 | 4b74fe1f | bellard | test_imull2(0x1234001d, 45); |
427 | 4b74fe1f | bellard | test_imull2(23, -45); |
428 | 4b74fe1f | bellard | test_imull2(0x80000000, 0x80000000); |
429 | 4b74fe1f | bellard | test_imull2(0x10000, 0x10000); |
430 | 4b74fe1f | bellard | |
431 | 4b74fe1f | bellard | test_idivb(0x12341678, 0x127e); |
432 | 4b74fe1f | bellard | test_idivb(0x43210123, -5); |
433 | 4b74fe1f | bellard | test_idivb(0x12340004, -1); |
434 | 4b74fe1f | bellard | |
435 | 4b74fe1f | bellard | test_idivw(0, 0x12345678, 12347); |
436 | 4b74fe1f | bellard | test_idivw(0, -23223, -45); |
437 | 4b74fe1f | bellard | test_idivw(0, 0x12348000, -1); |
438 | 4b74fe1f | bellard | test_idivw(0x12343, 0x12345678, 0x81238567); |
439 | 4b74fe1f | bellard | |
440 | 4b74fe1f | bellard | test_idivl(0, 0x12345678, 12347); |
441 | 4b74fe1f | bellard | test_idivl(0, -233223, -45); |
442 | 4b74fe1f | bellard | test_idivl(0, 0x80000000, -1); |
443 | 4b74fe1f | bellard | test_idivl(0x12343, 0x12345678, 0x81234567); |
444 | 4b74fe1f | bellard | |
445 | 4b74fe1f | bellard | test_divb(0x12341678, 0x127e); |
446 | 4b74fe1f | bellard | test_divb(0x43210123, -5); |
447 | 4b74fe1f | bellard | test_divb(0x12340004, -1); |
448 | 4b74fe1f | bellard | |
449 | 4b74fe1f | bellard | test_divw(0, 0x12345678, 12347); |
450 | 4b74fe1f | bellard | test_divw(0, -23223, -45); |
451 | 4b74fe1f | bellard | test_divw(0, 0x12348000, -1); |
452 | 4b74fe1f | bellard | test_divw(0x12343, 0x12345678, 0x81238567); |
453 | 4b74fe1f | bellard | |
454 | 4b74fe1f | bellard | test_divl(0, 0x12345678, 12347); |
455 | 4b74fe1f | bellard | test_divl(0, -233223, -45); |
456 | 4b74fe1f | bellard | test_divl(0, 0x80000000, -1); |
457 | 4b74fe1f | bellard | test_divl(0x12343, 0x12345678, 0x81234567); |
458 | 4b74fe1f | bellard | } |
459 | 4b74fe1f | bellard | |
460 | 9d8e9c09 | bellard | #define TEST_BSX(op, size, op0)\
|
461 | 9d8e9c09 | bellard | {\ |
462 | 9d8e9c09 | bellard | int res, val, resz;\
|
463 | 9d8e9c09 | bellard | val = op0;\ |
464 | 9d8e9c09 | bellard | asm("xorl %1, %1 ; " #op " %" size "2, %" size "0 ; setz %b1" \ |
465 | 9d8e9c09 | bellard | : "=r" (res), "=q" (resz)\ |
466 | 9d8e9c09 | bellard | : "g" (val));\
|
467 | 9d8e9c09 | bellard | printf("%-10s A=%08x R=%08x %d\n", #op, val, resz ? 0 : res, resz);\ |
468 | 9d8e9c09 | bellard | } |
469 | 9d8e9c09 | bellard | |
470 | 9d8e9c09 | bellard | void test_bsx(void) |
471 | 9d8e9c09 | bellard | { |
472 | 9d8e9c09 | bellard | TEST_BSX(bsrw, "w", 0); |
473 | 9d8e9c09 | bellard | TEST_BSX(bsrw, "w", 0x12340128); |
474 | 9d8e9c09 | bellard | TEST_BSX(bsrl, "", 0); |
475 | 9d8e9c09 | bellard | TEST_BSX(bsrl, "", 0x00340128); |
476 | 9d8e9c09 | bellard | TEST_BSX(bsfw, "w", 0); |
477 | 9d8e9c09 | bellard | TEST_BSX(bsfw, "w", 0x12340128); |
478 | 9d8e9c09 | bellard | TEST_BSX(bsfl, "", 0); |
479 | 9d8e9c09 | bellard | TEST_BSX(bsfl, "", 0x00340128); |
480 | 9d8e9c09 | bellard | } |
481 | 9d8e9c09 | bellard | |
482 | 55480af8 | bellard | /**********************************************/
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483 | 55480af8 | bellard | |
484 | 9d8e9c09 | bellard | void test_fops(double a, double b) |
485 | 9d8e9c09 | bellard | { |
486 | 9d8e9c09 | bellard | printf("a=%f b=%f a+b=%f\n", a, b, a + b);
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487 | 9d8e9c09 | bellard | printf("a=%f b=%f a-b=%f\n", a, b, a - b);
|
488 | 9d8e9c09 | bellard | printf("a=%f b=%f a*b=%f\n", a, b, a * b);
|
489 | 9d8e9c09 | bellard | printf("a=%f b=%f a/b=%f\n", a, b, a / b);
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490 | 9d8e9c09 | bellard | printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
|
491 | 9d8e9c09 | bellard | printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
|
492 | 9d8e9c09 | bellard | printf("a=%f sin(a)=%f\n", a, sin(a));
|
493 | 9d8e9c09 | bellard | printf("a=%f cos(a)=%f\n", a, cos(a));
|
494 | 9d8e9c09 | bellard | printf("a=%f tan(a)=%f\n", a, tan(a));
|
495 | 9d8e9c09 | bellard | printf("a=%f log(a)=%f\n", a, log(a));
|
496 | 9d8e9c09 | bellard | printf("a=%f exp(a)=%f\n", a, exp(a));
|
497 | 9d8e9c09 | bellard | printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
|
498 | 9d8e9c09 | bellard | /* just to test some op combining */
|
499 | 9d8e9c09 | bellard | printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
|
500 | 9d8e9c09 | bellard | printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
|
501 | 9d8e9c09 | bellard | printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
|
502 | 9d8e9c09 | bellard | |
503 | 9d8e9c09 | bellard | } |
504 | 9d8e9c09 | bellard | |
505 | 9d8e9c09 | bellard | void test_fcmp(double a, double b) |
506 | 9d8e9c09 | bellard | { |
507 | 9d8e9c09 | bellard | printf("(%f<%f)=%d\n",
|
508 | 9d8e9c09 | bellard | a, b, a < b); |
509 | 9d8e9c09 | bellard | printf("(%f<=%f)=%d\n",
|
510 | 9d8e9c09 | bellard | a, b, a <= b); |
511 | 9d8e9c09 | bellard | printf("(%f==%f)=%d\n",
|
512 | 9d8e9c09 | bellard | a, b, a == b); |
513 | 9d8e9c09 | bellard | printf("(%f>%f)=%d\n",
|
514 | 9d8e9c09 | bellard | a, b, a > b); |
515 | 9d8e9c09 | bellard | printf("(%f<=%f)=%d\n",
|
516 | 9d8e9c09 | bellard | a, b, a >= b); |
517 | 03bfca94 | bellard | if (TEST_FCOMI) {
|
518 | 03bfca94 | bellard | unsigned int eflags; |
519 | 03bfca94 | bellard | /* test f(u)comi instruction */
|
520 | 03bfca94 | bellard | asm("fcomi %2, %1\n" |
521 | 03bfca94 | bellard | "pushf\n"
|
522 | 03bfca94 | bellard | "pop %0\n"
|
523 | 03bfca94 | bellard | : "=r" (eflags)
|
524 | 03bfca94 | bellard | : "t" (a), "u" (b)); |
525 | 03bfca94 | bellard | printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
|
526 | 03bfca94 | bellard | } |
527 | 9d8e9c09 | bellard | } |
528 | 9d8e9c09 | bellard | |
529 | 9d8e9c09 | bellard | void test_fcvt(double a) |
530 | 9d8e9c09 | bellard | { |
531 | 9d8e9c09 | bellard | float fa;
|
532 | 9d8e9c09 | bellard | long double la; |
533 | ea768640 | bellard | int16_t fpuc; |
534 | ea768640 | bellard | int i;
|
535 | ea768640 | bellard | int64_t lla; |
536 | ea768640 | bellard | int ia;
|
537 | ea768640 | bellard | int16_t wa; |
538 | ea768640 | bellard | double ra;
|
539 | 9d8e9c09 | bellard | |
540 | 9d8e9c09 | bellard | fa = a; |
541 | 9d8e9c09 | bellard | la = a; |
542 | 9d8e9c09 | bellard | printf("(float)%f = %f\n", a, fa);
|
543 | 9d8e9c09 | bellard | printf("(long double)%f = %Lf\n", a, la);
|
544 | c5e9815d | bellard | printf("a=%016Lx\n", *(long long *)&a); |
545 | c5e9815d | bellard | printf("la=%016Lx %04x\n", *(long long *)&la, |
546 | c5e9815d | bellard | *(unsigned short *)((char *)(&la) + 8)); |
547 | ea768640 | bellard | |
548 | ea768640 | bellard | /* test all roundings */
|
549 | ea768640 | bellard | asm volatile ("fstcw %0" : "=m" (fpuc)); |
550 | ea768640 | bellard | for(i=0;i<4;i++) { |
551 | ea768640 | bellard | asm volatile ("fldcw %0" : : "m" ((fpuc & ~0x0c00) | (i << 10))); |
552 | ea768640 | bellard | asm volatile ("fist %0" : "=m" (wa) : "t" (a)); |
553 | ea768640 | bellard | asm volatile ("fistl %0" : "=m" (ia) : "t" (a)); |
554 | ea768640 | bellard | asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st"); |
555 | ea768640 | bellard | asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a)); |
556 | ea768640 | bellard | asm volatile ("fldcw %0" : : "m" (fpuc)); |
557 | ea768640 | bellard | printf("(short)a = %d\n", wa);
|
558 | ea768640 | bellard | printf("(int)a = %d\n", ia);
|
559 | ea768640 | bellard | printf("(int64_t)a = %Ld\n", lla);
|
560 | ea768640 | bellard | printf("rint(a) = %f\n", ra);
|
561 | ea768640 | bellard | } |
562 | 9d8e9c09 | bellard | } |
563 | 9d8e9c09 | bellard | |
564 | 9d8e9c09 | bellard | #define TEST(N) \
|
565 | 9d8e9c09 | bellard | asm("fld" #N : "=t" (a)); \ |
566 | 9d8e9c09 | bellard | printf("fld" #N "= %f\n", a); |
567 | 9d8e9c09 | bellard | |
568 | 9d8e9c09 | bellard | void test_fconst(void) |
569 | 9d8e9c09 | bellard | { |
570 | 9d8e9c09 | bellard | double a;
|
571 | 9d8e9c09 | bellard | TEST(1);
|
572 | 9d8e9c09 | bellard | TEST(l2t); |
573 | 9d8e9c09 | bellard | TEST(l2e); |
574 | 9d8e9c09 | bellard | TEST(pi); |
575 | 9d8e9c09 | bellard | TEST(lg2); |
576 | 9d8e9c09 | bellard | TEST(ln2); |
577 | 9d8e9c09 | bellard | TEST(z); |
578 | 9d8e9c09 | bellard | } |
579 | 9d8e9c09 | bellard | |
580 | c5e9815d | bellard | void test_fbcd(double a) |
581 | c5e9815d | bellard | { |
582 | c5e9815d | bellard | unsigned short bcd[5]; |
583 | c5e9815d | bellard | double b;
|
584 | c5e9815d | bellard | |
585 | c5e9815d | bellard | asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st"); |
586 | c5e9815d | bellard | asm("fbld %1" : "=t" (b) : "m" (bcd[0])); |
587 | c5e9815d | bellard | printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
|
588 | c5e9815d | bellard | a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b); |
589 | c5e9815d | bellard | } |
590 | c5e9815d | bellard | |
591 | 03bfca94 | bellard | #define TEST_ENV(env, prefix)\
|
592 | 03bfca94 | bellard | {\ |
593 | 03bfca94 | bellard | memset((env), 0xaa, sizeof(*(env)));\ |
594 | 03bfca94 | bellard | asm("fld1\n"\ |
595 | 03bfca94 | bellard | prefix "fnstenv %1\n"\
|
596 | 03bfca94 | bellard | prefix "fldenv %1\n"\
|
597 | e3e86d56 | bellard | : "=t" (res) : "m" (*(env)));\ |
598 | 03bfca94 | bellard | printf("res=%f\n", res);\
|
599 | 03bfca94 | bellard | printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
|
600 | 03bfca94 | bellard | (env)->fpuc,\ |
601 | 03bfca94 | bellard | (env)->fpus & 0xff00,\
|
602 | 03bfca94 | bellard | (env)->fptag);\ |
603 | 03bfca94 | bellard | memset((env), 0xaa, sizeof(*(env)));\ |
604 | 03bfca94 | bellard | asm("fld1\n"\ |
605 | 03bfca94 | bellard | prefix "fnsave %1\n"\
|
606 | 03bfca94 | bellard | prefix "frstor %1\n"\
|
607 | e3e86d56 | bellard | : "=t" (res) : "m" (*(env)));\ |
608 | 03bfca94 | bellard | printf("res=%f\n", res);\
|
609 | 03bfca94 | bellard | printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
|
610 | 03bfca94 | bellard | (env)->fpuc,\ |
611 | 03bfca94 | bellard | (env)->fpus & 0xff00,\
|
612 | 03bfca94 | bellard | (env)->fptag);\ |
613 | 03bfca94 | bellard | printf("ST(0) = %Lf\n",\
|
614 | 03bfca94 | bellard | (env)->fpregs[0]);\
|
615 | 03bfca94 | bellard | } |
616 | 03bfca94 | bellard | |
617 | 03bfca94 | bellard | void test_fenv(void) |
618 | 03bfca94 | bellard | { |
619 | 03bfca94 | bellard | struct __attribute__((packed)) {
|
620 | 03bfca94 | bellard | uint16_t fpuc; |
621 | 03bfca94 | bellard | uint16_t dummy1; |
622 | 03bfca94 | bellard | uint16_t fpus; |
623 | 03bfca94 | bellard | uint16_t dummy2; |
624 | 03bfca94 | bellard | uint16_t fptag; |
625 | 03bfca94 | bellard | uint16_t dummy3; |
626 | 03bfca94 | bellard | uint32_t ignored[4];
|
627 | 03bfca94 | bellard | long double fpregs[8]; |
628 | 03bfca94 | bellard | } float_env32; |
629 | 03bfca94 | bellard | struct __attribute__((packed)) {
|
630 | 03bfca94 | bellard | uint16_t fpuc; |
631 | 03bfca94 | bellard | uint16_t fpus; |
632 | 03bfca94 | bellard | uint16_t fptag; |
633 | 03bfca94 | bellard | uint16_t ignored[4];
|
634 | 03bfca94 | bellard | long double fpregs[8]; |
635 | 03bfca94 | bellard | } float_env16; |
636 | 03bfca94 | bellard | double res;
|
637 | 03bfca94 | bellard | |
638 | 03bfca94 | bellard | TEST_ENV(&float_env16, "data16 ");
|
639 | 03bfca94 | bellard | TEST_ENV(&float_env32, "");
|
640 | 03bfca94 | bellard | } |
641 | 03bfca94 | bellard | |
642 | 9d8e9c09 | bellard | void test_floats(void) |
643 | 9d8e9c09 | bellard | { |
644 | 9d8e9c09 | bellard | test_fops(2, 3); |
645 | 9d8e9c09 | bellard | test_fops(1.4, -5); |
646 | 9d8e9c09 | bellard | test_fcmp(2, -1); |
647 | 9d8e9c09 | bellard | test_fcmp(2, 2); |
648 | 9d8e9c09 | bellard | test_fcmp(2, 3); |
649 | ea768640 | bellard | test_fcvt(0.5); |
650 | ea768640 | bellard | test_fcvt(-0.5); |
651 | 9d8e9c09 | bellard | test_fcvt(1.0/7.0); |
652 | 9d8e9c09 | bellard | test_fcvt(-1.0/9.0); |
653 | ea768640 | bellard | test_fcvt(32768);
|
654 | ea768640 | bellard | test_fcvt(-1e20);
|
655 | 9d8e9c09 | bellard | test_fconst(); |
656 | c5e9815d | bellard | test_fbcd(1234567890123456);
|
657 | c5e9815d | bellard | test_fbcd(-123451234567890);
|
658 | 03bfca94 | bellard | test_fenv(); |
659 | 9d8e9c09 | bellard | } |
660 | 4b74fe1f | bellard | |
661 | 55480af8 | bellard | /**********************************************/
|
662 | 55480af8 | bellard | |
663 | 55480af8 | bellard | #define TEST_BCD(op, op0, cc_in, cc_mask)\
|
664 | 55480af8 | bellard | {\ |
665 | 55480af8 | bellard | int res, flags;\
|
666 | 55480af8 | bellard | res = op0;\ |
667 | 55480af8 | bellard | flags = cc_in;\ |
668 | 55480af8 | bellard | asm ("push %3\n\t"\ |
669 | 55480af8 | bellard | "popf\n\t"\
|
670 | 55480af8 | bellard | #op "\n\t"\ |
671 | 55480af8 | bellard | "pushf\n\t"\
|
672 | 55480af8 | bellard | "popl %1\n\t"\
|
673 | 55480af8 | bellard | : "=a" (res), "=g" (flags)\ |
674 | 55480af8 | bellard | : "0" (res), "1" (flags));\ |
675 | 55480af8 | bellard | printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
|
676 | 55480af8 | bellard | #op, op0, res, cc_in, flags & cc_mask);\
|
677 | 55480af8 | bellard | } |
678 | 55480af8 | bellard | |
679 | 55480af8 | bellard | void test_bcd(void) |
680 | 55480af8 | bellard | { |
681 | 55480af8 | bellard | TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
682 | 55480af8 | bellard | TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
683 | 55480af8 | bellard | TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
684 | 55480af8 | bellard | TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
685 | 55480af8 | bellard | TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
686 | 55480af8 | bellard | TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
687 | 55480af8 | bellard | TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
688 | 55480af8 | bellard | TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A)); |
689 | 55480af8 | bellard | TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A)); |
690 | 55480af8 | bellard | TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
691 | 55480af8 | bellard | TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
692 | 55480af8 | bellard | TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
693 | 55480af8 | bellard | TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
694 | 55480af8 | bellard | |
695 | 55480af8 | bellard | TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
696 | 55480af8 | bellard | TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
697 | 55480af8 | bellard | TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
698 | 55480af8 | bellard | TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
699 | 55480af8 | bellard | TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
700 | 55480af8 | bellard | TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
701 | 55480af8 | bellard | TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
702 | 55480af8 | bellard | TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A)); |
703 | 55480af8 | bellard | TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A)); |
704 | 55480af8 | bellard | TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
705 | 55480af8 | bellard | TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
706 | 55480af8 | bellard | TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
707 | 55480af8 | bellard | TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
|
708 | 55480af8 | bellard | |
709 | 55480af8 | bellard | TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
|
710 | 55480af8 | bellard | TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
|
711 | 55480af8 | bellard | TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
|
712 | 55480af8 | bellard | TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
|
713 | 55480af8 | bellard | TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A)); |
714 | 55480af8 | bellard | TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A)); |
715 | 55480af8 | bellard | TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A)); |
716 | 55480af8 | bellard | TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A)); |
717 | 55480af8 | bellard | |
718 | 55480af8 | bellard | TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
|
719 | 55480af8 | bellard | TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
|
720 | 55480af8 | bellard | TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
|
721 | 55480af8 | bellard | TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
|
722 | 55480af8 | bellard | TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A)); |
723 | 55480af8 | bellard | TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A)); |
724 | 55480af8 | bellard | TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A)); |
725 | 55480af8 | bellard | TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A)); |
726 | 55480af8 | bellard | |
727 | 55480af8 | bellard | TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
|
728 | 55480af8 | bellard | TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
|
729 | 55480af8 | bellard | } |
730 | 55480af8 | bellard | |
731 | e5918247 | bellard | #define TEST_XCHG(op, size, opconst)\
|
732 | e5918247 | bellard | {\ |
733 | e5918247 | bellard | int op0, op1;\
|
734 | e5918247 | bellard | op0 = 0x12345678;\
|
735 | e5918247 | bellard | op1 = 0xfbca7654;\
|
736 | e5918247 | bellard | asm(#op " %" size "0, %" size "1" \ |
737 | e5918247 | bellard | : "=q" (op0), opconst (op1) \
|
738 | e5918247 | bellard | : "0" (op0), "1" (op1));\ |
739 | e5918247 | bellard | printf("%-10s A=%08x B=%08x\n",\
|
740 | e5918247 | bellard | #op, op0, op1);\
|
741 | e5918247 | bellard | } |
742 | e5918247 | bellard | |
743 | e5918247 | bellard | #define TEST_CMPXCHG(op, size, opconst, eax)\
|
744 | e5918247 | bellard | {\ |
745 | e5918247 | bellard | int op0, op1;\
|
746 | e5918247 | bellard | op0 = 0x12345678;\
|
747 | e5918247 | bellard | op1 = 0xfbca7654;\
|
748 | e5918247 | bellard | asm(#op " %" size "0, %" size "1" \ |
749 | e5918247 | bellard | : "=q" (op0), opconst (op1) \
|
750 | e5918247 | bellard | : "0" (op0), "1" (op1), "a" (eax));\ |
751 | e5918247 | bellard | printf("%-10s EAX=%08x A=%08x C=%08x\n",\
|
752 | e5918247 | bellard | #op, eax, op0, op1);\
|
753 | e5918247 | bellard | } |
754 | e5918247 | bellard | |
755 | e5918247 | bellard | void test_xchg(void) |
756 | e5918247 | bellard | { |
757 | e5918247 | bellard | TEST_XCHG(xchgl, "", "=q"); |
758 | e5918247 | bellard | TEST_XCHG(xchgw, "w", "=q"); |
759 | e5918247 | bellard | TEST_XCHG(xchgb, "b", "=q"); |
760 | e5918247 | bellard | |
761 | e5918247 | bellard | TEST_XCHG(xchgl, "", "=m"); |
762 | e5918247 | bellard | TEST_XCHG(xchgw, "w", "=m"); |
763 | e5918247 | bellard | TEST_XCHG(xchgb, "b", "=m"); |
764 | e5918247 | bellard | |
765 | e5918247 | bellard | TEST_XCHG(xaddl, "", "=q"); |
766 | e5918247 | bellard | TEST_XCHG(xaddw, "w", "=q"); |
767 | e5918247 | bellard | TEST_XCHG(xaddb, "b", "=q"); |
768 | e5918247 | bellard | |
769 | e5918247 | bellard | TEST_XCHG(xaddl, "", "=m"); |
770 | e5918247 | bellard | TEST_XCHG(xaddw, "w", "=m"); |
771 | e5918247 | bellard | TEST_XCHG(xaddb, "b", "=m"); |
772 | e5918247 | bellard | |
773 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654); |
774 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654); |
775 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654); |
776 | e5918247 | bellard | |
777 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc); |
778 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc); |
779 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc); |
780 | e5918247 | bellard | |
781 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654); |
782 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654); |
783 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654); |
784 | e5918247 | bellard | |
785 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc); |
786 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc); |
787 | e5918247 | bellard | TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc); |
788 | e5918247 | bellard | } |
789 | e5918247 | bellard | |
790 | 6dbad63e | bellard | /**********************************************/
|
791 | 6dbad63e | bellard | /* segmentation tests */
|
792 | 6dbad63e | bellard | |
793 | 6dbad63e | bellard | #include <asm/ldt.h> |
794 | 6dbad63e | bellard | #include <linux/unistd.h> |
795 | 6dbad63e | bellard | |
796 | 6dbad63e | bellard | _syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount) |
797 | 6dbad63e | bellard | |
798 | 6dbad63e | bellard | uint8_t seg_data1[4096];
|
799 | 6dbad63e | bellard | uint8_t seg_data2[4096];
|
800 | 6dbad63e | bellard | |
801 | e5918247 | bellard | #define MK_SEL(n) (((n) << 3) | 7) |
802 | 6dbad63e | bellard | |
803 | 288426fe | bellard | #define TEST_LR(op, size, seg, mask)\
|
804 | 288426fe | bellard | {\ |
805 | 288426fe | bellard | int res, res2;\
|
806 | 288426fe | bellard | res = 0x12345678;\
|
807 | 288426fe | bellard | asm (op " %" size "2, %" size "0\n" \ |
808 | 288426fe | bellard | "movl $0, %1\n"\
|
809 | 288426fe | bellard | "jnz 1f\n"\
|
810 | 288426fe | bellard | "movl $1, %1\n"\
|
811 | 288426fe | bellard | "1:\n"\
|
812 | 288426fe | bellard | : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\ |
813 | 288426fe | bellard | printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
|
814 | 288426fe | bellard | } |
815 | 288426fe | bellard | |
816 | 6dbad63e | bellard | /* NOTE: we use Linux modify_ldt syscall */
|
817 | 6dbad63e | bellard | void test_segs(void) |
818 | 6dbad63e | bellard | { |
819 | 6dbad63e | bellard | struct modify_ldt_ldt_s ldt;
|
820 | 6dbad63e | bellard | long long ldt_table[3]; |
821 | 04369ff2 | bellard | int res, res2;
|
822 | 6dbad63e | bellard | char tmp;
|
823 | e1d4294a | bellard | struct {
|
824 | e1d4294a | bellard | uint32_t offset; |
825 | e1d4294a | bellard | uint16_t seg; |
826 | e1d4294a | bellard | } __attribute__((packed)) segoff; |
827 | 6dbad63e | bellard | |
828 | 6dbad63e | bellard | ldt.entry_number = 1;
|
829 | 6dbad63e | bellard | ldt.base_addr = (unsigned long)&seg_data1; |
830 | 6dbad63e | bellard | ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12; |
831 | 6dbad63e | bellard | ldt.seg_32bit = 1;
|
832 | 6dbad63e | bellard | ldt.contents = MODIFY_LDT_CONTENTS_DATA; |
833 | 6dbad63e | bellard | ldt.read_exec_only = 0;
|
834 | 6dbad63e | bellard | ldt.limit_in_pages = 1;
|
835 | 6dbad63e | bellard | ldt.seg_not_present = 0;
|
836 | 6dbad63e | bellard | ldt.useable = 1;
|
837 | 6dbad63e | bellard | modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */ |
838 | 6dbad63e | bellard | |
839 | 6dbad63e | bellard | ldt.entry_number = 2;
|
840 | 6dbad63e | bellard | ldt.base_addr = (unsigned long)&seg_data2; |
841 | 6dbad63e | bellard | ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12; |
842 | 6dbad63e | bellard | ldt.seg_32bit = 1;
|
843 | 6dbad63e | bellard | ldt.contents = MODIFY_LDT_CONTENTS_DATA; |
844 | 6dbad63e | bellard | ldt.read_exec_only = 0;
|
845 | 6dbad63e | bellard | ldt.limit_in_pages = 1;
|
846 | 6dbad63e | bellard | ldt.seg_not_present = 0;
|
847 | 6dbad63e | bellard | ldt.useable = 1;
|
848 | 6dbad63e | bellard | modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */ |
849 | 6dbad63e | bellard | |
850 | 6dbad63e | bellard | modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */ |
851 | 04369ff2 | bellard | #if 0
|
852 | 04369ff2 | bellard | {
|
853 | 04369ff2 | bellard | int i;
|
854 | 04369ff2 | bellard | for(i=0;i<3;i++)
|
855 | 04369ff2 | bellard | printf("%d: %016Lx\n", i, ldt_table[i]);
|
856 | 04369ff2 | bellard | }
|
857 | 04369ff2 | bellard | #endif
|
858 | 6dbad63e | bellard | /* do some tests with fs or gs */
|
859 | 6dbad63e | bellard | asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1))); |
860 | 6dbad63e | bellard | |
861 | 6dbad63e | bellard | seg_data1[1] = 0xaa; |
862 | 6dbad63e | bellard | seg_data2[1] = 0x55; |
863 | 6dbad63e | bellard | |
864 | 6dbad63e | bellard | asm volatile ("fs movzbl 0x1, %0" : "=r" (res)); |
865 | 6dbad63e | bellard | printf("FS[1] = %02x\n", res);
|
866 | 6dbad63e | bellard | |
867 | 070893f4 | bellard | asm volatile ("pushl %%gs\n" |
868 | 070893f4 | bellard | "movl %1, %%gs\n"
|
869 | 070893f4 | bellard | "gs movzbl 0x1, %0\n"
|
870 | 070893f4 | bellard | "popl %%gs\n"
|
871 | 070893f4 | bellard | : "=r" (res)
|
872 | 070893f4 | bellard | : "r" (MK_SEL(2))); |
873 | 6dbad63e | bellard | printf("GS[1] = %02x\n", res);
|
874 | 6dbad63e | bellard | |
875 | 6dbad63e | bellard | /* tests with ds/ss (implicit segment case) */
|
876 | 6dbad63e | bellard | tmp = 0xa5;
|
877 | 6dbad63e | bellard | asm volatile ("pushl %%ebp\n\t" |
878 | 6dbad63e | bellard | "pushl %%ds\n\t"
|
879 | 6dbad63e | bellard | "movl %2, %%ds\n\t"
|
880 | 6dbad63e | bellard | "movl %3, %%ebp\n\t"
|
881 | 6dbad63e | bellard | "movzbl 0x1, %0\n\t"
|
882 | 6dbad63e | bellard | "movzbl (%%ebp), %1\n\t"
|
883 | 6dbad63e | bellard | "popl %%ds\n\t"
|
884 | 6dbad63e | bellard | "popl %%ebp\n\t"
|
885 | 6dbad63e | bellard | : "=r" (res), "=r" (res2) |
886 | 6dbad63e | bellard | : "r" (MK_SEL(1)), "r" (&tmp)); |
887 | 6dbad63e | bellard | printf("DS[1] = %02x\n", res);
|
888 | 6dbad63e | bellard | printf("SS[tmp] = %02x\n", res2);
|
889 | e1d4294a | bellard | |
890 | e1d4294a | bellard | segoff.seg = MK_SEL(2);
|
891 | e1d4294a | bellard | segoff.offset = 0xabcdef12;
|
892 | e1d4294a | bellard | asm volatile("lfs %2, %0\n\t" |
893 | e1d4294a | bellard | "movl %%fs, %1\n\t"
|
894 | e1d4294a | bellard | : "=r" (res), "=g" (res2) |
895 | e1d4294a | bellard | : "m" (segoff));
|
896 | e1d4294a | bellard | printf("FS:reg = %04x:%08x\n", res2, res);
|
897 | 288426fe | bellard | |
898 | 288426fe | bellard | TEST_LR("larw", "w", MK_SEL(2), 0x0100); |
899 | 288426fe | bellard | TEST_LR("larl", "", MK_SEL(2), 0x0100); |
900 | 288426fe | bellard | TEST_LR("lslw", "w", MK_SEL(2), 0); |
901 | 288426fe | bellard | TEST_LR("lsll", "", MK_SEL(2), 0); |
902 | 288426fe | bellard | |
903 | 288426fe | bellard | TEST_LR("larw", "w", 0xfff8, 0); |
904 | 288426fe | bellard | TEST_LR("larl", "", 0xfff8, 0); |
905 | 288426fe | bellard | TEST_LR("lslw", "w", 0xfff8, 0); |
906 | 288426fe | bellard | TEST_LR("lsll", "", 0xfff8, 0); |
907 | 6dbad63e | bellard | } |
908 | 55480af8 | bellard | |
909 | e5918247 | bellard | /* 16 bit code test */
|
910 | e5918247 | bellard | extern char code16_start, code16_end; |
911 | e5918247 | bellard | extern char code16_func1; |
912 | e5918247 | bellard | extern char code16_func2; |
913 | e5918247 | bellard | extern char code16_func3; |
914 | a300e691 | bellard | |
915 | e5918247 | bellard | void test_code16(void) |
916 | 1a9353d2 | bellard | { |
917 | e5918247 | bellard | struct modify_ldt_ldt_s ldt;
|
918 | e5918247 | bellard | int res, res2;
|
919 | a300e691 | bellard | |
920 | e5918247 | bellard | /* build a code segment */
|
921 | e5918247 | bellard | ldt.entry_number = 1;
|
922 | e5918247 | bellard | ldt.base_addr = (unsigned long)&code16_start; |
923 | e5918247 | bellard | ldt.limit = &code16_end - &code16_start; |
924 | e5918247 | bellard | ldt.seg_32bit = 0;
|
925 | e5918247 | bellard | ldt.contents = MODIFY_LDT_CONTENTS_CODE; |
926 | e5918247 | bellard | ldt.read_exec_only = 0;
|
927 | e5918247 | bellard | ldt.limit_in_pages = 0;
|
928 | e5918247 | bellard | ldt.seg_not_present = 0;
|
929 | e5918247 | bellard | ldt.useable = 1;
|
930 | e5918247 | bellard | modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */ |
931 | a300e691 | bellard | |
932 | e5918247 | bellard | /* call the first function */
|
933 | e5918247 | bellard | asm volatile ("lcall %1, %2" |
934 | e5918247 | bellard | : "=a" (res)
|
935 | e5918247 | bellard | : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc"); |
936 | e5918247 | bellard | printf("func1() = 0x%08x\n", res);
|
937 | e5918247 | bellard | asm volatile ("lcall %2, %3" |
938 | e5918247 | bellard | : "=a" (res), "=c" (res2) |
939 | e5918247 | bellard | : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc"); |
940 | e5918247 | bellard | printf("func2() = 0x%08x spdec=%d\n", res, res2);
|
941 | e5918247 | bellard | asm volatile ("lcall %1, %2" |
942 | e5918247 | bellard | : "=a" (res)
|
943 | e5918247 | bellard | : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc"); |
944 | e5918247 | bellard | printf("func3() = 0x%08x\n", res);
|
945 | 1a9353d2 | bellard | } |
946 | 1a9353d2 | bellard | |
947 | dd3587f3 | bellard | extern char func_lret32; |
948 | dd3587f3 | bellard | extern char func_iret32; |
949 | dd3587f3 | bellard | |
950 | e1d4294a | bellard | void test_misc(void) |
951 | e1d4294a | bellard | { |
952 | e1d4294a | bellard | char table[256]; |
953 | e1d4294a | bellard | int res, i;
|
954 | e1d4294a | bellard | |
955 | e1d4294a | bellard | for(i=0;i<256;i++) table[i] = 256 - i; |
956 | e1d4294a | bellard | res = 0x12345678;
|
957 | e1d4294a | bellard | asm ("xlat" : "=a" (res) : "b" (table), "0" (res)); |
958 | e1d4294a | bellard | printf("xlat: EAX=%08x\n", res);
|
959 | dd3587f3 | bellard | |
960 | dd3587f3 | bellard | asm volatile ("pushl %%cs ; call %1" |
961 | dd3587f3 | bellard | : "=a" (res)
|
962 | dd3587f3 | bellard | : "m" (func_lret32): "memory", "cc"); |
963 | dd3587f3 | bellard | printf("func_lret32=%x\n", res);
|
964 | dd3587f3 | bellard | |
965 | dd3587f3 | bellard | asm volatile ("pushfl ; pushl %%cs ; call %1" |
966 | dd3587f3 | bellard | : "=a" (res)
|
967 | dd3587f3 | bellard | : "m" (func_iret32): "memory", "cc"); |
968 | dd3587f3 | bellard | printf("func_iret32=%x\n", res);
|
969 | dd3587f3 | bellard | |
970 | dd3587f3 | bellard | /* specific popl test */
|
971 | dd3587f3 | bellard | asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0" |
972 | dd3587f3 | bellard | : "=g" (res));
|
973 | dd3587f3 | bellard | printf("popl esp=%x\n", res);
|
974 | b2b5fb22 | bellard | |
975 | b2b5fb22 | bellard | /* specific popw test */
|
976 | b2b5fb22 | bellard | asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0" |
977 | b2b5fb22 | bellard | : "=g" (res));
|
978 | b2b5fb22 | bellard | printf("popw esp=%x\n", res);
|
979 | e1d4294a | bellard | } |
980 | e1d4294a | bellard | |
981 | e1d4294a | bellard | uint8_t str_buffer[4096];
|
982 | e1d4294a | bellard | |
983 | e1d4294a | bellard | #define TEST_STRING1(OP, size, DF, REP)\
|
984 | e1d4294a | bellard | {\ |
985 | e1d4294a | bellard | int esi, edi, eax, ecx, eflags;\
|
986 | e1d4294a | bellard | \ |
987 | e1d4294a | bellard | esi = (long)(str_buffer + sizeof(str_buffer) / 2);\ |
988 | e1d4294a | bellard | edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\ |
989 | e1d4294a | bellard | eax = 0x12345678;\
|
990 | e1d4294a | bellard | ecx = 17;\
|
991 | e1d4294a | bellard | \ |
992 | e1d4294a | bellard | asm volatile ("pushl $0\n\t"\ |
993 | e1d4294a | bellard | "popf\n\t"\
|
994 | e1d4294a | bellard | DF "\n\t"\
|
995 | e1d4294a | bellard | REP #OP size "\n\t"\ |
996 | e1d4294a | bellard | "cld\n\t"\
|
997 | e1d4294a | bellard | "pushf\n\t"\
|
998 | e1d4294a | bellard | "popl %4\n\t"\
|
999 | e1d4294a | bellard | : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\ |
1000 | e1d4294a | bellard | : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\ |
1001 | e1d4294a | bellard | printf("%-10s ESI=%08x EDI=%08x EAX=%08x ECX=%08x EFL=%04x\n",\
|
1002 | e1d4294a | bellard | REP #OP size, esi, edi, eax, ecx,\
|
1003 | e1d4294a | bellard | eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\ |
1004 | e1d4294a | bellard | } |
1005 | e1d4294a | bellard | |
1006 | e1d4294a | bellard | #define TEST_STRING(OP, REP)\
|
1007 | e1d4294a | bellard | TEST_STRING1(OP, "b", "", REP);\ |
1008 | e1d4294a | bellard | TEST_STRING1(OP, "w", "", REP);\ |
1009 | e1d4294a | bellard | TEST_STRING1(OP, "l", "", REP);\ |
1010 | e1d4294a | bellard | TEST_STRING1(OP, "b", "std", REP);\ |
1011 | e1d4294a | bellard | TEST_STRING1(OP, "w", "std", REP);\ |
1012 | e1d4294a | bellard | TEST_STRING1(OP, "l", "std", REP) |
1013 | e1d4294a | bellard | |
1014 | e1d4294a | bellard | void test_string(void) |
1015 | e1d4294a | bellard | { |
1016 | e1d4294a | bellard | int i;
|
1017 | e1d4294a | bellard | for(i = 0;i < sizeof(str_buffer); i++) |
1018 | e1d4294a | bellard | str_buffer[i] = i + 0x56;
|
1019 | e1d4294a | bellard | TEST_STRING(stos, "");
|
1020 | e1d4294a | bellard | TEST_STRING(stos, "rep ");
|
1021 | e1d4294a | bellard | TEST_STRING(lods, ""); /* to verify stos */ |
1022 | e1d4294a | bellard | TEST_STRING(lods, "rep ");
|
1023 | e1d4294a | bellard | TEST_STRING(movs, "");
|
1024 | e1d4294a | bellard | TEST_STRING(movs, "rep ");
|
1025 | e1d4294a | bellard | TEST_STRING(lods, ""); /* to verify stos */ |
1026 | e1d4294a | bellard | |
1027 | e1d4294a | bellard | /* XXX: better tests */
|
1028 | e1d4294a | bellard | TEST_STRING(scas, "");
|
1029 | e1d4294a | bellard | TEST_STRING(scas, "repz ");
|
1030 | e1d4294a | bellard | TEST_STRING(scas, "repnz ");
|
1031 | e1d4294a | bellard | TEST_STRING(cmps, "");
|
1032 | e1d4294a | bellard | TEST_STRING(cmps, "repz ");
|
1033 | e1d4294a | bellard | TEST_STRING(cmps, "repnz ");
|
1034 | e1d4294a | bellard | } |
1035 | e5918247 | bellard | |
1036 | 3a27ad0b | bellard | /* VM86 test */
|
1037 | 3a27ad0b | bellard | |
1038 | 3a27ad0b | bellard | static inline void set_bit(uint8_t *a, unsigned int bit) |
1039 | 3a27ad0b | bellard | { |
1040 | 3a27ad0b | bellard | a[bit / 8] |= (1 << (bit % 8)); |
1041 | 3a27ad0b | bellard | } |
1042 | 3a27ad0b | bellard | |
1043 | 3a27ad0b | bellard | static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg) |
1044 | 3a27ad0b | bellard | { |
1045 | 3a27ad0b | bellard | return (uint8_t *)((seg << 4) + (reg & 0xffff)); |
1046 | 3a27ad0b | bellard | } |
1047 | 3a27ad0b | bellard | |
1048 | 3a27ad0b | bellard | static inline void pushw(struct vm86_regs *r, int val) |
1049 | 3a27ad0b | bellard | { |
1050 | 3a27ad0b | bellard | r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff); |
1051 | 3a27ad0b | bellard | *(uint16_t *)seg_to_linear(r->ss, r->esp) = val; |
1052 | 3a27ad0b | bellard | } |
1053 | 3a27ad0b | bellard | |
1054 | 3a27ad0b | bellard | #undef __syscall_return
|
1055 | 3a27ad0b | bellard | #define __syscall_return(type, res) \
|
1056 | 3a27ad0b | bellard | do { \
|
1057 | 3a27ad0b | bellard | return (type) (res); \
|
1058 | 3a27ad0b | bellard | } while (0) |
1059 | 3a27ad0b | bellard | |
1060 | 3a27ad0b | bellard | _syscall2(int, vm86, int, func, struct vm86plus_struct *, v86) |
1061 | 3a27ad0b | bellard | |
1062 | 3a27ad0b | bellard | extern char vm86_code_start; |
1063 | 3a27ad0b | bellard | extern char vm86_code_end; |
1064 | 3a27ad0b | bellard | |
1065 | 3a27ad0b | bellard | #define VM86_CODE_CS 0x100 |
1066 | 3a27ad0b | bellard | #define VM86_CODE_IP 0x100 |
1067 | 3a27ad0b | bellard | |
1068 | 3a27ad0b | bellard | void test_vm86(void) |
1069 | 3a27ad0b | bellard | { |
1070 | 3a27ad0b | bellard | struct vm86plus_struct ctx;
|
1071 | 3a27ad0b | bellard | struct vm86_regs *r;
|
1072 | 3a27ad0b | bellard | uint8_t *vm86_mem; |
1073 | 3a27ad0b | bellard | int seg, ret;
|
1074 | 3a27ad0b | bellard | |
1075 | 3a27ad0b | bellard | vm86_mem = mmap((void *)0x00000000, 0x110000, |
1076 | 3a27ad0b | bellard | PROT_WRITE | PROT_READ | PROT_EXEC, |
1077 | 3a27ad0b | bellard | MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0); |
1078 | 3a27ad0b | bellard | if (vm86_mem == MAP_FAILED) {
|
1079 | 3a27ad0b | bellard | printf("ERROR: could not map vm86 memory");
|
1080 | 3a27ad0b | bellard | return;
|
1081 | 3a27ad0b | bellard | } |
1082 | 3a27ad0b | bellard | memset(&ctx, 0, sizeof(ctx)); |
1083 | 3a27ad0b | bellard | |
1084 | 3a27ad0b | bellard | /* init basic registers */
|
1085 | 3a27ad0b | bellard | r = &ctx.regs; |
1086 | 3a27ad0b | bellard | r->eip = VM86_CODE_IP; |
1087 | 3a27ad0b | bellard | r->esp = 0xfffe;
|
1088 | 3a27ad0b | bellard | seg = VM86_CODE_CS; |
1089 | 3a27ad0b | bellard | r->cs = seg; |
1090 | 3a27ad0b | bellard | r->ss = seg; |
1091 | 3a27ad0b | bellard | r->ds = seg; |
1092 | 3a27ad0b | bellard | r->es = seg; |
1093 | 3a27ad0b | bellard | r->fs = seg; |
1094 | 3a27ad0b | bellard | r->gs = seg; |
1095 | 3a27ad0b | bellard | r->eflags = VIF_MASK; |
1096 | 3a27ad0b | bellard | |
1097 | 3a27ad0b | bellard | /* move code to proper address. We use the same layout as a .com
|
1098 | 3a27ad0b | bellard | dos program. */
|
1099 | 3a27ad0b | bellard | memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
|
1100 | 3a27ad0b | bellard | &vm86_code_start, &vm86_code_end - &vm86_code_start); |
1101 | 3a27ad0b | bellard | |
1102 | 3a27ad0b | bellard | /* mark int 0x21 as being emulated */
|
1103 | 3a27ad0b | bellard | set_bit((uint8_t *)&ctx.int_revectored, 0x21);
|
1104 | 3a27ad0b | bellard | |
1105 | 3a27ad0b | bellard | for(;;) {
|
1106 | 3a27ad0b | bellard | ret = vm86(VM86_ENTER, &ctx); |
1107 | 3a27ad0b | bellard | switch(VM86_TYPE(ret)) {
|
1108 | 3a27ad0b | bellard | case VM86_INTx:
|
1109 | 3a27ad0b | bellard | { |
1110 | 3ff0631e | bellard | int int_num, ah, v;
|
1111 | 3a27ad0b | bellard | |
1112 | 3a27ad0b | bellard | int_num = VM86_ARG(ret); |
1113 | 3a27ad0b | bellard | if (int_num != 0x21) |
1114 | 3a27ad0b | bellard | goto unknown_int;
|
1115 | 3a27ad0b | bellard | ah = (r->eax >> 8) & 0xff; |
1116 | 3a27ad0b | bellard | switch(ah) {
|
1117 | 3a27ad0b | bellard | case 0x00: /* exit */ |
1118 | 3a27ad0b | bellard | goto the_end;
|
1119 | 3a27ad0b | bellard | case 0x02: /* write char */ |
1120 | 3a27ad0b | bellard | { |
1121 | 3a27ad0b | bellard | uint8_t c = r->edx; |
1122 | 3a27ad0b | bellard | putchar(c); |
1123 | 3a27ad0b | bellard | } |
1124 | 3a27ad0b | bellard | break;
|
1125 | 3a27ad0b | bellard | case 0x09: /* write string */ |
1126 | 3a27ad0b | bellard | { |
1127 | 3a27ad0b | bellard | uint8_t c, *ptr; |
1128 | 3a27ad0b | bellard | ptr = seg_to_linear(r->ds, r->edx); |
1129 | 3a27ad0b | bellard | for(;;) {
|
1130 | 3a27ad0b | bellard | c = *ptr++; |
1131 | 3a27ad0b | bellard | if (c == '$') |
1132 | 3a27ad0b | bellard | break;
|
1133 | 3a27ad0b | bellard | putchar(c); |
1134 | 3a27ad0b | bellard | } |
1135 | 3a27ad0b | bellard | r->eax = (r->eax & ~0xff) | '$'; |
1136 | 3a27ad0b | bellard | } |
1137 | 3a27ad0b | bellard | break;
|
1138 | 3ff0631e | bellard | case 0xff: /* extension: write eflags number in edx */ |
1139 | 3ff0631e | bellard | v = (int)r->edx;
|
1140 | 3ff0631e | bellard | #ifndef LINUX_VM86_IOPL_FIX
|
1141 | 3ff0631e | bellard | v &= ~0x3000;
|
1142 | 3ff0631e | bellard | #endif
|
1143 | 3ff0631e | bellard | printf("%08x\n", v);
|
1144 | 3a27ad0b | bellard | break;
|
1145 | 3a27ad0b | bellard | default:
|
1146 | 3a27ad0b | bellard | unknown_int:
|
1147 | 3a27ad0b | bellard | printf("unsupported int 0x%02x\n", int_num);
|
1148 | 3a27ad0b | bellard | goto the_end;
|
1149 | 3a27ad0b | bellard | } |
1150 | 3a27ad0b | bellard | } |
1151 | 3a27ad0b | bellard | break;
|
1152 | 3a27ad0b | bellard | case VM86_SIGNAL:
|
1153 | 3a27ad0b | bellard | /* a signal came, we just ignore that */
|
1154 | 3a27ad0b | bellard | break;
|
1155 | 3a27ad0b | bellard | case VM86_STI:
|
1156 | 3a27ad0b | bellard | break;
|
1157 | 3a27ad0b | bellard | default:
|
1158 | 3a27ad0b | bellard | printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
|
1159 | 3a27ad0b | bellard | goto the_end;
|
1160 | 3a27ad0b | bellard | } |
1161 | 3a27ad0b | bellard | } |
1162 | 3a27ad0b | bellard | the_end:
|
1163 | 3a27ad0b | bellard | printf("VM86 end\n");
|
1164 | 3a27ad0b | bellard | munmap(vm86_mem, 0x110000);
|
1165 | 3a27ad0b | bellard | } |
1166 | 3a27ad0b | bellard | |
1167 | 3a27ad0b | bellard | /* exception tests */
|
1168 | 3a27ad0b | bellard | #ifndef REG_EAX
|
1169 | 3a27ad0b | bellard | #define REG_EAX EAX
|
1170 | 3a27ad0b | bellard | #define REG_EBX EBX
|
1171 | 3a27ad0b | bellard | #define REG_ECX ECX
|
1172 | 3a27ad0b | bellard | #define REG_EDX EDX
|
1173 | 3a27ad0b | bellard | #define REG_ESI ESI
|
1174 | 3a27ad0b | bellard | #define REG_EDI EDI
|
1175 | 3a27ad0b | bellard | #define REG_EBP EBP
|
1176 | 3a27ad0b | bellard | #define REG_ESP ESP
|
1177 | 3a27ad0b | bellard | #define REG_EIP EIP
|
1178 | 3a27ad0b | bellard | #define REG_EFL EFL
|
1179 | 3a27ad0b | bellard | #define REG_TRAPNO TRAPNO
|
1180 | 3a27ad0b | bellard | #define REG_ERR ERR
|
1181 | 3a27ad0b | bellard | #endif
|
1182 | 3a27ad0b | bellard | |
1183 | 3a27ad0b | bellard | jmp_buf jmp_env; |
1184 | 3a27ad0b | bellard | int v1;
|
1185 | 3a27ad0b | bellard | int tab[2]; |
1186 | 3a27ad0b | bellard | |
1187 | 3a27ad0b | bellard | void sig_handler(int sig, siginfo_t *info, void *puc) |
1188 | 3a27ad0b | bellard | { |
1189 | 3a27ad0b | bellard | struct ucontext *uc = puc;
|
1190 | 3a27ad0b | bellard | |
1191 | 3a27ad0b | bellard | printf("si_signo=%d si_errno=%d si_code=%d",
|
1192 | 3a27ad0b | bellard | info->si_signo, info->si_errno, info->si_code); |
1193 | e3b32540 | bellard | printf(" si_addr=0x%08lx",
|
1194 | e3b32540 | bellard | (unsigned long)info->si_addr); |
1195 | 3a27ad0b | bellard | printf("\n");
|
1196 | 3a27ad0b | bellard | |
1197 | 3a27ad0b | bellard | printf("trapno=0x%02x err=0x%08x",
|
1198 | 3a27ad0b | bellard | uc->uc_mcontext.gregs[REG_TRAPNO], |
1199 | 3a27ad0b | bellard | uc->uc_mcontext.gregs[REG_ERR]); |
1200 | e3b32540 | bellard | printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
|
1201 | 3a27ad0b | bellard | printf("\n");
|
1202 | 3a27ad0b | bellard | longjmp(jmp_env, 1);
|
1203 | 3a27ad0b | bellard | } |
1204 | 3a27ad0b | bellard | |
1205 | 3a27ad0b | bellard | void test_exceptions(void) |
1206 | 3a27ad0b | bellard | { |
1207 | e3b32540 | bellard | struct modify_ldt_ldt_s ldt;
|
1208 | 3a27ad0b | bellard | struct sigaction act;
|
1209 | 3a27ad0b | bellard | volatile int val; |
1210 | 3a27ad0b | bellard | |
1211 | 3a27ad0b | bellard | act.sa_sigaction = sig_handler; |
1212 | 3a27ad0b | bellard | sigemptyset(&act.sa_mask); |
1213 | 3a27ad0b | bellard | act.sa_flags = SA_SIGINFO; |
1214 | 3a27ad0b | bellard | sigaction(SIGFPE, &act, NULL);
|
1215 | 3a27ad0b | bellard | sigaction(SIGILL, &act, NULL);
|
1216 | 3a27ad0b | bellard | sigaction(SIGSEGV, &act, NULL);
|
1217 | e3b32540 | bellard | sigaction(SIGBUS, &act, NULL);
|
1218 | 3a27ad0b | bellard | sigaction(SIGTRAP, &act, NULL);
|
1219 | 3a27ad0b | bellard | |
1220 | 3a27ad0b | bellard | /* test division by zero reporting */
|
1221 | e3b32540 | bellard | printf("DIVZ exception:\n");
|
1222 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1223 | 3a27ad0b | bellard | /* now divide by zero */
|
1224 | 3a27ad0b | bellard | v1 = 0;
|
1225 | 3a27ad0b | bellard | v1 = 2 / v1;
|
1226 | 3a27ad0b | bellard | } |
1227 | 3a27ad0b | bellard | |
1228 | e3b32540 | bellard | printf("BOUND exception:\n");
|
1229 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1230 | 3a27ad0b | bellard | /* bound exception */
|
1231 | 3a27ad0b | bellard | tab[0] = 1; |
1232 | 3a27ad0b | bellard | tab[1] = 10; |
1233 | 3a27ad0b | bellard | asm volatile ("bound %0, %1" : : "r" (11), "m" (tab)); |
1234 | 3a27ad0b | bellard | } |
1235 | 3a27ad0b | bellard | |
1236 | e3b32540 | bellard | printf("segment exceptions:\n");
|
1237 | e3b32540 | bellard | if (setjmp(jmp_env) == 0) { |
1238 | e3b32540 | bellard | /* load an invalid segment */
|
1239 | e3b32540 | bellard | asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1)); |
1240 | e3b32540 | bellard | } |
1241 | e3b32540 | bellard | if (setjmp(jmp_env) == 0) { |
1242 | e3b32540 | bellard | /* null data segment is valid */
|
1243 | e3b32540 | bellard | asm volatile ("movl %0, %%fs" : : "r" (3)); |
1244 | e3b32540 | bellard | /* null stack segment */
|
1245 | e3b32540 | bellard | asm volatile ("movl %0, %%ss" : : "r" (3)); |
1246 | e3b32540 | bellard | } |
1247 | e3b32540 | bellard | |
1248 | e3b32540 | bellard | ldt.entry_number = 1;
|
1249 | e3b32540 | bellard | ldt.base_addr = (unsigned long)&seg_data1; |
1250 | e3b32540 | bellard | ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12; |
1251 | e3b32540 | bellard | ldt.seg_32bit = 1;
|
1252 | e3b32540 | bellard | ldt.contents = MODIFY_LDT_CONTENTS_DATA; |
1253 | e3b32540 | bellard | ldt.read_exec_only = 0;
|
1254 | e3b32540 | bellard | ldt.limit_in_pages = 1;
|
1255 | e3b32540 | bellard | ldt.seg_not_present = 1;
|
1256 | e3b32540 | bellard | ldt.useable = 1;
|
1257 | e3b32540 | bellard | modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */ |
1258 | e3b32540 | bellard | |
1259 | e3b32540 | bellard | if (setjmp(jmp_env) == 0) { |
1260 | e3b32540 | bellard | /* segment not present */
|
1261 | e3b32540 | bellard | asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1))); |
1262 | e3b32540 | bellard | } |
1263 | e3b32540 | bellard | |
1264 | 3a27ad0b | bellard | /* test SEGV reporting */
|
1265 | e3b32540 | bellard | printf("PF exception:\n");
|
1266 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1267 | e3b32540 | bellard | val = 1;
|
1268 | ede28208 | bellard | /* we add a nop to test a weird PC retrieval case */
|
1269 | ede28208 | bellard | asm volatile ("nop"); |
1270 | 3a27ad0b | bellard | /* now store in an invalid address */
|
1271 | 3a27ad0b | bellard | *(char *)0x1234 = 1; |
1272 | 3a27ad0b | bellard | } |
1273 | 3a27ad0b | bellard | |
1274 | 3a27ad0b | bellard | /* test SEGV reporting */
|
1275 | e3b32540 | bellard | printf("PF exception:\n");
|
1276 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1277 | e3b32540 | bellard | val = 1;
|
1278 | 3a27ad0b | bellard | /* read from an invalid address */
|
1279 | 3a27ad0b | bellard | v1 = *(char *)0x1234; |
1280 | 3a27ad0b | bellard | } |
1281 | 3a27ad0b | bellard | |
1282 | 3a27ad0b | bellard | /* test illegal instruction reporting */
|
1283 | 3a27ad0b | bellard | printf("UD2 exception:\n");
|
1284 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1285 | 3a27ad0b | bellard | /* now execute an invalid instruction */
|
1286 | 3a27ad0b | bellard | asm volatile("ud2"); |
1287 | 3a27ad0b | bellard | } |
1288 | 3a27ad0b | bellard | |
1289 | 3a27ad0b | bellard | printf("INT exception:\n");
|
1290 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1291 | 3a27ad0b | bellard | asm volatile ("int $0xfd"); |
1292 | 3a27ad0b | bellard | } |
1293 | e3b32540 | bellard | if (setjmp(jmp_env) == 0) { |
1294 | e3b32540 | bellard | asm volatile ("int $0x01"); |
1295 | e3b32540 | bellard | } |
1296 | e3b32540 | bellard | if (setjmp(jmp_env) == 0) { |
1297 | e3b32540 | bellard | asm volatile (".byte 0xcd, 0x03"); |
1298 | e3b32540 | bellard | } |
1299 | e3b32540 | bellard | if (setjmp(jmp_env) == 0) { |
1300 | e3b32540 | bellard | asm volatile ("int $0x04"); |
1301 | e3b32540 | bellard | } |
1302 | e3b32540 | bellard | if (setjmp(jmp_env) == 0) { |
1303 | e3b32540 | bellard | asm volatile ("int $0x05"); |
1304 | e3b32540 | bellard | } |
1305 | 3a27ad0b | bellard | |
1306 | 3a27ad0b | bellard | printf("INT3 exception:\n");
|
1307 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1308 | 3a27ad0b | bellard | asm volatile ("int3"); |
1309 | 3a27ad0b | bellard | } |
1310 | 3a27ad0b | bellard | |
1311 | 3a27ad0b | bellard | printf("CLI exception:\n");
|
1312 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1313 | 3a27ad0b | bellard | asm volatile ("cli"); |
1314 | 3a27ad0b | bellard | } |
1315 | 3a27ad0b | bellard | |
1316 | 3a27ad0b | bellard | printf("STI exception:\n");
|
1317 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1318 | 3a27ad0b | bellard | asm volatile ("cli"); |
1319 | 3a27ad0b | bellard | } |
1320 | 3a27ad0b | bellard | |
1321 | 3a27ad0b | bellard | printf("INTO exception:\n");
|
1322 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1323 | 3a27ad0b | bellard | /* overflow exception */
|
1324 | 3a27ad0b | bellard | asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff)); |
1325 | 3a27ad0b | bellard | } |
1326 | 3a27ad0b | bellard | |
1327 | 3a27ad0b | bellard | printf("OUTB exception:\n");
|
1328 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1329 | 3a27ad0b | bellard | asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0)); |
1330 | 3a27ad0b | bellard | } |
1331 | 3a27ad0b | bellard | |
1332 | 3a27ad0b | bellard | printf("INB exception:\n");
|
1333 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1334 | 3a27ad0b | bellard | asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321)); |
1335 | 3a27ad0b | bellard | } |
1336 | 3a27ad0b | bellard | |
1337 | 3a27ad0b | bellard | printf("REP OUTSB exception:\n");
|
1338 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1339 | 3a27ad0b | bellard | asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1)); |
1340 | 3a27ad0b | bellard | } |
1341 | 3a27ad0b | bellard | |
1342 | 3a27ad0b | bellard | printf("REP INSB exception:\n");
|
1343 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1344 | 3a27ad0b | bellard | asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1)); |
1345 | 3a27ad0b | bellard | } |
1346 | 3a27ad0b | bellard | |
1347 | 3a27ad0b | bellard | printf("HLT exception:\n");
|
1348 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1349 | 3a27ad0b | bellard | asm volatile ("hlt"); |
1350 | 3a27ad0b | bellard | } |
1351 | 3a27ad0b | bellard | |
1352 | 3a27ad0b | bellard | printf("single step exception:\n");
|
1353 | 3a27ad0b | bellard | val = 0;
|
1354 | 3a27ad0b | bellard | if (setjmp(jmp_env) == 0) { |
1355 | 3a27ad0b | bellard | asm volatile ("pushf\n" |
1356 | 3a27ad0b | bellard | "orl $0x00100, (%%esp)\n"
|
1357 | 3a27ad0b | bellard | "popf\n"
|
1358 | 3a27ad0b | bellard | "movl $0xabcd, %0\n"
|
1359 | 3a27ad0b | bellard | "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory"); |
1360 | 3a27ad0b | bellard | } |
1361 | 3a27ad0b | bellard | printf("val=0x%x\n", val);
|
1362 | 3a27ad0b | bellard | } |
1363 | 3a27ad0b | bellard | |
1364 | 3ff0631e | bellard | /* specific precise single step test */
|
1365 | 3ff0631e | bellard | void sig_trap_handler(int sig, siginfo_t *info, void *puc) |
1366 | 3ff0631e | bellard | { |
1367 | 3ff0631e | bellard | struct ucontext *uc = puc;
|
1368 | 3ff0631e | bellard | printf("EIP=0x%08x\n", uc->uc_mcontext.gregs[REG_EIP]);
|
1369 | 3ff0631e | bellard | } |
1370 | 3ff0631e | bellard | |
1371 | 3ff0631e | bellard | const uint8_t sstep_buf1[4] = { 1, 2, 3, 4}; |
1372 | 3ff0631e | bellard | uint8_t sstep_buf2[4];
|
1373 | 3ff0631e | bellard | |
1374 | 3ff0631e | bellard | void test_single_step(void) |
1375 | 3ff0631e | bellard | { |
1376 | 3ff0631e | bellard | struct sigaction act;
|
1377 | 3ff0631e | bellard | volatile int val; |
1378 | 3ff0631e | bellard | int i;
|
1379 | 3ff0631e | bellard | |
1380 | 3ff0631e | bellard | val = 0;
|
1381 | 3ff0631e | bellard | act.sa_sigaction = sig_trap_handler; |
1382 | 3ff0631e | bellard | sigemptyset(&act.sa_mask); |
1383 | 3ff0631e | bellard | act.sa_flags = SA_SIGINFO; |
1384 | 3ff0631e | bellard | sigaction(SIGTRAP, &act, NULL);
|
1385 | 3ff0631e | bellard | asm volatile ("pushf\n" |
1386 | 3ff0631e | bellard | "orl $0x00100, (%%esp)\n"
|
1387 | 3ff0631e | bellard | "popf\n"
|
1388 | 3ff0631e | bellard | "movl $0xabcd, %0\n"
|
1389 | 3ff0631e | bellard | |
1390 | 3ff0631e | bellard | /* jmp test */
|
1391 | 3ff0631e | bellard | "movl $3, %%ecx\n"
|
1392 | 3ff0631e | bellard | "1:\n"
|
1393 | 3ff0631e | bellard | "addl $1, %0\n"
|
1394 | 3ff0631e | bellard | "decl %%ecx\n"
|
1395 | 3ff0631e | bellard | "jnz 1b\n"
|
1396 | 3ff0631e | bellard | |
1397 | 3ff0631e | bellard | /* movsb: the single step should stop at each movsb iteration */
|
1398 | 3ff0631e | bellard | "movl $sstep_buf1, %%esi\n"
|
1399 | 3ff0631e | bellard | "movl $sstep_buf2, %%edi\n"
|
1400 | 3ff0631e | bellard | "movl $0, %%ecx\n"
|
1401 | 3ff0631e | bellard | "rep movsb\n"
|
1402 | 3ff0631e | bellard | "movl $3, %%ecx\n"
|
1403 | 3ff0631e | bellard | "rep movsb\n"
|
1404 | 3ff0631e | bellard | "movl $1, %%ecx\n"
|
1405 | 3ff0631e | bellard | "rep movsb\n"
|
1406 | 3ff0631e | bellard | |
1407 | 3ff0631e | bellard | /* cmpsb: the single step should stop at each cmpsb iteration */
|
1408 | 3ff0631e | bellard | "movl $sstep_buf1, %%esi\n"
|
1409 | 3ff0631e | bellard | "movl $sstep_buf2, %%edi\n"
|
1410 | 3ff0631e | bellard | "movl $0, %%ecx\n"
|
1411 | 3ff0631e | bellard | "rep cmpsb\n"
|
1412 | 3ff0631e | bellard | "movl $4, %%ecx\n"
|
1413 | 3ff0631e | bellard | "rep cmpsb\n"
|
1414 | 3ff0631e | bellard | |
1415 | 3ff0631e | bellard | /* getpid() syscall: single step should skip one
|
1416 | 3ff0631e | bellard | instruction */
|
1417 | 3ff0631e | bellard | "movl $20, %%eax\n"
|
1418 | 3ff0631e | bellard | "int $0x80\n"
|
1419 | 3ff0631e | bellard | "movl $0, %%eax\n"
|
1420 | 3ff0631e | bellard | |
1421 | 3ff0631e | bellard | /* when modifying SS, trace is not done on the next
|
1422 | 3ff0631e | bellard | instruction */
|
1423 | 3ff0631e | bellard | "movl %%ss, %%ecx\n"
|
1424 | 3ff0631e | bellard | "movl %%ecx, %%ss\n"
|
1425 | 3ff0631e | bellard | "addl $1, %0\n"
|
1426 | 3ff0631e | bellard | "movl $1, %%eax\n"
|
1427 | 3ff0631e | bellard | "movl %%ecx, %%ss\n"
|
1428 | 3ff0631e | bellard | "jmp 1f\n"
|
1429 | 3ff0631e | bellard | "addl $1, %0\n"
|
1430 | 3ff0631e | bellard | "1:\n"
|
1431 | 3ff0631e | bellard | "movl $1, %%eax\n"
|
1432 | 3ff0631e | bellard | "pushl %%ecx\n"
|
1433 | 3ff0631e | bellard | "popl %%ss\n"
|
1434 | 3ff0631e | bellard | "addl $1, %0\n"
|
1435 | 3ff0631e | bellard | "movl $1, %%eax\n"
|
1436 | 3ff0631e | bellard | |
1437 | 3ff0631e | bellard | "pushf\n"
|
1438 | 3ff0631e | bellard | "andl $~0x00100, (%%esp)\n"
|
1439 | 3ff0631e | bellard | "popf\n"
|
1440 | 3ff0631e | bellard | : "=m" (val)
|
1441 | 3ff0631e | bellard | : |
1442 | 3ff0631e | bellard | : "cc", "memory", "eax", "ecx", "esi", "edi"); |
1443 | 3ff0631e | bellard | printf("val=%d\n", val);
|
1444 | 3ff0631e | bellard | for(i = 0; i < 4; i++) |
1445 | 3ff0631e | bellard | printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
|
1446 | 3ff0631e | bellard | } |
1447 | 3ff0631e | bellard | |
1448 | 3a27ad0b | bellard | /* self modifying code test */
|
1449 | 3a27ad0b | bellard | uint8_t code[] = { |
1450 | 3a27ad0b | bellard | 0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */ |
1451 | 3a27ad0b | bellard | 0xc3, /* ret */ |
1452 | 3a27ad0b | bellard | }; |
1453 | 3a27ad0b | bellard | |
1454 | d1fe2b24 | bellard | typedef int FuncType(void); |
1455 | d1fe2b24 | bellard | |
1456 | 3a27ad0b | bellard | void test_self_modifying_code(void) |
1457 | 3a27ad0b | bellard | { |
1458 | d1fe2b24 | bellard | int i;
|
1459 | 3a27ad0b | bellard | |
1460 | 3a27ad0b | bellard | printf("self modifying code:\n");
|
1461 | d1fe2b24 | bellard | printf("func1 = 0x%x\n", ((FuncType *)code)());
|
1462 | d1fe2b24 | bellard | for(i = 2; i <= 4; i++) { |
1463 | d1fe2b24 | bellard | code[1] = i;
|
1464 | d1fe2b24 | bellard | printf("func%d = 0x%x\n", i, ((FuncType *)code)());
|
1465 | d1fe2b24 | bellard | } |
1466 | 3a27ad0b | bellard | } |
1467 | 3a27ad0b | bellard | |
1468 | 4d1135e4 | bellard | static void *call_end __init_call = NULL; |
1469 | 4d1135e4 | bellard | |
1470 | 4d1135e4 | bellard | int main(int argc, char **argv) |
1471 | 4d1135e4 | bellard | { |
1472 | 4d1135e4 | bellard | void **ptr;
|
1473 | 4d1135e4 | bellard | void (*func)(void); |
1474 | 4b74fe1f | bellard | |
1475 | 4d1135e4 | bellard | ptr = &call_start + 1;
|
1476 | 4d1135e4 | bellard | while (*ptr != NULL) { |
1477 | 4d1135e4 | bellard | func = *ptr++; |
1478 | 4d1135e4 | bellard | func(); |
1479 | 4d1135e4 | bellard | } |
1480 | 9d8e9c09 | bellard | test_bsx(); |
1481 | d57c4e01 | bellard | test_mul(); |
1482 | 4d1135e4 | bellard | test_jcc(); |
1483 | 9d8e9c09 | bellard | test_floats(); |
1484 | 55480af8 | bellard | test_bcd(); |
1485 | 1a9353d2 | bellard | test_xchg(); |
1486 | e1d4294a | bellard | test_string(); |
1487 | e1d4294a | bellard | test_misc(); |
1488 | 6dbad63e | bellard | test_lea(); |
1489 | 6dbad63e | bellard | test_segs(); |
1490 | e5918247 | bellard | test_code16(); |
1491 | 3a27ad0b | bellard | test_vm86(); |
1492 | 3a27ad0b | bellard | test_exceptions(); |
1493 | 3a27ad0b | bellard | test_self_modifying_code(); |
1494 | 3ff0631e | bellard | test_single_step(); |
1495 | 4d1135e4 | bellard | return 0; |
1496 | 4d1135e4 | bellard | } |