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/*
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* PowerPC implementation of KVM hooks
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*
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* Copyright IBM Corp. 2007
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* Copyright (C) 2011 Freescale Semiconductor, Inc.
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*
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* Authors:
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* Jerone Young <jyoung5@us.ibm.com>
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* Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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* Hollis Blanchard <hollisb@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#include <sys/types.h> |
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#include <sys/ioctl.h> |
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#include <sys/mman.h> |
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#include <linux/kvm.h> |
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#include "qemu-common.h" |
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#include "qemu-timer.h" |
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#include "sysemu.h" |
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#include "kvm.h" |
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#include "kvm_ppc.h" |
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#include "cpu.h" |
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#include "device_tree.h" |
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//#define DEBUG_KVM
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#ifdef DEBUG_KVM
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#define dprintf(fmt, ...) \
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do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
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#else
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#define dprintf(fmt, ...) \
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do { } while (0) |
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#endif
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const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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KVM_CAP_LAST_INFO |
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}; |
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static int cap_interrupt_unset = false; |
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static int cap_interrupt_level = false; |
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static int cap_segstate; |
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static int cap_booke_sregs; |
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/* XXX We have a race condition where we actually have a level triggered
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* interrupt, but the infrastructure can't expose that yet, so the guest
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* takes but ignores it, goes to sleep and never gets notified that there's
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* still an interrupt pending.
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*
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* As a quick workaround, let's just wake up again 20 ms after we injected
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* an interrupt. That way we can assure that we're always reinjecting
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* interrupts in case the guest swallowed them.
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*/
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static QEMUTimer *idle_timer;
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static void kvm_kick_env(void *env) |
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{ |
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qemu_cpu_kick(env); |
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} |
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int kvm_arch_init(KVMState *s)
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{ |
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#ifdef KVM_CAP_PPC_UNSET_IRQ
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cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ); |
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#endif
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#ifdef KVM_CAP_PPC_IRQ_LEVEL
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cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL); |
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#endif
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#ifdef KVM_CAP_PPC_SEGSTATE
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cap_segstate = kvm_check_extension(s, KVM_CAP_PPC_SEGSTATE); |
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#endif
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#ifdef KVM_CAP_PPC_BOOKE_SREGS
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cap_booke_sregs = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_SREGS); |
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#endif
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if (!cap_interrupt_level) {
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fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
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"VM to stall at times!\n");
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} |
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return 0; |
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} |
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static int kvm_arch_sync_sregs(CPUState *cenv) |
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{ |
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struct kvm_sregs sregs;
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int ret;
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if (cenv->excp_model == POWERPC_EXCP_BOOKE) {
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/* What we're really trying to say is "if we're on BookE, we use
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the native PVR for now". This is the only sane way to check
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it though, so we potentially confuse users that they can run
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BookE guests on BookS. Let's hope nobody dares enough :) */
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return 0; |
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} else {
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if (!cap_segstate) {
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fprintf(stderr, "kvm error: missing PVR setting capability\n");
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return -ENOSYS;
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} |
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} |
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#if !defined(CONFIG_KVM_PPC_PVR)
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if (1) { |
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fprintf(stderr, "kvm error: missing PVR setting capability\n");
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return -ENOSYS;
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} |
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#endif
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ret = kvm_vcpu_ioctl(cenv, KVM_GET_SREGS, &sregs); |
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if (ret) {
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return ret;
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} |
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#ifdef CONFIG_KVM_PPC_PVR
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sregs.pvr = cenv->spr[SPR_PVR]; |
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#endif
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return kvm_vcpu_ioctl(cenv, KVM_SET_SREGS, &sregs);
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} |
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int kvm_arch_init_vcpu(CPUState *cenv)
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{ |
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int ret;
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ret = kvm_arch_sync_sregs(cenv); |
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if (ret) {
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return ret;
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} |
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idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_env, cenv); |
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return ret;
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} |
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void kvm_arch_reset_vcpu(CPUState *env)
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{ |
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} |
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int kvm_arch_put_registers(CPUState *env, int level) |
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{ |
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struct kvm_regs regs;
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int ret;
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int i;
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ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, ®s); |
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if (ret < 0) |
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return ret;
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regs.ctr = env->ctr; |
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regs.lr = env->lr; |
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regs.xer = env->xer; |
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regs.msr = env->msr; |
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regs.pc = env->nip; |
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regs.srr0 = env->spr[SPR_SRR0]; |
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regs.srr1 = env->spr[SPR_SRR1]; |
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regs.sprg0 = env->spr[SPR_SPRG0]; |
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regs.sprg1 = env->spr[SPR_SPRG1]; |
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regs.sprg2 = env->spr[SPR_SPRG2]; |
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regs.sprg3 = env->spr[SPR_SPRG3]; |
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regs.sprg4 = env->spr[SPR_SPRG4]; |
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regs.sprg5 = env->spr[SPR_SPRG5]; |
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regs.sprg6 = env->spr[SPR_SPRG6]; |
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regs.sprg7 = env->spr[SPR_SPRG7]; |
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regs.pid = env->spr[SPR_BOOKE_PID]; |
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for (i = 0;i < 32; i++) |
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regs.gpr[i] = env->gpr[i]; |
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ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, ®s); |
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if (ret < 0) |
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return ret;
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return ret;
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} |
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int kvm_arch_get_registers(CPUState *env)
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{ |
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struct kvm_regs regs;
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struct kvm_sregs sregs;
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uint32_t cr; |
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int i, ret;
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ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, ®s); |
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if (ret < 0) |
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return ret;
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cr = regs.cr; |
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for (i = 7; i >= 0; i--) { |
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env->crf[i] = cr & 15;
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cr >>= 4;
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} |
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env->ctr = regs.ctr; |
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env->lr = regs.lr; |
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env->xer = regs.xer; |
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env->msr = regs.msr; |
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env->nip = regs.pc; |
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env->spr[SPR_SRR0] = regs.srr0; |
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env->spr[SPR_SRR1] = regs.srr1; |
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env->spr[SPR_SPRG0] = regs.sprg0; |
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env->spr[SPR_SPRG1] = regs.sprg1; |
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env->spr[SPR_SPRG2] = regs.sprg2; |
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env->spr[SPR_SPRG3] = regs.sprg3; |
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env->spr[SPR_SPRG4] = regs.sprg4; |
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env->spr[SPR_SPRG5] = regs.sprg5; |
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env->spr[SPR_SPRG6] = regs.sprg6; |
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env->spr[SPR_SPRG7] = regs.sprg7; |
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env->spr[SPR_BOOKE_PID] = regs.pid; |
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for (i = 0;i < 32; i++) |
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env->gpr[i] = regs.gpr[i]; |
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if (cap_booke_sregs) {
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ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs); |
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if (ret < 0) { |
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return ret;
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} |
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#ifdef KVM_CAP_PPC_BOOKE_SREGS
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if (sregs.u.e.features & KVM_SREGS_E_BASE) {
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env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0; |
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env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1; |
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env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr; |
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env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear; |
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env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr; |
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env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr; |
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env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr; |
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env->spr[SPR_DECR] = sregs.u.e.dec; |
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env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
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env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
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env->spr[SPR_VRSAVE] = sregs.u.e.vrsave; |
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} |
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if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
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env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir; |
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env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0; |
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env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1; |
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env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar; |
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env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr; |
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} |
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if (sregs.u.e.features & KVM_SREGS_E_64) {
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env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr; |
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} |
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if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
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env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8; |
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} |
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if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
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env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
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env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
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env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
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env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
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env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
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env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
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env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
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env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
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env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
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env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
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env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
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env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
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env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
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env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
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env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
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env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
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if (sregs.u.e.features & KVM_SREGS_E_SPE) {
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env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
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env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
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env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
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} |
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if (sregs.u.e.features & KVM_SREGS_E_PM) {
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env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
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} |
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if (sregs.u.e.features & KVM_SREGS_E_PC) {
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env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
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env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
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} |
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} |
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if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
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env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0; |
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env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1; |
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env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2; |
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env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
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env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4; |
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env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6; |
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env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
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env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg; |
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env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
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env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
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} |
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if (sregs.u.e.features & KVM_SREGS_EXP) {
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env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr; |
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} |
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if (sregs.u.e.features & KVM_SREGS_E_PD) {
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env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc; |
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env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc; |
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} |
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if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
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env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr; |
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env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar; |
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env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0; |
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if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
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env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1; |
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env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2; |
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} |
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} |
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#endif
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} |
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if (cap_segstate) {
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ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs); |
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if (ret < 0) { |
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return ret;
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} |
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#ifdef KVM_CAP_PPC_SEGSTATE
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ppc_store_sdr1(env, sregs.u.s.sdr1); |
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/* Sync SLB */
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#ifdef TARGET_PPC64
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for (i = 0; i < 64; i++) { |
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ppc_store_slb(env, sregs.u.s.ppc64.slb[i].slbe, |
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sregs.u.s.ppc64.slb[i].slbv); |
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} |
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#endif
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/* Sync SRs */
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for (i = 0; i < 16; i++) { |
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env->sr[i] = sregs.u.s.ppc32.sr[i]; |
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} |
350 |
|
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/* Sync BATs */
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for (i = 0; i < 8; i++) { |
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env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff; |
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env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32; |
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env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff; |
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env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32; |
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} |
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#endif
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} |
360 |
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return 0; |
362 |
} |
363 |
|
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int kvmppc_set_interrupt(CPUState *env, int irq, int level) |
365 |
{ |
366 |
unsigned virq = level ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
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367 |
|
368 |
if (irq != PPC_INTERRUPT_EXT) {
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return 0; |
370 |
} |
371 |
|
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if (!kvm_enabled() || !cap_interrupt_unset || !cap_interrupt_level) {
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return 0; |
374 |
} |
375 |
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kvm_vcpu_ioctl(env, KVM_INTERRUPT, &virq); |
377 |
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return 0; |
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} |
380 |
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#if defined(TARGET_PPCEMB)
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#define PPC_INPUT_INT PPC40x_INPUT_INT
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#elif defined(TARGET_PPC64)
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#define PPC_INPUT_INT PPC970_INPUT_INT
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#else
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#define PPC_INPUT_INT PPC6xx_INPUT_INT
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#endif
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|
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void kvm_arch_pre_run(CPUState *env, struct kvm_run *run) |
390 |
{ |
391 |
int r;
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unsigned irq;
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/* PowerPC Qemu tracks the various core input pins (interrupt, critical
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* interrupt, reset, etc) in PPC-specific env->irq_input_state. */
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if (!cap_interrupt_level &&
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run->ready_for_interrupt_injection && |
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(env->interrupt_request & CPU_INTERRUPT_HARD) && |
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(env->irq_input_state & (1<<PPC_INPUT_INT)))
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{ |
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/* For now KVM disregards the 'irq' argument. However, in the
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* future KVM could cache it in-kernel to avoid a heavyweight exit
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* when reading the UIC.
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*/
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irq = KVM_INTERRUPT_SET; |
406 |
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dprintf("injected interrupt %d\n", irq);
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r = kvm_vcpu_ioctl(env, KVM_INTERRUPT, &irq); |
409 |
if (r < 0) |
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printf("cpu %d fail inject %x\n", env->cpu_index, irq);
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411 |
|
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/* Always wake up soon in case the interrupt was level based */
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qemu_mod_timer(idle_timer, qemu_get_clock_ns(vm_clock) + |
414 |
(get_ticks_per_sec() / 50));
|
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} |
416 |
|
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/* We don't know if there are more interrupts pending after this. However,
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* the guest will return to userspace in the course of handling this one
|
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* anyways, so we will get a chance to deliver the rest. */
|
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} |
421 |
|
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void kvm_arch_post_run(CPUState *env, struct kvm_run *run) |
423 |
{ |
424 |
} |
425 |
|
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int kvm_arch_process_async_events(CPUState *env)
|
427 |
{ |
428 |
return 0; |
429 |
} |
430 |
|
431 |
static int kvmppc_handle_halt(CPUState *env) |
432 |
{ |
433 |
if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
|
434 |
env->halted = 1;
|
435 |
env->exception_index = EXCP_HLT; |
436 |
} |
437 |
|
438 |
return 0; |
439 |
} |
440 |
|
441 |
/* map dcr access to existing qemu dcr emulation */
|
442 |
static int kvmppc_handle_dcr_read(CPUState *env, uint32_t dcrn, uint32_t *data) |
443 |
{ |
444 |
if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0) |
445 |
fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn);
|
446 |
|
447 |
return 0; |
448 |
} |
449 |
|
450 |
static int kvmppc_handle_dcr_write(CPUState *env, uint32_t dcrn, uint32_t data) |
451 |
{ |
452 |
if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0) |
453 |
fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn);
|
454 |
|
455 |
return 0; |
456 |
} |
457 |
|
458 |
int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run) |
459 |
{ |
460 |
int ret;
|
461 |
|
462 |
switch (run->exit_reason) {
|
463 |
case KVM_EXIT_DCR:
|
464 |
if (run->dcr.is_write) {
|
465 |
dprintf("handle dcr write\n");
|
466 |
ret = kvmppc_handle_dcr_write(env, run->dcr.dcrn, run->dcr.data); |
467 |
} else {
|
468 |
dprintf("handle dcr read\n");
|
469 |
ret = kvmppc_handle_dcr_read(env, run->dcr.dcrn, &run->dcr.data); |
470 |
} |
471 |
break;
|
472 |
case KVM_EXIT_HLT:
|
473 |
dprintf("handle halt\n");
|
474 |
ret = kvmppc_handle_halt(env); |
475 |
break;
|
476 |
default:
|
477 |
fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
|
478 |
ret = -1;
|
479 |
break;
|
480 |
} |
481 |
|
482 |
return ret;
|
483 |
} |
484 |
|
485 |
static int read_cpuinfo(const char *field, char *value, int len) |
486 |
{ |
487 |
FILE *f; |
488 |
int ret = -1; |
489 |
int field_len = strlen(field);
|
490 |
char line[512]; |
491 |
|
492 |
f = fopen("/proc/cpuinfo", "r"); |
493 |
if (!f) {
|
494 |
return -1; |
495 |
} |
496 |
|
497 |
do {
|
498 |
if(!fgets(line, sizeof(line), f)) { |
499 |
break;
|
500 |
} |
501 |
if (!strncmp(line, field, field_len)) {
|
502 |
strncpy(value, line, len); |
503 |
ret = 0;
|
504 |
break;
|
505 |
} |
506 |
} while(*line);
|
507 |
|
508 |
fclose(f); |
509 |
|
510 |
return ret;
|
511 |
} |
512 |
|
513 |
uint32_t kvmppc_get_tbfreq(void)
|
514 |
{ |
515 |
char line[512]; |
516 |
char *ns;
|
517 |
uint32_t retval = get_ticks_per_sec(); |
518 |
|
519 |
if (read_cpuinfo("timebase", line, sizeof(line))) { |
520 |
return retval;
|
521 |
} |
522 |
|
523 |
if (!(ns = strchr(line, ':'))) { |
524 |
return retval;
|
525 |
} |
526 |
|
527 |
ns++; |
528 |
|
529 |
retval = atoi(ns); |
530 |
return retval;
|
531 |
} |
532 |
|
533 |
int kvmppc_get_hypercall(CPUState *env, uint8_t *buf, int buf_len) |
534 |
{ |
535 |
uint32_t *hc = (uint32_t*)buf; |
536 |
|
537 |
#ifdef KVM_CAP_PPC_GET_PVINFO
|
538 |
struct kvm_ppc_pvinfo pvinfo;
|
539 |
|
540 |
if (kvm_check_extension(env->kvm_state, KVM_CAP_PPC_GET_PVINFO) &&
|
541 |
!kvm_vm_ioctl(env->kvm_state, KVM_PPC_GET_PVINFO, &pvinfo)) { |
542 |
memcpy(buf, pvinfo.hcall, buf_len); |
543 |
|
544 |
return 0; |
545 |
} |
546 |
#endif
|
547 |
|
548 |
/*
|
549 |
* Fallback to always fail hypercalls:
|
550 |
*
|
551 |
* li r3, -1
|
552 |
* nop
|
553 |
* nop
|
554 |
* nop
|
555 |
*/
|
556 |
|
557 |
hc[0] = 0x3860ffff; |
558 |
hc[1] = 0x60000000; |
559 |
hc[2] = 0x60000000; |
560 |
hc[3] = 0x60000000; |
561 |
|
562 |
return 0; |
563 |
} |
564 |
|
565 |
bool kvm_arch_stop_on_emulation_error(CPUState *env)
|
566 |
{ |
567 |
return true; |
568 |
} |
569 |
|
570 |
int kvm_arch_on_sigbus_vcpu(CPUState *env, int code, void *addr) |
571 |
{ |
572 |
return 1; |
573 |
} |
574 |
|
575 |
int kvm_arch_on_sigbus(int code, void *addr) |
576 |
{ |
577 |
return 1; |
578 |
} |