root / tcg / tcg-op.h @ fb50d413
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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/* legacy dyngen operations */
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#include "gen-op.h" |
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGv arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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} |
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static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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} |
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static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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} |
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static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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} |
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static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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} |
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static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5, TCGv arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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*gen_opparam_ptr++ = GET_TCGV(arg6); |
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} |
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static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5, TCGArg arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{ |
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tcg_gen_op1i(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_br(int label) |
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{ |
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tcg_gen_op1i(INDEX_op_br, label); |
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} |
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static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
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{ |
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
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{ |
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tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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} |
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static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4) |
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{ |
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 4, args); |
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} |
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static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 0, NULL); |
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} |
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static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 1, &arg1); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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} |
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static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 4, args); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_movi_i32(ret, 0);
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} else if (arg2 == 0xffffffff) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0xffffffff) { |
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tcg_gen_movi_i32(ret, 0xffffffff);
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} else if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
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} |
377 |
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static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
382 |
|
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static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
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} |
387 |
|
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static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
392 |
|
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static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
396 |
} |
397 |
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static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); |
401 |
} |
402 |
|
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static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
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int label_index)
|
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{ |
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tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
407 |
} |
408 |
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static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
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} |
413 |
|
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#ifdef TCG_TARGET_HAS_div_i32
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static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
418 |
} |
419 |
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static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
423 |
} |
424 |
|
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static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
428 |
} |
429 |
|
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static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
431 |
{ |
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tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
433 |
} |
434 |
#else
|
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static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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TCGv t0; |
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t0 = tcg_temp_new(TCG_TYPE_I32); |
439 |
tcg_gen_sari_i32(t0, arg1, 31);
|
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tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
441 |
} |
442 |
|
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static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
444 |
{ |
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TCGv t0; |
446 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
447 |
tcg_gen_sari_i32(t0, arg1, 31);
|
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tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
449 |
} |
450 |
|
451 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
452 |
{ |
453 |
TCGv t0; |
454 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
455 |
tcg_gen_movi_i32(t0, 0);
|
456 |
tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
457 |
} |
458 |
|
459 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
460 |
{ |
461 |
TCGv t0; |
462 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
463 |
tcg_gen_movi_i32(t0, 0);
|
464 |
tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
465 |
} |
466 |
#endif
|
467 |
|
468 |
#if TCG_TARGET_REG_BITS == 32 |
469 |
|
470 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
471 |
{ |
472 |
tcg_gen_mov_i32(ret, arg); |
473 |
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
474 |
} |
475 |
|
476 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
477 |
{ |
478 |
tcg_gen_movi_i32(ret, arg); |
479 |
tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
|
480 |
} |
481 |
|
482 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
483 |
{ |
484 |
tcg_gen_ld8u_i32(ret, arg2, offset); |
485 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
486 |
} |
487 |
|
488 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
489 |
{ |
490 |
tcg_gen_ld8s_i32(ret, arg2, offset); |
491 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
492 |
} |
493 |
|
494 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
495 |
{ |
496 |
tcg_gen_ld16u_i32(ret, arg2, offset); |
497 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
498 |
} |
499 |
|
500 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
501 |
{ |
502 |
tcg_gen_ld16s_i32(ret, arg2, offset); |
503 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
504 |
} |
505 |
|
506 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
507 |
{ |
508 |
tcg_gen_ld_i32(ret, arg2, offset); |
509 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
510 |
} |
511 |
|
512 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
513 |
{ |
514 |
tcg_gen_ld_i32(ret, arg2, offset); |
515 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
516 |
} |
517 |
|
518 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
519 |
{ |
520 |
/* since arg2 and ret have different types, they cannot be the
|
521 |
same temporary */
|
522 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
523 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
524 |
tcg_gen_ld_i32(ret, arg2, offset + 4);
|
525 |
#else
|
526 |
tcg_gen_ld_i32(ret, arg2, offset); |
527 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
528 |
#endif
|
529 |
} |
530 |
|
531 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
532 |
{ |
533 |
tcg_gen_st8_i32(arg1, arg2, offset); |
534 |
} |
535 |
|
536 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
537 |
{ |
538 |
tcg_gen_st16_i32(arg1, arg2, offset); |
539 |
} |
540 |
|
541 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
542 |
{ |
543 |
tcg_gen_st_i32(arg1, arg2, offset); |
544 |
} |
545 |
|
546 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
547 |
{ |
548 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
549 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
550 |
tcg_gen_st_i32(arg1, arg2, offset + 4);
|
551 |
#else
|
552 |
tcg_gen_st_i32(arg1, arg2, offset); |
553 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
554 |
#endif
|
555 |
} |
556 |
|
557 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
558 |
{ |
559 |
tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
560 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
561 |
} |
562 |
|
563 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
564 |
{ |
565 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
566 |
} |
567 |
|
568 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
569 |
{ |
570 |
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
571 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
572 |
} |
573 |
|
574 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
575 |
{ |
576 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
577 |
} |
578 |
|
579 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
580 |
{ |
581 |
tcg_gen_and_i32(ret, arg1, arg2); |
582 |
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
583 |
} |
584 |
|
585 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
586 |
{ |
587 |
tcg_gen_andi_i32(ret, arg1, arg2); |
588 |
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
589 |
} |
590 |
|
591 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
592 |
{ |
593 |
tcg_gen_or_i32(ret, arg1, arg2); |
594 |
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
595 |
} |
596 |
|
597 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
598 |
{ |
599 |
tcg_gen_ori_i32(ret, arg1, arg2); |
600 |
tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
601 |
} |
602 |
|
603 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
604 |
{ |
605 |
tcg_gen_xor_i32(ret, arg1, arg2); |
606 |
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
607 |
} |
608 |
|
609 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
610 |
{ |
611 |
tcg_gen_xori_i32(ret, arg1, arg2); |
612 |
tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
613 |
} |
614 |
|
615 |
/* XXX: use generic code when basic block handling is OK or CPU
|
616 |
specific code (x86) */
|
617 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
618 |
{ |
619 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
620 |
} |
621 |
|
622 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
623 |
{ |
624 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
625 |
} |
626 |
|
627 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
628 |
{ |
629 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
630 |
} |
631 |
|
632 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
633 |
{ |
634 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
635 |
} |
636 |
|
637 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
638 |
{ |
639 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
640 |
} |
641 |
|
642 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
643 |
{ |
644 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
645 |
} |
646 |
|
647 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
648 |
int label_index)
|
649 |
{ |
650 |
tcg_gen_op6ii(INDEX_op_brcond2_i32, |
651 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
652 |
cond, label_index); |
653 |
} |
654 |
|
655 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
656 |
{ |
657 |
TCGv t0, t1; |
658 |
|
659 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
660 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
661 |
|
662 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
663 |
|
664 |
tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
665 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
666 |
tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
667 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
668 |
|
669 |
tcg_gen_mov_i64(ret, t0); |
670 |
} |
671 |
|
672 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
673 |
{ |
674 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
675 |
} |
676 |
|
677 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
678 |
{ |
679 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
680 |
} |
681 |
|
682 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
683 |
{ |
684 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
685 |
} |
686 |
|
687 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
688 |
{ |
689 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
690 |
} |
691 |
|
692 |
#else
|
693 |
|
694 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
695 |
{ |
696 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
697 |
} |
698 |
|
699 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
700 |
{ |
701 |
tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
702 |
} |
703 |
|
704 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
705 |
tcg_target_long offset) |
706 |
{ |
707 |
tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
708 |
} |
709 |
|
710 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
711 |
tcg_target_long offset) |
712 |
{ |
713 |
tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
714 |
} |
715 |
|
716 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
717 |
tcg_target_long offset) |
718 |
{ |
719 |
tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
720 |
} |
721 |
|
722 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
723 |
tcg_target_long offset) |
724 |
{ |
725 |
tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
726 |
} |
727 |
|
728 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
729 |
tcg_target_long offset) |
730 |
{ |
731 |
tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
732 |
} |
733 |
|
734 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
735 |
tcg_target_long offset) |
736 |
{ |
737 |
tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
738 |
} |
739 |
|
740 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
741 |
{ |
742 |
tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
743 |
} |
744 |
|
745 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
746 |
tcg_target_long offset) |
747 |
{ |
748 |
tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
749 |
} |
750 |
|
751 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
752 |
tcg_target_long offset) |
753 |
{ |
754 |
tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
755 |
} |
756 |
|
757 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
758 |
tcg_target_long offset) |
759 |
{ |
760 |
tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
761 |
} |
762 |
|
763 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
764 |
{ |
765 |
tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
766 |
} |
767 |
|
768 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
769 |
{ |
770 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
771 |
} |
772 |
|
773 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
774 |
{ |
775 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
776 |
} |
777 |
|
778 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
779 |
{ |
780 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
781 |
} |
782 |
|
783 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
784 |
{ |
785 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
786 |
} |
787 |
|
788 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
789 |
{ |
790 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
791 |
} |
792 |
|
793 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
794 |
{ |
795 |
tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); |
796 |
} |
797 |
|
798 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
799 |
{ |
800 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
801 |
} |
802 |
|
803 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
804 |
{ |
805 |
tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); |
806 |
} |
807 |
|
808 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
809 |
{ |
810 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
811 |
} |
812 |
|
813 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
814 |
{ |
815 |
tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); |
816 |
} |
817 |
|
818 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
819 |
{ |
820 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
821 |
} |
822 |
|
823 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
824 |
{ |
825 |
tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); |
826 |
} |
827 |
|
828 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
829 |
{ |
830 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
831 |
} |
832 |
|
833 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
834 |
{ |
835 |
tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); |
836 |
} |
837 |
|
838 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
839 |
{ |
840 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
841 |
} |
842 |
|
843 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
844 |
{ |
845 |
tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); |
846 |
} |
847 |
|
848 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
849 |
int label_index)
|
850 |
{ |
851 |
tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
852 |
} |
853 |
|
854 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
855 |
{ |
856 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
857 |
} |
858 |
|
859 |
#ifdef TCG_TARGET_HAS_div_i64
|
860 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
861 |
{ |
862 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
863 |
} |
864 |
|
865 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
866 |
{ |
867 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
868 |
} |
869 |
|
870 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
871 |
{ |
872 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
873 |
} |
874 |
|
875 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
876 |
{ |
877 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
878 |
} |
879 |
#else
|
880 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
881 |
{ |
882 |
TCGv t0; |
883 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
884 |
tcg_gen_sari_i64(t0, arg1, 63);
|
885 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
886 |
} |
887 |
|
888 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
889 |
{ |
890 |
TCGv t0; |
891 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
892 |
tcg_gen_sari_i64(t0, arg1, 63);
|
893 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
894 |
} |
895 |
|
896 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
897 |
{ |
898 |
TCGv t0; |
899 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
900 |
tcg_gen_movi_i64(t0, 0);
|
901 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
902 |
} |
903 |
|
904 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
905 |
{ |
906 |
TCGv t0; |
907 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
908 |
tcg_gen_movi_i64(t0, 0);
|
909 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
910 |
} |
911 |
#endif
|
912 |
|
913 |
#endif
|
914 |
|
915 |
/***************************************/
|
916 |
/* optional operations */
|
917 |
|
918 |
static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
919 |
{ |
920 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
921 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
922 |
#else
|
923 |
tcg_gen_shli_i32(ret, arg, 24);
|
924 |
tcg_gen_sari_i32(ret, ret, 24);
|
925 |
#endif
|
926 |
} |
927 |
|
928 |
static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
929 |
{ |
930 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
931 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
932 |
#else
|
933 |
tcg_gen_shli_i32(ret, arg, 16);
|
934 |
tcg_gen_sari_i32(ret, ret, 16);
|
935 |
#endif
|
936 |
} |
937 |
|
938 |
/* Note: we assume the two high bytes are set to zero */
|
939 |
static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
940 |
{ |
941 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
942 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
943 |
#else
|
944 |
TCGv t0, t1; |
945 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
946 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
947 |
|
948 |
tcg_gen_shri_i32(t0, arg, 8);
|
949 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
950 |
tcg_gen_shli_i32(t1, t1, 8);
|
951 |
tcg_gen_or_i32(ret, t0, t1); |
952 |
#endif
|
953 |
} |
954 |
|
955 |
static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
956 |
{ |
957 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
958 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
959 |
#else
|
960 |
TCGv t0, t1; |
961 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
962 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
963 |
|
964 |
tcg_gen_shli_i32(t0, arg, 24);
|
965 |
|
966 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
967 |
tcg_gen_shli_i32(t1, t1, 8);
|
968 |
tcg_gen_or_i32(t0, t0, t1); |
969 |
|
970 |
tcg_gen_shri_i32(t1, arg, 8);
|
971 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
972 |
tcg_gen_or_i32(t0, t0, t1); |
973 |
|
974 |
tcg_gen_shri_i32(t1, arg, 24);
|
975 |
tcg_gen_or_i32(ret, t0, t1); |
976 |
#endif
|
977 |
} |
978 |
|
979 |
#if TCG_TARGET_REG_BITS == 32 |
980 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
981 |
{ |
982 |
tcg_gen_ext8s_i32(ret, arg); |
983 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
984 |
} |
985 |
|
986 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
987 |
{ |
988 |
tcg_gen_ext16s_i32(ret, arg); |
989 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
990 |
} |
991 |
|
992 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
993 |
{ |
994 |
tcg_gen_mov_i32(ret, arg); |
995 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
996 |
} |
997 |
|
998 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
999 |
{ |
1000 |
tcg_gen_mov_i32(ret, arg); |
1001 |
} |
1002 |
|
1003 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1004 |
{ |
1005 |
tcg_gen_mov_i32(ret, arg); |
1006 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1007 |
} |
1008 |
|
1009 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1010 |
{ |
1011 |
tcg_gen_mov_i32(ret, arg); |
1012 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1013 |
} |
1014 |
|
1015 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1016 |
{ |
1017 |
TCGv t0, t1; |
1018 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1019 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1020 |
|
1021 |
tcg_gen_bswap_i32(t0, arg); |
1022 |
tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
1023 |
tcg_gen_mov_i32(ret, t1); |
1024 |
tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
1025 |
} |
1026 |
#else
|
1027 |
|
1028 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1029 |
{ |
1030 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
1031 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
1032 |
#else
|
1033 |
tcg_gen_shli_i64(ret, arg, 56);
|
1034 |
tcg_gen_sari_i64(ret, ret, 56);
|
1035 |
#endif
|
1036 |
} |
1037 |
|
1038 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1039 |
{ |
1040 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
1041 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
1042 |
#else
|
1043 |
tcg_gen_shli_i64(ret, arg, 48);
|
1044 |
tcg_gen_sari_i64(ret, ret, 48);
|
1045 |
#endif
|
1046 |
} |
1047 |
|
1048 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1049 |
{ |
1050 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
1051 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
1052 |
#else
|
1053 |
tcg_gen_shli_i64(ret, arg, 32);
|
1054 |
tcg_gen_sari_i64(ret, ret, 32);
|
1055 |
#endif
|
1056 |
} |
1057 |
|
1058 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1059 |
registers. This will probably break MIPS64 targets. */
|
1060 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1061 |
{ |
1062 |
tcg_gen_mov_i32(ret, arg); |
1063 |
} |
1064 |
|
1065 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1066 |
registers */
|
1067 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1068 |
{ |
1069 |
tcg_gen_andi_i64(ret, arg, 0xffffffff);
|
1070 |
} |
1071 |
|
1072 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1073 |
registers */
|
1074 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1075 |
{ |
1076 |
tcg_gen_ext32s_i64(ret, arg); |
1077 |
} |
1078 |
|
1079 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1080 |
{ |
1081 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
1082 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
1083 |
#else
|
1084 |
TCGv t0, t1; |
1085 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1086 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1087 |
|
1088 |
tcg_gen_shli_i64(t0, arg, 56);
|
1089 |
|
1090 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
1091 |
tcg_gen_shli_i64(t1, t1, 40);
|
1092 |
tcg_gen_or_i64(t0, t0, t1); |
1093 |
|
1094 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
1095 |
tcg_gen_shli_i64(t1, t1, 24);
|
1096 |
tcg_gen_or_i64(t0, t0, t1); |
1097 |
|
1098 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
1099 |
tcg_gen_shli_i64(t1, t1, 8);
|
1100 |
tcg_gen_or_i64(t0, t0, t1); |
1101 |
|
1102 |
tcg_gen_shri_i64(t1, arg, 8);
|
1103 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
1104 |
tcg_gen_or_i64(t0, t0, t1); |
1105 |
|
1106 |
tcg_gen_shri_i64(t1, arg, 24);
|
1107 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
1108 |
tcg_gen_or_i64(t0, t0, t1); |
1109 |
|
1110 |
tcg_gen_shri_i64(t1, arg, 40);
|
1111 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
1112 |
tcg_gen_or_i64(t0, t0, t1); |
1113 |
|
1114 |
tcg_gen_shri_i64(t1, arg, 56);
|
1115 |
tcg_gen_or_i64(ret, t0, t1); |
1116 |
#endif
|
1117 |
} |
1118 |
|
1119 |
#endif
|
1120 |
|
1121 |
|
1122 |
static inline void tcg_gen_discard_i32(TCGv arg) |
1123 |
{ |
1124 |
tcg_gen_op1(INDEX_op_discard, arg); |
1125 |
} |
1126 |
|
1127 |
#if TCG_TARGET_REG_BITS == 32 |
1128 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1129 |
{ |
1130 |
tcg_gen_discard_i32(arg); |
1131 |
tcg_gen_discard_i32(TCGV_HIGH(arg)); |
1132 |
} |
1133 |
#else
|
1134 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1135 |
{ |
1136 |
tcg_gen_op1(INDEX_op_discard, arg); |
1137 |
} |
1138 |
#endif
|
1139 |
|
1140 |
/***************************************/
|
1141 |
static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
1142 |
{ |
1143 |
tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
1144 |
} |
1145 |
|
1146 |
/***************************************/
|
1147 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
1148 |
type. */
|
1149 |
#ifndef TARGET_LONG_BITS
|
1150 |
#error must include QEMU headers
|
1151 |
#endif
|
1152 |
|
1153 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
1154 |
{ |
1155 |
tcg_gen_op1i(INDEX_op_exit_tb, val); |
1156 |
} |
1157 |
|
1158 |
static inline void tcg_gen_goto_tb(int idx) |
1159 |
{ |
1160 |
tcg_gen_op1i(INDEX_op_goto_tb, idx); |
1161 |
} |
1162 |
|
1163 |
#if TCG_TARGET_REG_BITS == 32 |
1164 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1165 |
{ |
1166 |
#if TARGET_LONG_BITS == 32 |
1167 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1168 |
#else
|
1169 |
tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1170 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1171 |
#endif
|
1172 |
} |
1173 |
|
1174 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1175 |
{ |
1176 |
#if TARGET_LONG_BITS == 32 |
1177 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1178 |
#else
|
1179 |
tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
1180 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1181 |
#endif
|
1182 |
} |
1183 |
|
1184 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1185 |
{ |
1186 |
#if TARGET_LONG_BITS == 32 |
1187 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1188 |
#else
|
1189 |
tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1190 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1191 |
#endif
|
1192 |
} |
1193 |
|
1194 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1195 |
{ |
1196 |
#if TARGET_LONG_BITS == 32 |
1197 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1198 |
#else
|
1199 |
tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
1200 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1201 |
#endif
|
1202 |
} |
1203 |
|
1204 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1205 |
{ |
1206 |
#if TARGET_LONG_BITS == 32 |
1207 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1208 |
#else
|
1209 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1210 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1211 |
#endif
|
1212 |
} |
1213 |
|
1214 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1215 |
{ |
1216 |
#if TARGET_LONG_BITS == 32 |
1217 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1218 |
#else
|
1219 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1220 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1221 |
#endif
|
1222 |
} |
1223 |
|
1224 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1225 |
{ |
1226 |
#if TARGET_LONG_BITS == 32 |
1227 |
tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
1228 |
#else
|
1229 |
tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1230 |
addr, TCGV_HIGH(addr), mem_index); |
1231 |
#endif
|
1232 |
} |
1233 |
|
1234 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1235 |
{ |
1236 |
#if TARGET_LONG_BITS == 32 |
1237 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1238 |
#else
|
1239 |
tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
1240 |
#endif
|
1241 |
} |
1242 |
|
1243 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1244 |
{ |
1245 |
#if TARGET_LONG_BITS == 32 |
1246 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1247 |
#else
|
1248 |
tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
1249 |
#endif
|
1250 |
} |
1251 |
|
1252 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1253 |
{ |
1254 |
#if TARGET_LONG_BITS == 32 |
1255 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1256 |
#else
|
1257 |
tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
1258 |
#endif
|
1259 |
} |
1260 |
|
1261 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1262 |
{ |
1263 |
#if TARGET_LONG_BITS == 32 |
1264 |
tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
1265 |
#else
|
1266 |
tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1267 |
addr, TCGV_HIGH(addr), mem_index); |
1268 |
#endif
|
1269 |
} |
1270 |
|
1271 |
#define tcg_gen_ld_ptr tcg_gen_ld_i32
|
1272 |
#define tcg_gen_discard_ptr tcg_gen_discard_i32
|
1273 |
|
1274 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1275 |
|
1276 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1277 |
{ |
1278 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1279 |
} |
1280 |
|
1281 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1282 |
{ |
1283 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1284 |
} |
1285 |
|
1286 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1287 |
{ |
1288 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1289 |
} |
1290 |
|
1291 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1292 |
{ |
1293 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1294 |
} |
1295 |
|
1296 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1297 |
{ |
1298 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1299 |
} |
1300 |
|
1301 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1302 |
{ |
1303 |
tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
1304 |
} |
1305 |
|
1306 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1307 |
{ |
1308 |
tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
1309 |
} |
1310 |
|
1311 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1312 |
{ |
1313 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1314 |
} |
1315 |
|
1316 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1317 |
{ |
1318 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1319 |
} |
1320 |
|
1321 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1322 |
{ |
1323 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1324 |
} |
1325 |
|
1326 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1327 |
{ |
1328 |
tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
1329 |
} |
1330 |
|
1331 |
#define tcg_gen_ld_ptr tcg_gen_ld_i64
|
1332 |
#define tcg_gen_discard_ptr tcg_gen_discard_i64
|
1333 |
|
1334 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1335 |
|
1336 |
#if TARGET_LONG_BITS == 64 |
1337 |
#define TCG_TYPE_TL TCG_TYPE_I64
|
1338 |
#define tcg_gen_movi_tl tcg_gen_movi_i64
|
1339 |
#define tcg_gen_mov_tl tcg_gen_mov_i64
|
1340 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
|
1341 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
|
1342 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
|
1343 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
|
1344 |
#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
|
1345 |
#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
|
1346 |
#define tcg_gen_ld_tl tcg_gen_ld_i64
|
1347 |
#define tcg_gen_st8_tl tcg_gen_st8_i64
|
1348 |
#define tcg_gen_st16_tl tcg_gen_st16_i64
|
1349 |
#define tcg_gen_st32_tl tcg_gen_st32_i64
|
1350 |
#define tcg_gen_st_tl tcg_gen_st_i64
|
1351 |
#define tcg_gen_add_tl tcg_gen_add_i64
|
1352 |
#define tcg_gen_addi_tl tcg_gen_addi_i64
|
1353 |
#define tcg_gen_sub_tl tcg_gen_sub_i64
|
1354 |
#define tcg_gen_subi_tl tcg_gen_subi_i64
|
1355 |
#define tcg_gen_and_tl tcg_gen_and_i64
|
1356 |
#define tcg_gen_andi_tl tcg_gen_andi_i64
|
1357 |
#define tcg_gen_or_tl tcg_gen_or_i64
|
1358 |
#define tcg_gen_ori_tl tcg_gen_ori_i64
|
1359 |
#define tcg_gen_xor_tl tcg_gen_xor_i64
|
1360 |
#define tcg_gen_xori_tl tcg_gen_xori_i64
|
1361 |
#define tcg_gen_shl_tl tcg_gen_shl_i64
|
1362 |
#define tcg_gen_shli_tl tcg_gen_shli_i64
|
1363 |
#define tcg_gen_shr_tl tcg_gen_shr_i64
|
1364 |
#define tcg_gen_shri_tl tcg_gen_shri_i64
|
1365 |
#define tcg_gen_sar_tl tcg_gen_sar_i64
|
1366 |
#define tcg_gen_sari_tl tcg_gen_sari_i64
|
1367 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
|
1368 |
#define tcg_gen_discard_tl tcg_gen_discard_i64
|
1369 |
#define tcg_const_tl tcg_const_i64
|
1370 |
#else
|
1371 |
#define TCG_TYPE_TL TCG_TYPE_I32
|
1372 |
#define tcg_gen_movi_tl tcg_gen_movi_i32
|
1373 |
#define tcg_gen_mov_tl tcg_gen_mov_i32
|
1374 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
|
1375 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
|
1376 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
|
1377 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
|
1378 |
#define tcg_gen_ld32u_tl tcg_gen_ld_i32
|
1379 |
#define tcg_gen_ld32s_tl tcg_gen_ld_i32
|
1380 |
#define tcg_gen_ld_tl tcg_gen_ld_i32
|
1381 |
#define tcg_gen_st8_tl tcg_gen_st8_i32
|
1382 |
#define tcg_gen_st16_tl tcg_gen_st16_i32
|
1383 |
#define tcg_gen_st32_tl tcg_gen_st_i32
|
1384 |
#define tcg_gen_st_tl tcg_gen_st_i32
|
1385 |
#define tcg_gen_add_tl tcg_gen_add_i32
|
1386 |
#define tcg_gen_addi_tl tcg_gen_addi_i32
|
1387 |
#define tcg_gen_sub_tl tcg_gen_sub_i32
|
1388 |
#define tcg_gen_subi_tl tcg_gen_subi_i32
|
1389 |
#define tcg_gen_and_tl tcg_gen_and_i32
|
1390 |
#define tcg_gen_andi_tl tcg_gen_andi_i32
|
1391 |
#define tcg_gen_or_tl tcg_gen_or_i32
|
1392 |
#define tcg_gen_ori_tl tcg_gen_ori_i32
|
1393 |
#define tcg_gen_xor_tl tcg_gen_xor_i32
|
1394 |
#define tcg_gen_xori_tl tcg_gen_xori_i32
|
1395 |
#define tcg_gen_shl_tl tcg_gen_shl_i32
|
1396 |
#define tcg_gen_shli_tl tcg_gen_shli_i32
|
1397 |
#define tcg_gen_shr_tl tcg_gen_shr_i32
|
1398 |
#define tcg_gen_shri_tl tcg_gen_shri_i32
|
1399 |
#define tcg_gen_sar_tl tcg_gen_sar_i32
|
1400 |
#define tcg_gen_sari_tl tcg_gen_sari_i32
|
1401 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
|
1402 |
#define tcg_gen_discard_tl tcg_gen_discard_i32
|
1403 |
#define tcg_const_tl tcg_const_i32
|
1404 |
#endif
|