Revision fb7729e2 target-mips/translate.c
| b/target-mips/translate.c | ||
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#define GEN_HELPER 1 |
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#include "helper.h" |
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//#define MIPS_DEBUG_DISAS
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#define MIPS_DEBUG_DISAS 0
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//#define MIPS_DEBUG_SIGN_EXTENSIONS |
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/* MIPS major opcodes */ |
| ... | ... | |
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", |
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", }; |
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#ifdef MIPS_DEBUG_DISAS |
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#define MIPS_DEBUG(fmt, ...) \ |
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qemu_log_mask(CPU_LOG_TB_IN_ASM, \ |
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TARGET_FMT_lx ": %08x " fmt "\n", \ |
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ctx->pc, ctx->opcode , ## __VA_ARGS__) |
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#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) |
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#else |
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#define MIPS_DEBUG(fmt, ...) do { } while(0)
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#define LOG_DISAS(...) do { } while (0)
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#endif |
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#define MIPS_DEBUG(fmt, ...) \ |
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do { \
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if (MIPS_DEBUG_DISAS) { \
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qemu_log_mask(CPU_LOG_TB_IN_ASM, \ |
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TARGET_FMT_lx ": %08x " fmt "\n", \ |
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ctx->pc, ctx->opcode , ## __VA_ARGS__); \ |
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} \ |
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} while (0) |
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#define LOG_DISAS(...) \ |
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do { \
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if (MIPS_DEBUG_DISAS) { \
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qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__); \ |
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} \ |
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} while (0) |
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#define MIPS_INVAL(op) \ |
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do { \
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MIPS_DEBUG("Invalid %s %03x %03x %03x", op, ctx->opcode >> 26, \
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ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)); \ |
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} while (0) |
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ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)) |
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/* General purpose registers moves. */ |
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static inline void gen_load_gpr (TCGv t, int reg) |
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