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1 | 87ecb68b | pbrook | #ifndef HW_PC_H
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2 | 87ecb68b | pbrook | #define HW_PC_H
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3 | 376253ec | aliguori | |
4 | 376253ec | aliguori | #include "qemu-common.h" |
5 | 376253ec | aliguori | |
6 | 87ecb68b | pbrook | /* PC-style peripherals (also used by other machines). */
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7 | 87ecb68b | pbrook | |
8 | 87ecb68b | pbrook | /* serial.c */
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9 | 87ecb68b | pbrook | |
10 | b6cd0ea1 | aurel32 | SerialState *serial_init(int base, qemu_irq irq, int baudbase, |
11 | b6cd0ea1 | aurel32 | CharDriverState *chr); |
12 | 87ecb68b | pbrook | SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
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13 | b6cd0ea1 | aurel32 | qemu_irq irq, int baudbase,
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14 | b6cd0ea1 | aurel32 | CharDriverState *chr, int ioregister);
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15 | 87ecb68b | pbrook | uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr);
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16 | 87ecb68b | pbrook | void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value); |
17 | 87ecb68b | pbrook | uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr);
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18 | 87ecb68b | pbrook | void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value); |
19 | 87ecb68b | pbrook | uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr);
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20 | 87ecb68b | pbrook | void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value); |
21 | 87ecb68b | pbrook | |
22 | 87ecb68b | pbrook | /* parallel.c */
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23 | 87ecb68b | pbrook | |
24 | 87ecb68b | pbrook | typedef struct ParallelState ParallelState; |
25 | 87ecb68b | pbrook | ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
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26 | 87ecb68b | pbrook | ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
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27 | 87ecb68b | pbrook | |
28 | 87ecb68b | pbrook | /* i8259.c */
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29 | 87ecb68b | pbrook | |
30 | 87ecb68b | pbrook | typedef struct PicState2 PicState2; |
31 | 87ecb68b | pbrook | extern PicState2 *isa_pic;
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32 | 87ecb68b | pbrook | void pic_set_irq(int irq, int level); |
33 | 87ecb68b | pbrook | void pic_set_irq_new(void *opaque, int irq, int level); |
34 | 87ecb68b | pbrook | qemu_irq *i8259_init(qemu_irq parent_irq); |
35 | 87ecb68b | pbrook | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
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36 | 87ecb68b | pbrook | void *alt_irq_opaque);
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37 | 87ecb68b | pbrook | int pic_read_irq(PicState2 *s);
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38 | 87ecb68b | pbrook | void pic_update_irq(PicState2 *s);
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39 | 87ecb68b | pbrook | uint32_t pic_intack_read(PicState2 *s); |
40 | 376253ec | aliguori | void pic_info(Monitor *mon);
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41 | 376253ec | aliguori | void irq_info(Monitor *mon);
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42 | 87ecb68b | pbrook | |
43 | 87ecb68b | pbrook | /* APIC */
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44 | 87ecb68b | pbrook | typedef struct IOAPICState IOAPICState; |
45 | 610626af | aliguori | void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
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46 | 610626af | aliguori | uint8_t delivery_mode, |
47 | 610626af | aliguori | uint8_t vector_num, uint8_t polarity, |
48 | 610626af | aliguori | uint8_t trigger_mode); |
49 | 87ecb68b | pbrook | int apic_init(CPUState *env);
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50 | 87ecb68b | pbrook | int apic_accept_pic_intr(CPUState *env);
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51 | 1a7de94a | aurel32 | void apic_deliver_pic_intr(CPUState *env, int level); |
52 | 87ecb68b | pbrook | int apic_get_interrupt(CPUState *env);
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53 | 87ecb68b | pbrook | IOAPICState *ioapic_init(void);
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54 | 87ecb68b | pbrook | void ioapic_set_irq(void *opaque, int vector, int level); |
55 | 73822ec8 | aliguori | void apic_reset_irq_delivered(void); |
56 | 73822ec8 | aliguori | int apic_get_irq_delivered(void); |
57 | 87ecb68b | pbrook | |
58 | 87ecb68b | pbrook | /* i8254.c */
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59 | 87ecb68b | pbrook | |
60 | 87ecb68b | pbrook | #define PIT_FREQ 1193182 |
61 | 87ecb68b | pbrook | |
62 | 87ecb68b | pbrook | typedef struct PITState PITState; |
63 | 87ecb68b | pbrook | |
64 | 87ecb68b | pbrook | PITState *pit_init(int base, qemu_irq irq);
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65 | 87ecb68b | pbrook | void pit_set_gate(PITState *pit, int channel, int val); |
66 | 87ecb68b | pbrook | int pit_get_gate(PITState *pit, int channel); |
67 | 87ecb68b | pbrook | int pit_get_initial_count(PITState *pit, int channel); |
68 | 87ecb68b | pbrook | int pit_get_mode(PITState *pit, int channel); |
69 | 87ecb68b | pbrook | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
70 | 87ecb68b | pbrook | |
71 | bf4f74c0 | aurel32 | void hpet_pit_disable(void); |
72 | bf4f74c0 | aurel32 | void hpet_pit_enable(void); |
73 | bf4f74c0 | aurel32 | |
74 | 87ecb68b | pbrook | /* vmport.c */
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75 | 26fb5e48 | aurel32 | void vmport_init(void); |
76 | 87ecb68b | pbrook | void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque); |
77 | 87ecb68b | pbrook | |
78 | 87ecb68b | pbrook | /* vmmouse.c */
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79 | 87ecb68b | pbrook | void *vmmouse_init(void *m); |
80 | 87ecb68b | pbrook | |
81 | 87ecb68b | pbrook | /* pckbd.c */
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82 | 87ecb68b | pbrook | |
83 | 87ecb68b | pbrook | void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
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84 | 87ecb68b | pbrook | void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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85 | 4efbe58f | aurel32 | target_phys_addr_t base, ram_addr_t size, |
86 | 4efbe58f | aurel32 | target_phys_addr_t mask); |
87 | 87ecb68b | pbrook | |
88 | 87ecb68b | pbrook | /* mc146818rtc.c */
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89 | 87ecb68b | pbrook | |
90 | 87ecb68b | pbrook | typedef struct RTCState RTCState; |
91 | 87ecb68b | pbrook | |
92 | 42fc73a1 | aurel32 | RTCState *rtc_init(int base, qemu_irq irq, int base_year); |
93 | 100d9891 | aurel32 | RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year); |
94 | 42fc73a1 | aurel32 | RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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95 | 42fc73a1 | aurel32 | int base_year);
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96 | 87ecb68b | pbrook | void rtc_set_memory(RTCState *s, int addr, int val); |
97 | 87ecb68b | pbrook | void rtc_set_date(RTCState *s, const struct tm *tm); |
98 | 0bacd130 | aliguori | void cmos_set_s3_resume(void); |
99 | 87ecb68b | pbrook | |
100 | 87ecb68b | pbrook | /* pc.c */
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101 | 87ecb68b | pbrook | extern int fd_bootchk; |
102 | 87ecb68b | pbrook | |
103 | 87ecb68b | pbrook | void ioport_set_a20(int enable); |
104 | 87ecb68b | pbrook | int ioport_get_a20(void); |
105 | 87ecb68b | pbrook | |
106 | 87ecb68b | pbrook | /* acpi.c */
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107 | 87ecb68b | pbrook | extern int acpi_enabled; |
108 | 80deece2 | blueswir1 | extern char *acpi_tables; |
109 | 80deece2 | blueswir1 | extern size_t acpi_tables_len;
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110 | 80deece2 | blueswir1 | |
111 | cf7a2fe2 | aurel32 | i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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112 | cf7a2fe2 | aurel32 | qemu_irq sci_irq); |
113 | 87ecb68b | pbrook | void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
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114 | 87ecb68b | pbrook | void acpi_bios_init(void); |
115 | 8a92ea2f | aliguori | int acpi_table_add(const char *table_desc); |
116 | 87ecb68b | pbrook | |
117 | 16b29ae1 | aliguori | /* hpet.c */
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118 | 16b29ae1 | aliguori | extern int no_hpet; |
119 | 16b29ae1 | aliguori | |
120 | 87ecb68b | pbrook | /* pcspk.c */
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121 | 87ecb68b | pbrook | void pcspk_init(PITState *);
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122 | 22d83b14 | Paul Brook | int pcspk_audio_init(qemu_irq *pic);
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123 | 87ecb68b | pbrook | |
124 | 87ecb68b | pbrook | /* piix_pci.c */
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125 | 87ecb68b | pbrook | PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic); |
126 | 87ecb68b | pbrook | void i440fx_set_smm(PCIDevice *d, int val); |
127 | 87ecb68b | pbrook | int piix3_init(PCIBus *bus, int devfn); |
128 | 87ecb68b | pbrook | void i440fx_init_memory_mappings(PCIDevice *d);
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129 | 87ecb68b | pbrook | |
130 | b1d8e52e | blueswir1 | extern PCIDevice *piix4_dev;
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131 | 87ecb68b | pbrook | int piix4_init(PCIBus *bus, int devfn); |
132 | 87ecb68b | pbrook | |
133 | 87ecb68b | pbrook | /* vga.c */
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134 | cb5a7aa8 | malc | enum vga_retrace_method {
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135 | cb5a7aa8 | malc | VGA_RETRACE_DUMB, |
136 | cb5a7aa8 | malc | VGA_RETRACE_PRECISE |
137 | cb5a7aa8 | malc | }; |
138 | cb5a7aa8 | malc | |
139 | cb5a7aa8 | malc | extern enum vga_retrace_method vga_retrace_method; |
140 | 87ecb68b | pbrook | |
141 | fbe1b595 | Paul Brook | int isa_vga_init(void); |
142 | fbe1b595 | Paul Brook | int pci_vga_init(PCIBus *bus,
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143 | 87ecb68b | pbrook | unsigned long vga_bios_offset, int vga_bios_size); |
144 | fbe1b595 | Paul Brook | int isa_vga_mm_init(target_phys_addr_t vram_base,
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145 | b584726d | pbrook | target_phys_addr_t ctrl_base, int it_shift);
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146 | 87ecb68b | pbrook | |
147 | 87ecb68b | pbrook | /* cirrus_vga.c */
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148 | fbe1b595 | Paul Brook | void pci_cirrus_vga_init(PCIBus *bus);
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149 | fbe1b595 | Paul Brook | void isa_cirrus_vga_init(void); |
150 | 87ecb68b | pbrook | |
151 | 87ecb68b | pbrook | /* ide.c */
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152 | 87ecb68b | pbrook | void isa_ide_init(int iobase, int iobase2, qemu_irq irq, |
153 | 87ecb68b | pbrook | BlockDriverState *hd0, BlockDriverState *hd1); |
154 | 87ecb68b | pbrook | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
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155 | 87ecb68b | pbrook | int secondary_ide_enabled);
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156 | 87ecb68b | pbrook | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, |
157 | 87ecb68b | pbrook | qemu_irq *pic); |
158 | 87ecb68b | pbrook | void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, |
159 | 87ecb68b | pbrook | qemu_irq *pic); |
160 | 87ecb68b | pbrook | |
161 | 87ecb68b | pbrook | /* ne2000.c */
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162 | 87ecb68b | pbrook | |
163 | 87ecb68b | pbrook | void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd); |
164 | 87ecb68b | pbrook | |
165 | 87ecb68b | pbrook | #endif |