root / disas.c @ fc9902d9
History | View | Annotate | Download (10.5 kB)
1 | b9adb4a6 | bellard | /* General "disassemble this chunk" code. Used for debugging. */
|
---|---|---|---|
2 | 5bbe9299 | bellard | #include "config.h" |
3 | b9adb4a6 | bellard | #include "dis-asm.h" |
4 | b9adb4a6 | bellard | #include "elf.h" |
5 | aa0aa4fa | bellard | #include <errno.h> |
6 | b9adb4a6 | bellard | |
7 | c6105c0a | bellard | #include "cpu.h" |
8 | c6105c0a | bellard | #include "exec-all.h" |
9 | 9307c4c1 | bellard | #include "disas.h" |
10 | c6105c0a | bellard | |
11 | b9adb4a6 | bellard | /* Filled in by elfload.c. Simplistic, but will do for now. */
|
12 | e80cfcfc | bellard | struct syminfo *syminfos = NULL; |
13 | b9adb4a6 | bellard | |
14 | aa0aa4fa | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
|
15 | aa0aa4fa | bellard | Transfer them to myaddr. */
|
16 | aa0aa4fa | bellard | int
|
17 | 3a742b76 | pbrook | buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
|
18 | 3a742b76 | pbrook | struct disassemble_info *info)
|
19 | aa0aa4fa | bellard | { |
20 | c6105c0a | bellard | if (memaddr < info->buffer_vma
|
21 | c6105c0a | bellard | || memaddr + length > info->buffer_vma + info->buffer_length) |
22 | c6105c0a | bellard | /* Out of bounds. Use EIO because GDB uses it. */
|
23 | c6105c0a | bellard | return EIO;
|
24 | c6105c0a | bellard | memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length); |
25 | c6105c0a | bellard | return 0; |
26 | aa0aa4fa | bellard | } |
27 | aa0aa4fa | bellard | |
28 | c6105c0a | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
|
29 | c6105c0a | bellard | Transfer them to myaddr. */
|
30 | c6105c0a | bellard | static int |
31 | c27004ec | bellard | target_read_memory (bfd_vma memaddr, |
32 | c27004ec | bellard | bfd_byte *myaddr, |
33 | c27004ec | bellard | int length,
|
34 | c27004ec | bellard | struct disassemble_info *info)
|
35 | c6105c0a | bellard | { |
36 | c6105c0a | bellard | int i;
|
37 | c6105c0a | bellard | for(i = 0; i < length; i++) { |
38 | c27004ec | bellard | myaddr[i] = ldub_code(memaddr + i); |
39 | c6105c0a | bellard | } |
40 | c6105c0a | bellard | return 0; |
41 | c6105c0a | bellard | } |
42 | c6105c0a | bellard | |
43 | aa0aa4fa | bellard | /* Print an error message. We can assume that this is in response to
|
44 | aa0aa4fa | bellard | an error return from buffer_read_memory. */
|
45 | aa0aa4fa | bellard | void
|
46 | 3a742b76 | pbrook | perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info) |
47 | aa0aa4fa | bellard | { |
48 | aa0aa4fa | bellard | if (status != EIO)
|
49 | aa0aa4fa | bellard | /* Can't happen. */
|
50 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
|
51 | aa0aa4fa | bellard | else
|
52 | aa0aa4fa | bellard | /* Actually, address between memaddr and memaddr + len was
|
53 | aa0aa4fa | bellard | out of bounds. */
|
54 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, |
55 | 26a76461 | bellard | "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); |
56 | aa0aa4fa | bellard | } |
57 | aa0aa4fa | bellard | |
58 | aa0aa4fa | bellard | /* This could be in a separate file, to save miniscule amounts of space
|
59 | aa0aa4fa | bellard | in statically linked executables. */
|
60 | aa0aa4fa | bellard | |
61 | aa0aa4fa | bellard | /* Just print the address is hex. This is included for completeness even
|
62 | aa0aa4fa | bellard | though both GDB and objdump provide their own (to print symbolic
|
63 | aa0aa4fa | bellard | addresses). */
|
64 | aa0aa4fa | bellard | |
65 | aa0aa4fa | bellard | void
|
66 | 3a742b76 | pbrook | generic_print_address (bfd_vma addr, struct disassemble_info *info)
|
67 | aa0aa4fa | bellard | { |
68 | 26a76461 | bellard | (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
|
69 | aa0aa4fa | bellard | } |
70 | aa0aa4fa | bellard | |
71 | aa0aa4fa | bellard | /* Just return the given address. */
|
72 | aa0aa4fa | bellard | |
73 | aa0aa4fa | bellard | int
|
74 | 3a742b76 | pbrook | generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
|
75 | aa0aa4fa | bellard | { |
76 | aa0aa4fa | bellard | return 1; |
77 | aa0aa4fa | bellard | } |
78 | aa0aa4fa | bellard | |
79 | aa0aa4fa | bellard | bfd_vma bfd_getl32 (const bfd_byte *addr)
|
80 | aa0aa4fa | bellard | { |
81 | aa0aa4fa | bellard | unsigned long v; |
82 | aa0aa4fa | bellard | |
83 | aa0aa4fa | bellard | v = (unsigned long) addr[0]; |
84 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 8; |
85 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 16; |
86 | aa0aa4fa | bellard | v |= (unsigned long) addr[3] << 24; |
87 | aa0aa4fa | bellard | return (bfd_vma) v;
|
88 | aa0aa4fa | bellard | } |
89 | aa0aa4fa | bellard | |
90 | aa0aa4fa | bellard | bfd_vma bfd_getb32 (const bfd_byte *addr)
|
91 | aa0aa4fa | bellard | { |
92 | aa0aa4fa | bellard | unsigned long v; |
93 | aa0aa4fa | bellard | |
94 | aa0aa4fa | bellard | v = (unsigned long) addr[0] << 24; |
95 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 16; |
96 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 8; |
97 | aa0aa4fa | bellard | v |= (unsigned long) addr[3]; |
98 | aa0aa4fa | bellard | return (bfd_vma) v;
|
99 | aa0aa4fa | bellard | } |
100 | aa0aa4fa | bellard | |
101 | 6af0bf9c | bellard | bfd_vma bfd_getl16 (const bfd_byte *addr)
|
102 | 6af0bf9c | bellard | { |
103 | 6af0bf9c | bellard | unsigned long v; |
104 | 6af0bf9c | bellard | |
105 | 6af0bf9c | bellard | v = (unsigned long) addr[0]; |
106 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 8; |
107 | 6af0bf9c | bellard | return (bfd_vma) v;
|
108 | 6af0bf9c | bellard | } |
109 | 6af0bf9c | bellard | |
110 | 6af0bf9c | bellard | bfd_vma bfd_getb16 (const bfd_byte *addr)
|
111 | 6af0bf9c | bellard | { |
112 | 6af0bf9c | bellard | unsigned long v; |
113 | 6af0bf9c | bellard | |
114 | 6af0bf9c | bellard | v = (unsigned long) addr[0] << 24; |
115 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 16; |
116 | 6af0bf9c | bellard | return (bfd_vma) v;
|
117 | 6af0bf9c | bellard | } |
118 | 6af0bf9c | bellard | |
119 | c2d551ff | bellard | #ifdef TARGET_ARM
|
120 | c2d551ff | bellard | static int |
121 | c2d551ff | bellard | print_insn_thumb1(bfd_vma pc, disassemble_info *info) |
122 | c2d551ff | bellard | { |
123 | c2d551ff | bellard | return print_insn_arm(pc | 1, info); |
124 | c2d551ff | bellard | } |
125 | c2d551ff | bellard | #endif
|
126 | c2d551ff | bellard | |
127 | e91c8a77 | ths | /* Disassemble this for me please... (debugging). 'flags' has the following
|
128 | c2d551ff | bellard | values:
|
129 | c2d551ff | bellard | i386 - nonzero means 16 bit code
|
130 | 5fafdf24 | ths | arm - nonzero means thumb code
|
131 | 6a00d601 | bellard | ppc - nonzero means little endian
|
132 | c2d551ff | bellard | other targets - unused
|
133 | c2d551ff | bellard | */
|
134 | 83b34f8b | bellard | void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) |
135 | b9adb4a6 | bellard | { |
136 | c27004ec | bellard | target_ulong pc; |
137 | b9adb4a6 | bellard | int count;
|
138 | b9adb4a6 | bellard | struct disassemble_info disasm_info;
|
139 | b9adb4a6 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
|
140 | b9adb4a6 | bellard | |
141 | b9adb4a6 | bellard | INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); |
142 | b9adb4a6 | bellard | |
143 | c27004ec | bellard | disasm_info.read_memory_func = target_read_memory; |
144 | c27004ec | bellard | disasm_info.buffer_vma = code; |
145 | c27004ec | bellard | disasm_info.buffer_length = size; |
146 | c27004ec | bellard | |
147 | c27004ec | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
148 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
149 | c27004ec | bellard | #else
|
150 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
151 | c27004ec | bellard | #endif
|
152 | c27004ec | bellard | #if defined(TARGET_I386)
|
153 | c27004ec | bellard | if (flags == 2) |
154 | c27004ec | bellard | disasm_info.mach = bfd_mach_x86_64; |
155 | 5fafdf24 | ths | else if (flags == 1) |
156 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
157 | c27004ec | bellard | else
|
158 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i386; |
159 | c27004ec | bellard | print_insn = print_insn_i386; |
160 | c27004ec | bellard | #elif defined(TARGET_ARM)
|
161 | c2d551ff | bellard | if (flags)
|
162 | c2d551ff | bellard | print_insn = print_insn_thumb1; |
163 | c2d551ff | bellard | else
|
164 | c2d551ff | bellard | print_insn = print_insn_arm; |
165 | c27004ec | bellard | #elif defined(TARGET_SPARC)
|
166 | c27004ec | bellard | print_insn = print_insn_sparc; |
167 | 3475187d | bellard | #ifdef TARGET_SPARC64
|
168 | 3475187d | bellard | disasm_info.mach = bfd_mach_sparc_v9b; |
169 | 3b46e624 | ths | #endif
|
170 | c27004ec | bellard | #elif defined(TARGET_PPC)
|
171 | 237c0af0 | j_mayer | if (flags >> 16) |
172 | 111bfab3 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
173 | 237c0af0 | j_mayer | if (flags & 0xFFFF) { |
174 | 237c0af0 | j_mayer | /* If we have a precise definitions of the instructions set, use it */
|
175 | 237c0af0 | j_mayer | disasm_info.mach = flags & 0xFFFF;
|
176 | 237c0af0 | j_mayer | } else {
|
177 | a2458627 | bellard | #ifdef TARGET_PPC64
|
178 | 237c0af0 | j_mayer | disasm_info.mach = bfd_mach_ppc64; |
179 | a2458627 | bellard | #else
|
180 | 237c0af0 | j_mayer | disasm_info.mach = bfd_mach_ppc; |
181 | a2458627 | bellard | #endif
|
182 | 237c0af0 | j_mayer | } |
183 | c27004ec | bellard | print_insn = print_insn_ppc; |
184 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
|
185 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
186 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
|
187 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
188 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
189 | 76b3030c | bellard | #else
|
190 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
191 | 76b3030c | bellard | #endif
|
192 | fdf9b3e8 | bellard | #elif defined(TARGET_SH4)
|
193 | fdf9b3e8 | bellard | disasm_info.mach = bfd_mach_sh4; |
194 | fdf9b3e8 | bellard | print_insn = print_insn_sh; |
195 | eddf68a6 | j_mayer | #elif defined(TARGET_ALPHA)
|
196 | eddf68a6 | j_mayer | disasm_info.mach = bfd_mach_alpha; |
197 | eddf68a6 | j_mayer | print_insn = print_insn_alpha; |
198 | a25fd137 | ths | #elif defined(TARGET_CRIS)
|
199 | a25fd137 | ths | disasm_info.mach = bfd_mach_cris_v32; |
200 | a25fd137 | ths | print_insn = print_insn_crisv32; |
201 | c27004ec | bellard | #else
|
202 | b8076a74 | bellard | fprintf(out, "0x" TARGET_FMT_lx
|
203 | b8076a74 | bellard | ": Asm output not supported on this arch\n", code);
|
204 | c27004ec | bellard | return;
|
205 | c6105c0a | bellard | #endif
|
206 | c6105c0a | bellard | |
207 | c27004ec | bellard | for (pc = code; pc < code + size; pc += count) {
|
208 | fa15e030 | bellard | fprintf(out, "0x" TARGET_FMT_lx ": ", pc); |
209 | c27004ec | bellard | count = print_insn(pc, &disasm_info); |
210 | c27004ec | bellard | #if 0
|
211 | c27004ec | bellard | {
|
212 | c27004ec | bellard | int i;
|
213 | c27004ec | bellard | uint8_t b;
|
214 | c27004ec | bellard | fprintf(out, " {");
|
215 | c27004ec | bellard | for(i = 0; i < count; i++) {
|
216 | c27004ec | bellard | target_read_memory(pc + i, &b, 1, &disasm_info);
|
217 | c27004ec | bellard | fprintf(out, " %02x", b);
|
218 | c27004ec | bellard | }
|
219 | c27004ec | bellard | fprintf(out, " }");
|
220 | c27004ec | bellard | }
|
221 | c27004ec | bellard | #endif
|
222 | c27004ec | bellard | fprintf(out, "\n");
|
223 | c27004ec | bellard | if (count < 0) |
224 | c27004ec | bellard | break;
|
225 | c27004ec | bellard | } |
226 | c27004ec | bellard | } |
227 | c27004ec | bellard | |
228 | c27004ec | bellard | /* Disassemble this for me please... (debugging). */
|
229 | c27004ec | bellard | void disas(FILE *out, void *code, unsigned long size) |
230 | c27004ec | bellard | { |
231 | c27004ec | bellard | unsigned long pc; |
232 | c27004ec | bellard | int count;
|
233 | c27004ec | bellard | struct disassemble_info disasm_info;
|
234 | c27004ec | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
|
235 | c27004ec | bellard | |
236 | c27004ec | bellard | INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); |
237 | c27004ec | bellard | |
238 | b9adb4a6 | bellard | disasm_info.buffer = code; |
239 | b9adb4a6 | bellard | disasm_info.buffer_vma = (unsigned long)code; |
240 | b9adb4a6 | bellard | disasm_info.buffer_length = size; |
241 | b9adb4a6 | bellard | |
242 | b9adb4a6 | bellard | #ifdef WORDS_BIGENDIAN
|
243 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
244 | b9adb4a6 | bellard | #else
|
245 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
246 | b9adb4a6 | bellard | #endif
|
247 | bc51c5c9 | bellard | #if defined(__i386__)
|
248 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i386; |
249 | c27004ec | bellard | print_insn = print_insn_i386; |
250 | bc51c5c9 | bellard | #elif defined(__x86_64__)
|
251 | c27004ec | bellard | disasm_info.mach = bfd_mach_x86_64; |
252 | c27004ec | bellard | print_insn = print_insn_i386; |
253 | b9adb4a6 | bellard | #elif defined(__powerpc__)
|
254 | c27004ec | bellard | print_insn = print_insn_ppc; |
255 | a993ba85 | bellard | #elif defined(__alpha__)
|
256 | c27004ec | bellard | print_insn = print_insn_alpha; |
257 | aa0aa4fa | bellard | #elif defined(__sparc__)
|
258 | c27004ec | bellard | print_insn = print_insn_sparc; |
259 | 6ecd4534 | blueswir1 | #if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
|
260 | 6ecd4534 | blueswir1 | disasm_info.mach = bfd_mach_sparc_v9b; |
261 | 6ecd4534 | blueswir1 | #endif
|
262 | 5fafdf24 | ths | #elif defined(__arm__)
|
263 | c27004ec | bellard | print_insn = print_insn_arm; |
264 | 6af0bf9c | bellard | #elif defined(__MIPSEB__)
|
265 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
266 | 6af0bf9c | bellard | #elif defined(__MIPSEL__)
|
267 | 6af0bf9c | bellard | print_insn = print_insn_little_mips; |
268 | 48024e4a | bellard | #elif defined(__m68k__)
|
269 | 48024e4a | bellard | print_insn = print_insn_m68k; |
270 | 8f860bb8 | ths | #elif defined(__s390__)
|
271 | 8f860bb8 | ths | print_insn = print_insn_s390; |
272 | f54b3f92 | aurel32 | #elif defined(__hppa__)
|
273 | f54b3f92 | aurel32 | print_insn = print_insn_hppa; |
274 | b9adb4a6 | bellard | #else
|
275 | b8076a74 | bellard | fprintf(out, "0x%lx: Asm output not supported on this arch\n",
|
276 | b8076a74 | bellard | (long) code);
|
277 | c27004ec | bellard | return;
|
278 | b9adb4a6 | bellard | #endif
|
279 | c27004ec | bellard | for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) { |
280 | c27004ec | bellard | fprintf(out, "0x%08lx: ", pc);
|
281 | aa0aa4fa | bellard | #ifdef __arm__
|
282 | 46152182 | pbrook | /* since data is included in the code, it is better to
|
283 | aa0aa4fa | bellard | display code data too */
|
284 | 46152182 | pbrook | fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc)); |
285 | aa0aa4fa | bellard | #endif
|
286 | c27004ec | bellard | count = print_insn(pc, &disasm_info); |
287 | b9adb4a6 | bellard | fprintf(out, "\n");
|
288 | b9adb4a6 | bellard | if (count < 0) |
289 | b9adb4a6 | bellard | break;
|
290 | b9adb4a6 | bellard | } |
291 | b9adb4a6 | bellard | } |
292 | b9adb4a6 | bellard | |
293 | b9adb4a6 | bellard | /* Look up symbol for debugging purpose. Returns "" if unknown. */
|
294 | c27004ec | bellard | const char *lookup_symbol(target_ulong orig_addr) |
295 | b9adb4a6 | bellard | { |
296 | 49918a75 | pbrook | const char *symbol = ""; |
297 | e80cfcfc | bellard | struct syminfo *s;
|
298 | 3b46e624 | ths | |
299 | e80cfcfc | bellard | for (s = syminfos; s; s = s->next) {
|
300 | 49918a75 | pbrook | symbol = s->lookup_symbol(s, orig_addr); |
301 | 49918a75 | pbrook | if (symbol[0] != '\0') { |
302 | 49918a75 | pbrook | break;
|
303 | 49918a75 | pbrook | } |
304 | b9adb4a6 | bellard | } |
305 | 49918a75 | pbrook | |
306 | 49918a75 | pbrook | return symbol;
|
307 | b9adb4a6 | bellard | } |
308 | 9307c4c1 | bellard | |
309 | 9307c4c1 | bellard | #if !defined(CONFIG_USER_ONLY)
|
310 | 9307c4c1 | bellard | |
311 | 3d2cfdf1 | bellard | void term_vprintf(const char *fmt, va_list ap); |
312 | 3d2cfdf1 | bellard | void term_printf(const char *fmt, ...); |
313 | 3d2cfdf1 | bellard | |
314 | 9307c4c1 | bellard | static int monitor_disas_is_physical; |
315 | 6a00d601 | bellard | static CPUState *monitor_disas_env;
|
316 | 9307c4c1 | bellard | |
317 | 9307c4c1 | bellard | static int |
318 | a5f1b965 | blueswir1 | monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
|
319 | a5f1b965 | blueswir1 | struct disassemble_info *info)
|
320 | 9307c4c1 | bellard | { |
321 | 9307c4c1 | bellard | if (monitor_disas_is_physical) {
|
322 | 9307c4c1 | bellard | cpu_physical_memory_rw(memaddr, myaddr, length, 0);
|
323 | 9307c4c1 | bellard | } else {
|
324 | 6a00d601 | bellard | cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
|
325 | 9307c4c1 | bellard | } |
326 | 9307c4c1 | bellard | return 0; |
327 | 9307c4c1 | bellard | } |
328 | 9307c4c1 | bellard | |
329 | 3d2cfdf1 | bellard | static int monitor_fprintf(FILE *stream, const char *fmt, ...) |
330 | 3d2cfdf1 | bellard | { |
331 | 3d2cfdf1 | bellard | va_list ap; |
332 | 3d2cfdf1 | bellard | va_start(ap, fmt); |
333 | 3d2cfdf1 | bellard | term_vprintf(fmt, ap); |
334 | 3d2cfdf1 | bellard | va_end(ap); |
335 | 3d2cfdf1 | bellard | return 0; |
336 | 3d2cfdf1 | bellard | } |
337 | 3d2cfdf1 | bellard | |
338 | 6a00d601 | bellard | void monitor_disas(CPUState *env,
|
339 | 6a00d601 | bellard | target_ulong pc, int nb_insn, int is_physical, int flags) |
340 | 9307c4c1 | bellard | { |
341 | 9307c4c1 | bellard | int count, i;
|
342 | 9307c4c1 | bellard | struct disassemble_info disasm_info;
|
343 | 9307c4c1 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
|
344 | 9307c4c1 | bellard | |
345 | 3d2cfdf1 | bellard | INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
|
346 | 9307c4c1 | bellard | |
347 | 6a00d601 | bellard | monitor_disas_env = env; |
348 | 9307c4c1 | bellard | monitor_disas_is_physical = is_physical; |
349 | 9307c4c1 | bellard | disasm_info.read_memory_func = monitor_read_memory; |
350 | 9307c4c1 | bellard | |
351 | 9307c4c1 | bellard | disasm_info.buffer_vma = pc; |
352 | 9307c4c1 | bellard | |
353 | 9307c4c1 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
354 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
355 | 9307c4c1 | bellard | #else
|
356 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
357 | 9307c4c1 | bellard | #endif
|
358 | 9307c4c1 | bellard | #if defined(TARGET_I386)
|
359 | fa15e030 | bellard | if (flags == 2) |
360 | fa15e030 | bellard | disasm_info.mach = bfd_mach_x86_64; |
361 | 5fafdf24 | ths | else if (flags == 1) |
362 | 9307c4c1 | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
363 | fa15e030 | bellard | else
|
364 | fa15e030 | bellard | disasm_info.mach = bfd_mach_i386_i386; |
365 | 9307c4c1 | bellard | print_insn = print_insn_i386; |
366 | 9307c4c1 | bellard | #elif defined(TARGET_ARM)
|
367 | 9307c4c1 | bellard | print_insn = print_insn_arm; |
368 | cbd669da | ths | #elif defined(TARGET_ALPHA)
|
369 | cbd669da | ths | print_insn = print_insn_alpha; |
370 | 9307c4c1 | bellard | #elif defined(TARGET_SPARC)
|
371 | 9307c4c1 | bellard | print_insn = print_insn_sparc; |
372 | 682c4f15 | blueswir1 | #ifdef TARGET_SPARC64
|
373 | 682c4f15 | blueswir1 | disasm_info.mach = bfd_mach_sparc_v9b; |
374 | 682c4f15 | blueswir1 | #endif
|
375 | 9307c4c1 | bellard | #elif defined(TARGET_PPC)
|
376 | a2458627 | bellard | #ifdef TARGET_PPC64
|
377 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc64; |
378 | a2458627 | bellard | #else
|
379 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc; |
380 | a2458627 | bellard | #endif
|
381 | 9307c4c1 | bellard | print_insn = print_insn_ppc; |
382 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
|
383 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
384 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
|
385 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
386 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
387 | 76b3030c | bellard | #else
|
388 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
389 | 76b3030c | bellard | #endif
|
390 | 9307c4c1 | bellard | #else
|
391 | b8076a74 | bellard | term_printf("0x" TARGET_FMT_lx
|
392 | b8076a74 | bellard | ": Asm output not supported on this arch\n", pc);
|
393 | 9307c4c1 | bellard | return;
|
394 | 9307c4c1 | bellard | #endif
|
395 | 9307c4c1 | bellard | |
396 | 9307c4c1 | bellard | for(i = 0; i < nb_insn; i++) { |
397 | fa15e030 | bellard | term_printf("0x" TARGET_FMT_lx ": ", pc); |
398 | 9307c4c1 | bellard | count = print_insn(pc, &disasm_info); |
399 | 3d2cfdf1 | bellard | term_printf("\n");
|
400 | 9307c4c1 | bellard | if (count < 0) |
401 | 9307c4c1 | bellard | break;
|
402 | 9307c4c1 | bellard | pc += count; |
403 | 9307c4c1 | bellard | } |
404 | 9307c4c1 | bellard | } |
405 | 9307c4c1 | bellard | #endif |