Revision fe8d8f0f target-sparc/translate.c

b/target-sparc/translate.c
1955 1955
    r_asi = gen_get_asi(insn, addr);
1956 1956
    r_size = tcg_const_i32(size);
1957 1957
    r_sign = tcg_const_i32(sign);
1958
    gen_helper_ld_asi(dst, addr, r_asi, r_size, r_sign);
1958
    gen_helper_ld_asi(dst, cpu_env, addr, r_asi, r_size, r_sign);
1959 1959
    tcg_temp_free_i32(r_sign);
1960 1960
    tcg_temp_free_i32(r_size);
1961 1961
    tcg_temp_free_i32(r_asi);
......
1967 1967

  
1968 1968
    r_asi = gen_get_asi(insn, addr);
1969 1969
    r_size = tcg_const_i32(size);
1970
    gen_helper_st_asi(addr, src, r_asi, r_size);
1970
    gen_helper_st_asi(cpu_env, addr, src, r_asi, r_size);
1971 1971
    tcg_temp_free_i32(r_size);
1972 1972
    tcg_temp_free_i32(r_asi);
1973 1973
}
......
1979 1979
    r_asi = gen_get_asi(insn, addr);
1980 1980
    r_size = tcg_const_i32(size);
1981 1981
    r_rd = tcg_const_i32(rd);
1982
    gen_helper_ldf_asi(addr, r_asi, r_size, r_rd);
1982
    gen_helper_ldf_asi(cpu_env, addr, r_asi, r_size, r_rd);
1983 1983
    tcg_temp_free_i32(r_rd);
1984 1984
    tcg_temp_free_i32(r_size);
1985 1985
    tcg_temp_free_i32(r_asi);
......
1992 1992
    r_asi = gen_get_asi(insn, addr);
1993 1993
    r_size = tcg_const_i32(size);
1994 1994
    r_rd = tcg_const_i32(rd);
1995
    gen_helper_stf_asi(addr, r_asi, r_size, r_rd);
1995
    gen_helper_stf_asi(cpu_env, addr, r_asi, r_size, r_rd);
1996 1996
    tcg_temp_free_i32(r_rd);
1997 1997
    tcg_temp_free_i32(r_size);
1998 1998
    tcg_temp_free_i32(r_asi);
......
2005 2005
    r_asi = gen_get_asi(insn, addr);
2006 2006
    r_size = tcg_const_i32(4);
2007 2007
    r_sign = tcg_const_i32(0);
2008
    gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign);
2008
    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
2009 2009
    tcg_temp_free_i32(r_sign);
2010
    gen_helper_st_asi(addr, dst, r_asi, r_size);
2010
    gen_helper_st_asi(cpu_env, addr, dst, r_asi, r_size);
2011 2011
    tcg_temp_free_i32(r_size);
2012 2012
    tcg_temp_free_i32(r_asi);
2013 2013
    tcg_gen_trunc_i64_tl(dst, cpu_tmp64);
......
2019 2019

  
2020 2020
    r_asi = gen_get_asi(insn, addr);
2021 2021
    r_rd = tcg_const_i32(rd);
2022
    gen_helper_ldda_asi(addr, r_asi, r_rd);
2022
    gen_helper_ldda_asi(cpu_env, addr, r_asi, r_rd);
2023 2023
    tcg_temp_free_i32(r_rd);
2024 2024
    tcg_temp_free_i32(r_asi);
2025 2025
}
......
2032 2032
    tcg_gen_concat_tl_i64(cpu_tmp64, cpu_tmp0, hi);
2033 2033
    r_asi = gen_get_asi(insn, addr);
2034 2034
    r_size = tcg_const_i32(8);
2035
    gen_helper_st_asi(addr, cpu_tmp64, r_asi, r_size);
2035
    gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size);
2036 2036
    tcg_temp_free_i32(r_size);
2037 2037
    tcg_temp_free_i32(r_asi);
2038 2038
}
......
2046 2046
    r_val1 = tcg_temp_new();
2047 2047
    gen_movl_reg_TN(rd, r_val1);
2048 2048
    r_asi = gen_get_asi(insn, addr);
2049
    gen_helper_cas_asi(dst, addr, r_val1, val2, r_asi);
2049
    gen_helper_cas_asi(dst, cpu_env, addr, r_val1, val2, r_asi);
2050 2050
    tcg_temp_free_i32(r_asi);
2051 2051
    tcg_temp_free(r_val1);
2052 2052
}
......
2058 2058

  
2059 2059
    gen_movl_reg_TN(rd, cpu_tmp64);
2060 2060
    r_asi = gen_get_asi(insn, addr);
2061
    gen_helper_casx_asi(dst, addr, cpu_tmp64, val2, r_asi);
2061
    gen_helper_casx_asi(dst, cpu_env, addr, cpu_tmp64, val2, r_asi);
2062 2062
    tcg_temp_free_i32(r_asi);
2063 2063
}
2064 2064

  
......
2072 2072
    r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
2073 2073
    r_size = tcg_const_i32(size);
2074 2074
    r_sign = tcg_const_i32(sign);
2075
    gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign);
2075
    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
2076 2076
    tcg_temp_free(r_sign);
2077 2077
    tcg_temp_free(r_size);
2078 2078
    tcg_temp_free(r_asi);
......
2086 2086
    tcg_gen_extu_tl_i64(cpu_tmp64, src);
2087 2087
    r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
2088 2088
    r_size = tcg_const_i32(size);
2089
    gen_helper_st_asi(addr, cpu_tmp64, r_asi, r_size);
2089
    gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size);
2090 2090
    tcg_temp_free(r_size);
2091 2091
    tcg_temp_free(r_asi);
2092 2092
}
......
2099 2099
    r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
2100 2100
    r_size = tcg_const_i32(4);
2101 2101
    r_sign = tcg_const_i32(0);
2102
    gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign);
2102
    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
2103 2103
    tcg_temp_free(r_sign);
2104 2104
    r_val = tcg_temp_new_i64();
2105 2105
    tcg_gen_extu_tl_i64(r_val, dst);
2106
    gen_helper_st_asi(addr, r_val, r_asi, r_size);
2106
    gen_helper_st_asi(cpu_env, addr, r_val, r_asi, r_size);
2107 2107
    tcg_temp_free_i64(r_val);
2108 2108
    tcg_temp_free(r_size);
2109 2109
    tcg_temp_free(r_asi);
......
2117 2117
    r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
2118 2118
    r_size = tcg_const_i32(8);
2119 2119
    r_sign = tcg_const_i32(0);
2120
    gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign);
2120
    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
2121 2121
    tcg_temp_free(r_sign);
2122 2122
    tcg_temp_free(r_size);
2123 2123
    tcg_temp_free(r_asi);
......
2136 2136
    tcg_gen_concat_tl_i64(cpu_tmp64, cpu_tmp0, hi);
2137 2137
    r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
2138 2138
    r_size = tcg_const_i32(8);
2139
    gen_helper_st_asi(addr, cpu_tmp64, r_asi, r_size);
2139
    gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size);
2140 2140
    tcg_temp_free(r_size);
2141 2141
    tcg_temp_free(r_asi);
2142 2142
}
......
2153 2153
    r_val = tcg_const_i64(0xffULL);
2154 2154
    r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
2155 2155
    r_size = tcg_const_i32(1);
2156
    gen_helper_st_asi(addr, r_val, r_asi, r_size);
2156
    gen_helper_st_asi(cpu_env, addr, r_val, r_asi, r_size);
2157 2157
    tcg_temp_free_i32(r_size);
2158 2158
    tcg_temp_free_i32(r_asi);
2159 2159
    tcg_temp_free_i64(r_val);
......
4547 4547
                gen_helper_restore(cpu_env);
4548 4548
                gen_mov_pc_npc(dc, cpu_cond);
4549 4549
                r_const = tcg_const_i32(3);
4550
                gen_helper_check_align(cpu_dst, r_const);
4550
                gen_helper_check_align(cpu_env, cpu_dst, r_const);
4551 4551
                tcg_temp_free_i32(r_const);
4552 4552
                tcg_gen_mov_tl(cpu_npc, cpu_dst);
4553 4553
                dc->npc = DYNAMIC_PC;
......
4577 4577
                        tcg_temp_free(r_pc);
4578 4578
                        gen_mov_pc_npc(dc, cpu_cond);
4579 4579
                        r_const = tcg_const_i32(3);
4580
                        gen_helper_check_align(cpu_dst, r_const);
4580
                        gen_helper_check_align(cpu_env, cpu_dst, r_const);
4581 4581
                        tcg_temp_free_i32(r_const);
4582 4582
                        tcg_gen_mov_tl(cpu_npc, cpu_dst);
4583 4583
                        dc->npc = DYNAMIC_PC;
......
4592 4592
                            goto priv_insn;
4593 4593
                        gen_mov_pc_npc(dc, cpu_cond);
4594 4594
                        r_const = tcg_const_i32(3);
4595
                        gen_helper_check_align(cpu_dst, r_const);
4595
                        gen_helper_check_align(cpu_env, cpu_dst, r_const);
4596 4596
                        tcg_temp_free_i32(r_const);
4597 4597
                        tcg_gen_mov_tl(cpu_npc, cpu_dst);
4598 4598
                        dc->npc = DYNAMIC_PC;
......
4696 4696

  
4697 4697
                        save_state(dc, cpu_cond);
4698 4698
                        r_const = tcg_const_i32(7);
4699
                        gen_helper_check_align(cpu_addr, r_const); // XXX remove
4699
                        /* XXX remove alignment check */
4700
                        gen_helper_check_align(cpu_env, cpu_addr, r_const);
4700 4701
                        tcg_temp_free_i32(r_const);
4701 4702
                        gen_address_mask(dc, cpu_addr);
4702 4703
                        tcg_gen_qemu_ld64(cpu_tmp64, cpu_addr, dc->mem_idx);
......
4921 4922
                        CHECK_FPU_FEATURE(dc, FLOAT128);
4922 4923
                        r_const = tcg_const_i32(dc->mem_idx);
4923 4924
                        gen_address_mask(dc, cpu_addr);
4924
                        gen_helper_ldqf(cpu_addr, r_const);
4925
                        gen_helper_ldqf(cpu_env, cpu_addr, r_const);
4925 4926
                        tcg_temp_free_i32(r_const);
4926 4927
                        gen_op_store_QT0_fpr(QFPREG(rd));
4927 4928
                        gen_update_fprs_dirty(QFPREG(rd));
......
4961 4962
                        save_state(dc, cpu_cond);
4962 4963
                        gen_address_mask(dc, cpu_addr);
4963 4964
                        r_const = tcg_const_i32(7);
4964
                        gen_helper_check_align(cpu_addr, r_const); // XXX remove
4965
                        /* XXX remove alignment check */
4966
                        gen_helper_check_align(cpu_env, cpu_addr, r_const);
4965 4967
                        tcg_temp_free_i32(r_const);
4966 4968
                        gen_movl_reg_TN(rd + 1, cpu_tmp0);
4967 4969
                        tcg_gen_concat_tl_i64(cpu_tmp64, cpu_tmp0, cpu_val);
......
5065 5067
                        gen_op_load_fpr_QT0(QFPREG(rd));
5066 5068
                        r_const = tcg_const_i32(dc->mem_idx);
5067 5069
                        gen_address_mask(dc, cpu_addr);
5068
                        gen_helper_stqf(cpu_addr, r_const);
5070
                        gen_helper_stqf(cpu_env, cpu_addr, r_const);
5069 5071
                        tcg_temp_free_i32(r_const);
5070 5072
                    }
5071 5073
                    break;
......
5108 5110
                            goto jmp_insn;
5109 5111
                        }
5110 5112
                        r_const = tcg_const_i32(7);
5111
                        gen_helper_check_align(cpu_addr, r_const);
5113
                        gen_helper_check_align(cpu_env, cpu_addr, r_const);
5112 5114
                        tcg_temp_free_i32(r_const);
5113 5115
                        gen_stf_asi(cpu_addr, insn, 16, QFPREG(rd));
5114 5116
                    }

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