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1 | 10b46525 | David Gibson | /*
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2 | 10b46525 | David Gibson | * PowerPC MMU, TLB, SLB and BAT emulation helpers for QEMU.
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3 | 10b46525 | David Gibson | *
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4 | 10b46525 | David Gibson | * Copyright (c) 2003-2007 Jocelyn Mayer
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5 | 10b46525 | David Gibson | * Copyright (c) 2013 David Gibson, IBM Corporation
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6 | 10b46525 | David Gibson | *
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7 | 10b46525 | David Gibson | * This library is free software; you can redistribute it and/or
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8 | 10b46525 | David Gibson | * modify it under the terms of the GNU Lesser General Public
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9 | 10b46525 | David Gibson | * License as published by the Free Software Foundation; either
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10 | 10b46525 | David Gibson | * version 2 of the License, or (at your option) any later version.
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11 | 10b46525 | David Gibson | *
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12 | 10b46525 | David Gibson | * This library is distributed in the hope that it will be useful,
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13 | 10b46525 | David Gibson | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 10b46525 | David Gibson | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | 10b46525 | David Gibson | * Lesser General Public License for more details.
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16 | 10b46525 | David Gibson | *
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17 | 10b46525 | David Gibson | * You should have received a copy of the GNU Lesser General Public
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18 | 10b46525 | David Gibson | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | 10b46525 | David Gibson | */
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20 | 10b46525 | David Gibson | #include "cpu.h" |
21 | 10b46525 | David Gibson | #include "helper.h" |
22 | 10b46525 | David Gibson | #include "sysemu/kvm.h" |
23 | 10b46525 | David Gibson | #include "kvm_ppc.h" |
24 | 10b46525 | David Gibson | #include "mmu-hash64.h" |
25 | 10b46525 | David Gibson | |
26 | 9d7c3f4a | David Gibson | //#define DEBUG_MMU
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27 | 10b46525 | David Gibson | //#define DEBUG_SLB
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28 | 10b46525 | David Gibson | |
29 | 9d7c3f4a | David Gibson | #ifdef DEBUG_MMU
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30 | 9d7c3f4a | David Gibson | # define LOG_MMU(...) qemu_log(__VA_ARGS__)
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31 | 77710e7a | Andreas Färber | # define LOG_MMU_STATE(cpu) log_cpu_state((cpu), 0) |
32 | 9d7c3f4a | David Gibson | #else
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33 | 9d7c3f4a | David Gibson | # define LOG_MMU(...) do { } while (0) |
34 | 77710e7a | Andreas Färber | # define LOG_MMU_STATE(cpu) do { } while (0) |
35 | 9d7c3f4a | David Gibson | #endif
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36 | 9d7c3f4a | David Gibson | |
37 | 10b46525 | David Gibson | #ifdef DEBUG_SLB
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38 | 10b46525 | David Gibson | # define LOG_SLB(...) qemu_log(__VA_ARGS__)
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39 | 10b46525 | David Gibson | #else
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40 | 10b46525 | David Gibson | # define LOG_SLB(...) do { } while (0) |
41 | 10b46525 | David Gibson | #endif
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42 | 10b46525 | David Gibson | |
43 | 10b46525 | David Gibson | /*
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44 | 10b46525 | David Gibson | * SLB handling
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45 | 10b46525 | David Gibson | */
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46 | 10b46525 | David Gibson | |
47 | 0480884f | David Gibson | static ppc_slb_t *slb_lookup(CPUPPCState *env, target_ulong eaddr)
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48 | 10b46525 | David Gibson | { |
49 | 10b46525 | David Gibson | uint64_t esid_256M, esid_1T; |
50 | 10b46525 | David Gibson | int n;
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51 | 10b46525 | David Gibson | |
52 | 10b46525 | David Gibson | LOG_SLB("%s: eaddr " TARGET_FMT_lx "\n", __func__, eaddr); |
53 | 10b46525 | David Gibson | |
54 | 10b46525 | David Gibson | esid_256M = (eaddr & SEGMENT_MASK_256M) | SLB_ESID_V; |
55 | 10b46525 | David Gibson | esid_1T = (eaddr & SEGMENT_MASK_1T) | SLB_ESID_V; |
56 | 10b46525 | David Gibson | |
57 | 10b46525 | David Gibson | for (n = 0; n < env->slb_nr; n++) { |
58 | 10b46525 | David Gibson | ppc_slb_t *slb = &env->slb[n]; |
59 | 10b46525 | David Gibson | |
60 | 10b46525 | David Gibson | LOG_SLB("%s: slot %d %016" PRIx64 " %016" |
61 | 10b46525 | David Gibson | PRIx64 "\n", __func__, n, slb->esid, slb->vsid);
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62 | 10b46525 | David Gibson | /* We check for 1T matches on all MMUs here - if the MMU
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63 | 10b46525 | David Gibson | * doesn't have 1T segment support, we will have prevented 1T
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64 | 10b46525 | David Gibson | * entries from being inserted in the slbmte code. */
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65 | 10b46525 | David Gibson | if (((slb->esid == esid_256M) &&
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66 | 10b46525 | David Gibson | ((slb->vsid & SLB_VSID_B) == SLB_VSID_B_256M)) |
67 | 10b46525 | David Gibson | || ((slb->esid == esid_1T) && |
68 | 10b46525 | David Gibson | ((slb->vsid & SLB_VSID_B) == SLB_VSID_B_1T))) { |
69 | 10b46525 | David Gibson | return slb;
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70 | 10b46525 | David Gibson | } |
71 | 10b46525 | David Gibson | } |
72 | 10b46525 | David Gibson | |
73 | 10b46525 | David Gibson | return NULL; |
74 | 10b46525 | David Gibson | } |
75 | 10b46525 | David Gibson | |
76 | 10b46525 | David Gibson | void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
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77 | 10b46525 | David Gibson | { |
78 | 10b46525 | David Gibson | int i;
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79 | 10b46525 | David Gibson | uint64_t slbe, slbv; |
80 | 10b46525 | David Gibson | |
81 | cb446eca | Andreas Färber | cpu_synchronize_state(CPU(ppc_env_get_cpu(env))); |
82 | 10b46525 | David Gibson | |
83 | 10b46525 | David Gibson | cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n");
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84 | 10b46525 | David Gibson | for (i = 0; i < env->slb_nr; i++) { |
85 | 10b46525 | David Gibson | slbe = env->slb[i].esid; |
86 | 10b46525 | David Gibson | slbv = env->slb[i].vsid; |
87 | 10b46525 | David Gibson | if (slbe == 0 && slbv == 0) { |
88 | 10b46525 | David Gibson | continue;
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89 | 10b46525 | David Gibson | } |
90 | 10b46525 | David Gibson | cpu_fprintf(f, "%d\t0x%016" PRIx64 "\t0x%016" PRIx64 "\n", |
91 | 10b46525 | David Gibson | i, slbe, slbv); |
92 | 10b46525 | David Gibson | } |
93 | 10b46525 | David Gibson | } |
94 | 10b46525 | David Gibson | |
95 | 10b46525 | David Gibson | void helper_slbia(CPUPPCState *env)
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96 | 10b46525 | David Gibson | { |
97 | 10b46525 | David Gibson | int n, do_invalidate;
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98 | 10b46525 | David Gibson | |
99 | 10b46525 | David Gibson | do_invalidate = 0;
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100 | 10b46525 | David Gibson | /* XXX: Warning: slbia never invalidates the first segment */
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101 | 10b46525 | David Gibson | for (n = 1; n < env->slb_nr; n++) { |
102 | 10b46525 | David Gibson | ppc_slb_t *slb = &env->slb[n]; |
103 | 10b46525 | David Gibson | |
104 | 10b46525 | David Gibson | if (slb->esid & SLB_ESID_V) {
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105 | 10b46525 | David Gibson | slb->esid &= ~SLB_ESID_V; |
106 | 10b46525 | David Gibson | /* XXX: given the fact that segment size is 256 MB or 1TB,
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107 | 10b46525 | David Gibson | * and we still don't have a tlb_flush_mask(env, n, mask)
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108 | 10b46525 | David Gibson | * in QEMU, we just invalidate all TLBs
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109 | 10b46525 | David Gibson | */
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110 | 10b46525 | David Gibson | do_invalidate = 1;
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111 | 10b46525 | David Gibson | } |
112 | 10b46525 | David Gibson | } |
113 | 10b46525 | David Gibson | if (do_invalidate) {
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114 | 10b46525 | David Gibson | tlb_flush(env, 1);
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115 | 10b46525 | David Gibson | } |
116 | 10b46525 | David Gibson | } |
117 | 10b46525 | David Gibson | |
118 | 10b46525 | David Gibson | void helper_slbie(CPUPPCState *env, target_ulong addr)
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119 | 10b46525 | David Gibson | { |
120 | 10b46525 | David Gibson | ppc_slb_t *slb; |
121 | 10b46525 | David Gibson | |
122 | 10b46525 | David Gibson | slb = slb_lookup(env, addr); |
123 | 10b46525 | David Gibson | if (!slb) {
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124 | 10b46525 | David Gibson | return;
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125 | 10b46525 | David Gibson | } |
126 | 10b46525 | David Gibson | |
127 | 10b46525 | David Gibson | if (slb->esid & SLB_ESID_V) {
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128 | 10b46525 | David Gibson | slb->esid &= ~SLB_ESID_V; |
129 | 10b46525 | David Gibson | |
130 | 10b46525 | David Gibson | /* XXX: given the fact that segment size is 256 MB or 1TB,
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131 | 10b46525 | David Gibson | * and we still don't have a tlb_flush_mask(env, n, mask)
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132 | 10b46525 | David Gibson | * in QEMU, we just invalidate all TLBs
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133 | 10b46525 | David Gibson | */
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134 | 10b46525 | David Gibson | tlb_flush(env, 1);
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135 | 10b46525 | David Gibson | } |
136 | 10b46525 | David Gibson | } |
137 | 10b46525 | David Gibson | |
138 | 10b46525 | David Gibson | int ppc_store_slb(CPUPPCState *env, target_ulong rb, target_ulong rs)
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139 | 10b46525 | David Gibson | { |
140 | 10b46525 | David Gibson | int slot = rb & 0xfff; |
141 | 10b46525 | David Gibson | ppc_slb_t *slb = &env->slb[slot]; |
142 | 10b46525 | David Gibson | |
143 | 10b46525 | David Gibson | if (rb & (0x1000 - env->slb_nr)) { |
144 | 10b46525 | David Gibson | return -1; /* Reserved bits set or slot too high */ |
145 | 10b46525 | David Gibson | } |
146 | 10b46525 | David Gibson | if (rs & (SLB_VSID_B & ~SLB_VSID_B_1T)) {
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147 | 10b46525 | David Gibson | return -1; /* Bad segment size */ |
148 | 10b46525 | David Gibson | } |
149 | 10b46525 | David Gibson | if ((rs & SLB_VSID_B) && !(env->mmu_model & POWERPC_MMU_1TSEG)) {
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150 | 10b46525 | David Gibson | return -1; /* 1T segment on MMU that doesn't support it */ |
151 | 10b46525 | David Gibson | } |
152 | 10b46525 | David Gibson | |
153 | 10b46525 | David Gibson | /* Mask out the slot number as we store the entry */
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154 | 10b46525 | David Gibson | slb->esid = rb & (SLB_ESID_ESID | SLB_ESID_V); |
155 | 10b46525 | David Gibson | slb->vsid = rs; |
156 | 10b46525 | David Gibson | |
157 | 10b46525 | David Gibson | LOG_SLB("%s: %d " TARGET_FMT_lx " - " TARGET_FMT_lx " => %016" PRIx64 |
158 | 10b46525 | David Gibson | " %016" PRIx64 "\n", __func__, slot, rb, rs, |
159 | 10b46525 | David Gibson | slb->esid, slb->vsid); |
160 | 10b46525 | David Gibson | |
161 | 10b46525 | David Gibson | return 0; |
162 | 10b46525 | David Gibson | } |
163 | 10b46525 | David Gibson | |
164 | 10b46525 | David Gibson | static int ppc_load_slb_esid(CPUPPCState *env, target_ulong rb, |
165 | 10b46525 | David Gibson | target_ulong *rt) |
166 | 10b46525 | David Gibson | { |
167 | 10b46525 | David Gibson | int slot = rb & 0xfff; |
168 | 10b46525 | David Gibson | ppc_slb_t *slb = &env->slb[slot]; |
169 | 10b46525 | David Gibson | |
170 | 10b46525 | David Gibson | if (slot >= env->slb_nr) {
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171 | 10b46525 | David Gibson | return -1; |
172 | 10b46525 | David Gibson | } |
173 | 10b46525 | David Gibson | |
174 | 10b46525 | David Gibson | *rt = slb->esid; |
175 | 10b46525 | David Gibson | return 0; |
176 | 10b46525 | David Gibson | } |
177 | 10b46525 | David Gibson | |
178 | 10b46525 | David Gibson | static int ppc_load_slb_vsid(CPUPPCState *env, target_ulong rb, |
179 | 10b46525 | David Gibson | target_ulong *rt) |
180 | 10b46525 | David Gibson | { |
181 | 10b46525 | David Gibson | int slot = rb & 0xfff; |
182 | 10b46525 | David Gibson | ppc_slb_t *slb = &env->slb[slot]; |
183 | 10b46525 | David Gibson | |
184 | 10b46525 | David Gibson | if (slot >= env->slb_nr) {
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185 | 10b46525 | David Gibson | return -1; |
186 | 10b46525 | David Gibson | } |
187 | 10b46525 | David Gibson | |
188 | 10b46525 | David Gibson | *rt = slb->vsid; |
189 | 10b46525 | David Gibson | return 0; |
190 | 10b46525 | David Gibson | } |
191 | 10b46525 | David Gibson | |
192 | 10b46525 | David Gibson | void helper_store_slb(CPUPPCState *env, target_ulong rb, target_ulong rs)
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193 | 10b46525 | David Gibson | { |
194 | 10b46525 | David Gibson | if (ppc_store_slb(env, rb, rs) < 0) { |
195 | 10b46525 | David Gibson | helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
196 | 10b46525 | David Gibson | POWERPC_EXCP_INVAL); |
197 | 10b46525 | David Gibson | } |
198 | 10b46525 | David Gibson | } |
199 | 10b46525 | David Gibson | |
200 | 10b46525 | David Gibson | target_ulong helper_load_slb_esid(CPUPPCState *env, target_ulong rb) |
201 | 10b46525 | David Gibson | { |
202 | 10b46525 | David Gibson | target_ulong rt = 0;
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203 | 10b46525 | David Gibson | |
204 | 10b46525 | David Gibson | if (ppc_load_slb_esid(env, rb, &rt) < 0) { |
205 | 10b46525 | David Gibson | helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
206 | 10b46525 | David Gibson | POWERPC_EXCP_INVAL); |
207 | 10b46525 | David Gibson | } |
208 | 10b46525 | David Gibson | return rt;
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209 | 10b46525 | David Gibson | } |
210 | 10b46525 | David Gibson | |
211 | 10b46525 | David Gibson | target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb) |
212 | 10b46525 | David Gibson | { |
213 | 10b46525 | David Gibson | target_ulong rt = 0;
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214 | 10b46525 | David Gibson | |
215 | 10b46525 | David Gibson | if (ppc_load_slb_vsid(env, rb, &rt) < 0) { |
216 | 10b46525 | David Gibson | helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
217 | 10b46525 | David Gibson | POWERPC_EXCP_INVAL); |
218 | 10b46525 | David Gibson | } |
219 | 10b46525 | David Gibson | return rt;
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220 | 10b46525 | David Gibson | } |
221 | 9d7c3f4a | David Gibson | |
222 | 9d7c3f4a | David Gibson | /*
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223 | 9d7c3f4a | David Gibson | * 64-bit hash table MMU handling
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224 | 9d7c3f4a | David Gibson | */
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225 | 9d7c3f4a | David Gibson | |
226 | e01b4445 | David Gibson | static int ppc_hash64_pte_prot(CPUPPCState *env, |
227 | e01b4445 | David Gibson | ppc_slb_t *slb, ppc_hash_pte64_t pte) |
228 | 496272a7 | David Gibson | { |
229 | e01b4445 | David Gibson | unsigned pp, key;
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230 | e01b4445 | David Gibson | /* Some pp bit combinations have undefined behaviour, so default
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231 | e01b4445 | David Gibson | * to no access in those cases */
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232 | e01b4445 | David Gibson | int prot = 0; |
233 | e01b4445 | David Gibson | |
234 | e01b4445 | David Gibson | key = !!(msr_pr ? (slb->vsid & SLB_VSID_KP) |
235 | e01b4445 | David Gibson | : (slb->vsid & SLB_VSID_KS)); |
236 | e01b4445 | David Gibson | pp = (pte.pte1 & HPTE64_R_PP) | ((pte.pte1 & HPTE64_R_PP0) >> 61);
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237 | 496272a7 | David Gibson | |
238 | 496272a7 | David Gibson | if (key == 0) { |
239 | 496272a7 | David Gibson | switch (pp) {
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240 | 496272a7 | David Gibson | case 0x0: |
241 | 496272a7 | David Gibson | case 0x1: |
242 | 496272a7 | David Gibson | case 0x2: |
243 | e01b4445 | David Gibson | prot = PAGE_READ | PAGE_WRITE; |
244 | e01b4445 | David Gibson | break;
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245 | e01b4445 | David Gibson | |
246 | 496272a7 | David Gibson | case 0x3: |
247 | 496272a7 | David Gibson | case 0x6: |
248 | e01b4445 | David Gibson | prot = PAGE_READ; |
249 | 496272a7 | David Gibson | break;
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250 | 496272a7 | David Gibson | } |
251 | 496272a7 | David Gibson | } else {
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252 | 496272a7 | David Gibson | switch (pp) {
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253 | 496272a7 | David Gibson | case 0x0: |
254 | 496272a7 | David Gibson | case 0x6: |
255 | e01b4445 | David Gibson | prot = 0;
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256 | 496272a7 | David Gibson | break;
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257 | e01b4445 | David Gibson | |
258 | 496272a7 | David Gibson | case 0x1: |
259 | 496272a7 | David Gibson | case 0x3: |
260 | e01b4445 | David Gibson | prot = PAGE_READ; |
261 | 496272a7 | David Gibson | break;
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262 | e01b4445 | David Gibson | |
263 | 496272a7 | David Gibson | case 0x2: |
264 | e01b4445 | David Gibson | prot = PAGE_READ | PAGE_WRITE; |
265 | 496272a7 | David Gibson | break;
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266 | 496272a7 | David Gibson | } |
267 | 496272a7 | David Gibson | } |
268 | 496272a7 | David Gibson | |
269 | e01b4445 | David Gibson | /* No execute if either noexec or guarded bits set */
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270 | 57d0a39d | David Gibson | if (!(pte.pte1 & HPTE64_R_N) || (pte.pte1 & HPTE64_R_G)
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271 | 57d0a39d | David Gibson | || (slb->vsid & SLB_VSID_N)) { |
272 | e01b4445 | David Gibson | prot |= PAGE_EXEC; |
273 | 496272a7 | David Gibson | } |
274 | 496272a7 | David Gibson | |
275 | e01b4445 | David Gibson | return prot;
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276 | 496272a7 | David Gibson | } |
277 | 496272a7 | David Gibson | |
278 | f80872e2 | David Gibson | static int ppc_hash64_amr_prot(CPUPPCState *env, ppc_hash_pte64_t pte) |
279 | f80872e2 | David Gibson | { |
280 | f80872e2 | David Gibson | int key, amrbits;
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281 | f80872e2 | David Gibson | int prot = PAGE_EXEC;
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282 | f80872e2 | David Gibson | |
283 | f80872e2 | David Gibson | |
284 | f80872e2 | David Gibson | /* Only recent MMUs implement Virtual Page Class Key Protection */
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285 | f80872e2 | David Gibson | if (!(env->mmu_model & POWERPC_MMU_AMR)) {
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286 | f80872e2 | David Gibson | return PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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287 | f80872e2 | David Gibson | } |
288 | f80872e2 | David Gibson | |
289 | f80872e2 | David Gibson | key = HPTE64_R_KEY(pte.pte1); |
290 | f80872e2 | David Gibson | amrbits = (env->spr[SPR_AMR] >> 2*(31 - key)) & 0x3; |
291 | f80872e2 | David Gibson | |
292 | f80872e2 | David Gibson | /* fprintf(stderr, "AMR protection: key=%d AMR=0x%" PRIx64 "\n", key, */
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293 | f80872e2 | David Gibson | /* env->spr[SPR_AMR]); */
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294 | f80872e2 | David Gibson | |
295 | f80872e2 | David Gibson | if (amrbits & 0x2) { |
296 | f80872e2 | David Gibson | prot |= PAGE_WRITE; |
297 | f80872e2 | David Gibson | } |
298 | f80872e2 | David Gibson | if (amrbits & 0x1) { |
299 | f80872e2 | David Gibson | prot |= PAGE_READ; |
300 | f80872e2 | David Gibson | } |
301 | f80872e2 | David Gibson | |
302 | f80872e2 | David Gibson | return prot;
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303 | f80872e2 | David Gibson | } |
304 | f80872e2 | David Gibson | |
305 | aea390e4 | David Gibson | static hwaddr ppc_hash64_pteg_search(CPUPPCState *env, hwaddr pteg_off,
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306 | aea390e4 | David Gibson | bool secondary, target_ulong ptem,
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307 | aea390e4 | David Gibson | ppc_hash_pte64_t *pte) |
308 | aea390e4 | David Gibson | { |
309 | aea390e4 | David Gibson | hwaddr pte_offset = pteg_off; |
310 | aea390e4 | David Gibson | target_ulong pte0, pte1; |
311 | aea390e4 | David Gibson | int i;
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312 | aea390e4 | David Gibson | |
313 | aea390e4 | David Gibson | for (i = 0; i < HPTES_PER_GROUP; i++) { |
314 | aea390e4 | David Gibson | pte0 = ppc_hash64_load_hpte0(env, pte_offset); |
315 | aea390e4 | David Gibson | pte1 = ppc_hash64_load_hpte1(env, pte_offset); |
316 | aea390e4 | David Gibson | |
317 | aea390e4 | David Gibson | if ((pte0 & HPTE64_V_VALID)
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318 | aea390e4 | David Gibson | && (secondary == !!(pte0 & HPTE64_V_SECONDARY)) |
319 | aea390e4 | David Gibson | && HPTE64_V_COMPARE(pte0, ptem)) { |
320 | aea390e4 | David Gibson | pte->pte0 = pte0; |
321 | aea390e4 | David Gibson | pte->pte1 = pte1; |
322 | aea390e4 | David Gibson | return pte_offset;
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323 | aea390e4 | David Gibson | } |
324 | aea390e4 | David Gibson | |
325 | aea390e4 | David Gibson | pte_offset += HASH_PTE_SIZE_64; |
326 | aea390e4 | David Gibson | } |
327 | aea390e4 | David Gibson | |
328 | aea390e4 | David Gibson | return -1; |
329 | aea390e4 | David Gibson | } |
330 | aea390e4 | David Gibson | |
331 | 7f3bdc2d | David Gibson | static hwaddr ppc_hash64_htab_lookup(CPUPPCState *env,
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332 | 7f3bdc2d | David Gibson | ppc_slb_t *slb, target_ulong eaddr, |
333 | 7f3bdc2d | David Gibson | ppc_hash_pte64_t *pte) |
334 | c69b6151 | David Gibson | { |
335 | aea390e4 | David Gibson | hwaddr pteg_off, pte_offset; |
336 | a1ff751a | David Gibson | hwaddr hash; |
337 | 18148898 | David Gibson | uint64_t vsid, epnshift, epnmask, epn, ptem; |
338 | a1ff751a | David Gibson | |
339 | 18148898 | David Gibson | /* Page size according to the SLB, which we use to generate the
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340 | 18148898 | David Gibson | * EPN for hash table lookup.. When we implement more recent MMU
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341 | 18148898 | David Gibson | * extensions this might be different from the actual page size
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342 | 18148898 | David Gibson | * encoded in the PTE */
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343 | 18148898 | David Gibson | epnshift = (slb->vsid & SLB_VSID_L) |
344 | a1ff751a | David Gibson | ? TARGET_PAGE_BITS_16M : TARGET_PAGE_BITS; |
345 | 18148898 | David Gibson | epnmask = ~((1ULL << epnshift) - 1); |
346 | a1ff751a | David Gibson | |
347 | a1ff751a | David Gibson | if (slb->vsid & SLB_VSID_B) {
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348 | 18148898 | David Gibson | /* 1TB segment */
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349 | 18148898 | David Gibson | vsid = (slb->vsid & SLB_VSID_VSID) >> SLB_VSID_SHIFT_1T; |
350 | 18148898 | David Gibson | epn = (eaddr & ~SEGMENT_MASK_1T) & epnmask; |
351 | 18148898 | David Gibson | hash = vsid ^ (vsid << 25) ^ (epn >> epnshift);
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352 | a1ff751a | David Gibson | } else {
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353 | 18148898 | David Gibson | /* 256M segment */
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354 | 18148898 | David Gibson | vsid = (slb->vsid & SLB_VSID_VSID) >> SLB_VSID_SHIFT; |
355 | 18148898 | David Gibson | epn = (eaddr & ~SEGMENT_MASK_256M) & epnmask; |
356 | 18148898 | David Gibson | hash = vsid ^ (epn >> epnshift); |
357 | a1ff751a | David Gibson | } |
358 | 18148898 | David Gibson | ptem = (slb->vsid & SLB_VSID_PTEM) | ((epn >> 16) & HPTE64_V_AVPN);
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359 | a1ff751a | David Gibson | |
360 | a1ff751a | David Gibson | /* Page address translation */
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361 | a1ff751a | David Gibson | LOG_MMU("htab_base " TARGET_FMT_plx " htab_mask " TARGET_FMT_plx |
362 | a1ff751a | David Gibson | " hash " TARGET_FMT_plx "\n", |
363 | a1ff751a | David Gibson | env->htab_base, env->htab_mask, hash); |
364 | a1ff751a | David Gibson | |
365 | a1ff751a | David Gibson | /* Primary PTEG lookup */
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366 | a1ff751a | David Gibson | LOG_MMU("0 htab=" TARGET_FMT_plx "/" TARGET_FMT_plx |
367 | a1ff751a | David Gibson | " vsid=" TARGET_FMT_lx " ptem=" TARGET_FMT_lx |
368 | a1ff751a | David Gibson | " hash=" TARGET_FMT_plx "\n", |
369 | a1ff751a | David Gibson | env->htab_base, env->htab_mask, vsid, ptem, hash); |
370 | a1ff751a | David Gibson | pteg_off = (hash * HASH_PTEG_SIZE_64) & env->htab_mask; |
371 | 7f3bdc2d | David Gibson | pte_offset = ppc_hash64_pteg_search(env, pteg_off, 0, ptem, pte);
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372 | 7f3bdc2d | David Gibson | |
373 | a1ff751a | David Gibson | if (pte_offset == -1) { |
374 | a1ff751a | David Gibson | /* Secondary PTEG lookup */
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375 | a1ff751a | David Gibson | LOG_MMU("1 htab=" TARGET_FMT_plx "/" TARGET_FMT_plx |
376 | a1ff751a | David Gibson | " vsid=" TARGET_FMT_lx " api=" TARGET_FMT_lx |
377 | a1ff751a | David Gibson | " hash=" TARGET_FMT_plx "\n", env->htab_base, |
378 | a1ff751a | David Gibson | env->htab_mask, vsid, ptem, ~hash); |
379 | a1ff751a | David Gibson | |
380 | a1ff751a | David Gibson | pteg_off = (~hash * HASH_PTEG_SIZE_64) & env->htab_mask; |
381 | 7f3bdc2d | David Gibson | pte_offset = ppc_hash64_pteg_search(env, pteg_off, 1, ptem, pte);
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382 | a1ff751a | David Gibson | } |
383 | a1ff751a | David Gibson | |
384 | 7f3bdc2d | David Gibson | return pte_offset;
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385 | c69b6151 | David Gibson | } |
386 | 0480884f | David Gibson | |
387 | 6d11d998 | David Gibson | static hwaddr ppc_hash64_pte_raddr(ppc_slb_t *slb, ppc_hash_pte64_t pte,
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388 | 6d11d998 | David Gibson | target_ulong eaddr) |
389 | 6d11d998 | David Gibson | { |
390 | 75d5ec89 | David Gibson | hwaddr rpn = pte.pte1 & HPTE64_R_RPN; |
391 | 6d11d998 | David Gibson | /* FIXME: Add support for SLLP extended page sizes */
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392 | 6d11d998 | David Gibson | int target_page_bits = (slb->vsid & SLB_VSID_L)
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393 | 6d11d998 | David Gibson | ? TARGET_PAGE_BITS_16M : TARGET_PAGE_BITS; |
394 | 6d11d998 | David Gibson | hwaddr mask = (1ULL << target_page_bits) - 1; |
395 | 6d11d998 | David Gibson | |
396 | 6d11d998 | David Gibson | return (rpn & ~mask) | (eaddr & mask);
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397 | 6d11d998 | David Gibson | } |
398 | 6d11d998 | David Gibson | |
399 | caa597bd | David Gibson | int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr,
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400 | caa597bd | David Gibson | int rwx, int mmu_idx) |
401 | 0480884f | David Gibson | { |
402 | 0480884f | David Gibson | ppc_slb_t *slb; |
403 | 7f3bdc2d | David Gibson | hwaddr pte_offset; |
404 | 7f3bdc2d | David Gibson | ppc_hash_pte64_t pte; |
405 | f80872e2 | David Gibson | int pp_prot, amr_prot, prot;
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406 | b3440746 | David Gibson | uint64_t new_pte1; |
407 | e01b4445 | David Gibson | const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; |
408 | caa597bd | David Gibson | hwaddr raddr; |
409 | 0480884f | David Gibson | |
410 | 6a980110 | David Gibson | assert((rwx == 0) || (rwx == 1) || (rwx == 2)); |
411 | 6a980110 | David Gibson | |
412 | 65d61643 | David Gibson | /* 1. Handle real mode accesses */
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413 | 65d61643 | David Gibson | if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { |
414 | 65d61643 | David Gibson | /* Translation is off */
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415 | 65d61643 | David Gibson | /* In real mode the top 4 effective address bits are ignored */
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416 | caa597bd | David Gibson | raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
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417 | caa597bd | David Gibson | tlb_set_page(env, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK, |
418 | caa597bd | David Gibson | PAGE_READ | PAGE_WRITE | PAGE_EXEC, mmu_idx, |
419 | caa597bd | David Gibson | TARGET_PAGE_SIZE); |
420 | 65d61643 | David Gibson | return 0; |
421 | 65d61643 | David Gibson | } |
422 | 65d61643 | David Gibson | |
423 | bb218042 | David Gibson | /* 2. Translation is on, so look up the SLB */
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424 | 0480884f | David Gibson | slb = slb_lookup(env, eaddr); |
425 | bb218042 | David Gibson | |
426 | 0480884f | David Gibson | if (!slb) {
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427 | caa597bd | David Gibson | if (rwx == 2) { |
428 | caa597bd | David Gibson | env->exception_index = POWERPC_EXCP_ISEG; |
429 | caa597bd | David Gibson | env->error_code = 0;
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430 | caa597bd | David Gibson | } else {
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431 | caa597bd | David Gibson | env->exception_index = POWERPC_EXCP_DSEG; |
432 | caa597bd | David Gibson | env->error_code = 0;
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433 | caa597bd | David Gibson | env->spr[SPR_DAR] = eaddr; |
434 | caa597bd | David Gibson | } |
435 | caa597bd | David Gibson | return 1; |
436 | 0480884f | David Gibson | } |
437 | 0480884f | David Gibson | |
438 | bb218042 | David Gibson | /* 3. Check for segment level no-execute violation */
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439 | bb218042 | David Gibson | if ((rwx == 2) && (slb->vsid & SLB_VSID_N)) { |
440 | caa597bd | David Gibson | env->exception_index = POWERPC_EXCP_ISI; |
441 | caa597bd | David Gibson | env->error_code = 0x10000000;
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442 | caa597bd | David Gibson | return 1; |
443 | bb218042 | David Gibson | } |
444 | bb218042 | David Gibson | |
445 | 7f3bdc2d | David Gibson | /* 4. Locate the PTE in the hash table */
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446 | 7f3bdc2d | David Gibson | pte_offset = ppc_hash64_htab_lookup(env, slb, eaddr, &pte); |
447 | 7f3bdc2d | David Gibson | if (pte_offset == -1) { |
448 | caa597bd | David Gibson | if (rwx == 2) { |
449 | caa597bd | David Gibson | env->exception_index = POWERPC_EXCP_ISI; |
450 | caa597bd | David Gibson | env->error_code = 0x40000000;
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451 | caa597bd | David Gibson | } else {
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452 | caa597bd | David Gibson | env->exception_index = POWERPC_EXCP_DSI; |
453 | caa597bd | David Gibson | env->error_code = 0;
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454 | caa597bd | David Gibson | env->spr[SPR_DAR] = eaddr; |
455 | caa597bd | David Gibson | if (rwx == 1) { |
456 | caa597bd | David Gibson | env->spr[SPR_DSISR] = 0x42000000;
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457 | caa597bd | David Gibson | } else {
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458 | caa597bd | David Gibson | env->spr[SPR_DSISR] = 0x40000000;
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459 | caa597bd | David Gibson | } |
460 | caa597bd | David Gibson | } |
461 | caa597bd | David Gibson | return 1; |
462 | 7f3bdc2d | David Gibson | } |
463 | 7f3bdc2d | David Gibson | LOG_MMU("found PTE at offset %08" HWADDR_PRIx "\n", pte_offset); |
464 | 7f3bdc2d | David Gibson | |
465 | 7f3bdc2d | David Gibson | /* 5. Check access permissions */
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466 | 7f3bdc2d | David Gibson | |
467 | f80872e2 | David Gibson | pp_prot = ppc_hash64_pte_prot(env, slb, pte); |
468 | f80872e2 | David Gibson | amr_prot = ppc_hash64_amr_prot(env, pte); |
469 | f80872e2 | David Gibson | prot = pp_prot & amr_prot; |
470 | 6a980110 | David Gibson | |
471 | caa597bd | David Gibson | if ((need_prot[rwx] & ~prot) != 0) { |
472 | 6a980110 | David Gibson | /* Access right violation */
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473 | 6a980110 | David Gibson | LOG_MMU("PTE access rejected\n");
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474 | caa597bd | David Gibson | if (rwx == 2) { |
475 | caa597bd | David Gibson | env->exception_index = POWERPC_EXCP_ISI; |
476 | caa597bd | David Gibson | env->error_code = 0x08000000;
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477 | caa597bd | David Gibson | } else {
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478 | f80872e2 | David Gibson | target_ulong dsisr = 0;
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479 | f80872e2 | David Gibson | |
480 | caa597bd | David Gibson | env->exception_index = POWERPC_EXCP_DSI; |
481 | caa597bd | David Gibson | env->error_code = 0;
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482 | caa597bd | David Gibson | env->spr[SPR_DAR] = eaddr; |
483 | f80872e2 | David Gibson | if (need_prot[rwx] & ~pp_prot) {
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484 | f80872e2 | David Gibson | dsisr |= 0x08000000;
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485 | f80872e2 | David Gibson | } |
486 | caa597bd | David Gibson | if (rwx == 1) { |
487 | f80872e2 | David Gibson | dsisr |= 0x02000000;
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488 | f80872e2 | David Gibson | } |
489 | f80872e2 | David Gibson | if (need_prot[rwx] & ~amr_prot) {
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490 | f80872e2 | David Gibson | dsisr |= 0x00200000;
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491 | caa597bd | David Gibson | } |
492 | f80872e2 | David Gibson | env->spr[SPR_DSISR] = dsisr; |
493 | caa597bd | David Gibson | } |
494 | caa597bd | David Gibson | return 1; |
495 | 6a980110 | David Gibson | } |
496 | 6a980110 | David Gibson | |
497 | 87dc3fd1 | David Gibson | LOG_MMU("PTE access granted !\n");
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498 | 87dc3fd1 | David Gibson | |
499 | 87dc3fd1 | David Gibson | /* 6. Update PTE referenced and changed bits if necessary */
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500 | 87dc3fd1 | David Gibson | |
501 | b3440746 | David Gibson | new_pte1 = pte.pte1 | HPTE64_R_R; /* set referenced bit */
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502 | b3440746 | David Gibson | if (rwx == 1) { |
503 | b3440746 | David Gibson | new_pte1 |= HPTE64_R_C; /* set changed (dirty) bit */
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504 | b3440746 | David Gibson | } else {
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505 | b3440746 | David Gibson | /* Treat the page as read-only for now, so that a later write
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506 | b3440746 | David Gibson | * will pass through this function again to set the C bit */
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507 | caa597bd | David Gibson | prot &= ~PAGE_WRITE; |
508 | b3440746 | David Gibson | } |
509 | b3440746 | David Gibson | |
510 | b3440746 | David Gibson | if (new_pte1 != pte.pte1) {
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511 | b3440746 | David Gibson | ppc_hash64_store_hpte1(env, pte_offset, new_pte1); |
512 | 7f3bdc2d | David Gibson | } |
513 | 0480884f | David Gibson | |
514 | 6d11d998 | David Gibson | /* 7. Determine the real address from the PTE */
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515 | 6d11d998 | David Gibson | |
516 | caa597bd | David Gibson | raddr = ppc_hash64_pte_raddr(slb, pte, eaddr); |
517 | caa597bd | David Gibson | |
518 | caa597bd | David Gibson | tlb_set_page(env, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK, |
519 | caa597bd | David Gibson | prot, mmu_idx, TARGET_PAGE_SIZE); |
520 | e01b4445 | David Gibson | |
521 | e01b4445 | David Gibson | return 0; |
522 | 0480884f | David Gibson | } |
523 | 629bd516 | David Gibson | |
524 | f2ad6be8 | David Gibson | hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr) |
525 | f2ad6be8 | David Gibson | { |
526 | 5883d8b2 | David Gibson | ppc_slb_t *slb; |
527 | 5883d8b2 | David Gibson | hwaddr pte_offset; |
528 | 5883d8b2 | David Gibson | ppc_hash_pte64_t pte; |
529 | 5883d8b2 | David Gibson | |
530 | 5883d8b2 | David Gibson | if (msr_dr == 0) { |
531 | 5883d8b2 | David Gibson | /* In real mode the top 4 effective address bits are ignored */
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532 | 5883d8b2 | David Gibson | return addr & 0x0FFFFFFFFFFFFFFFULL; |
533 | 5883d8b2 | David Gibson | } |
534 | f2ad6be8 | David Gibson | |
535 | 5883d8b2 | David Gibson | slb = slb_lookup(env, addr); |
536 | 5883d8b2 | David Gibson | if (!slb) {
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537 | 5883d8b2 | David Gibson | return -1; |
538 | 5883d8b2 | David Gibson | } |
539 | 5883d8b2 | David Gibson | |
540 | 5883d8b2 | David Gibson | pte_offset = ppc_hash64_htab_lookup(env, slb, addr, &pte); |
541 | 5883d8b2 | David Gibson | if (pte_offset == -1) { |
542 | f2ad6be8 | David Gibson | return -1; |
543 | f2ad6be8 | David Gibson | } |
544 | f2ad6be8 | David Gibson | |
545 | 5883d8b2 | David Gibson | return ppc_hash64_pte_raddr(slb, pte, addr) & TARGET_PAGE_MASK;
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546 | f2ad6be8 | David Gibson | } |