root / target-ppc / timebase_helper.c @ feature-archipelago
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| 1 | 6de673d4 | Blue Swirl | /*
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| 2 | 6de673d4 | Blue Swirl | * PowerPC emulation helpers for QEMU.
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| 3 | 6de673d4 | Blue Swirl | *
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| 4 | 6de673d4 | Blue Swirl | * Copyright (c) 2003-2007 Jocelyn Mayer
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| 5 | 6de673d4 | Blue Swirl | *
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| 6 | 6de673d4 | Blue Swirl | * This library is free software; you can redistribute it and/or
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| 7 | 6de673d4 | Blue Swirl | * modify it under the terms of the GNU Lesser General Public
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| 8 | 6de673d4 | Blue Swirl | * License as published by the Free Software Foundation; either
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| 9 | 6de673d4 | Blue Swirl | * version 2 of the License, or (at your option) any later version.
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| 10 | 6de673d4 | Blue Swirl | *
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| 11 | 6de673d4 | Blue Swirl | * This library is distributed in the hope that it will be useful,
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| 12 | 6de673d4 | Blue Swirl | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | 6de673d4 | Blue Swirl | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 14 | 6de673d4 | Blue Swirl | * Lesser General Public License for more details.
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| 15 | 6de673d4 | Blue Swirl | *
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| 16 | 6de673d4 | Blue Swirl | * You should have received a copy of the GNU Lesser General Public
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| 17 | 6de673d4 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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| 18 | 6de673d4 | Blue Swirl | */
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| 19 | 6de673d4 | Blue Swirl | #include "cpu.h" |
| 20 | 6de673d4 | Blue Swirl | #include "helper.h" |
| 21 | 6de673d4 | Blue Swirl | |
| 22 | 6de673d4 | Blue Swirl | /*****************************************************************************/
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| 23 | 6de673d4 | Blue Swirl | /* SPR accesses */
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| 24 | 6de673d4 | Blue Swirl | |
| 25 | d0f1562d | Blue Swirl | target_ulong helper_load_tbl(CPUPPCState *env) |
| 26 | 6de673d4 | Blue Swirl | {
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| 27 | 6de673d4 | Blue Swirl | return (target_ulong)cpu_ppc_load_tbl(env);
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| 28 | 6de673d4 | Blue Swirl | } |
| 29 | 6de673d4 | Blue Swirl | |
| 30 | d0f1562d | Blue Swirl | target_ulong helper_load_tbu(CPUPPCState *env) |
| 31 | 6de673d4 | Blue Swirl | {
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| 32 | 6de673d4 | Blue Swirl | return cpu_ppc_load_tbu(env);
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| 33 | 6de673d4 | Blue Swirl | } |
| 34 | 6de673d4 | Blue Swirl | |
| 35 | d0f1562d | Blue Swirl | target_ulong helper_load_atbl(CPUPPCState *env) |
| 36 | 6de673d4 | Blue Swirl | {
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| 37 | 6de673d4 | Blue Swirl | return (target_ulong)cpu_ppc_load_atbl(env);
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| 38 | 6de673d4 | Blue Swirl | } |
| 39 | 6de673d4 | Blue Swirl | |
| 40 | d0f1562d | Blue Swirl | target_ulong helper_load_atbu(CPUPPCState *env) |
| 41 | 6de673d4 | Blue Swirl | {
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| 42 | 6de673d4 | Blue Swirl | return cpu_ppc_load_atbu(env);
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| 43 | 6de673d4 | Blue Swirl | } |
| 44 | 6de673d4 | Blue Swirl | |
| 45 | 6de673d4 | Blue Swirl | #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
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| 46 | d0f1562d | Blue Swirl | target_ulong helper_load_purr(CPUPPCState *env) |
| 47 | 6de673d4 | Blue Swirl | {
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| 48 | 6de673d4 | Blue Swirl | return (target_ulong)cpu_ppc_load_purr(env);
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| 49 | 6de673d4 | Blue Swirl | } |
| 50 | 6de673d4 | Blue Swirl | #endif
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| 51 | 6de673d4 | Blue Swirl | |
| 52 | d0f1562d | Blue Swirl | target_ulong helper_load_601_rtcl(CPUPPCState *env) |
| 53 | 6de673d4 | Blue Swirl | {
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| 54 | 6de673d4 | Blue Swirl | return cpu_ppc601_load_rtcl(env);
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| 55 | 6de673d4 | Blue Swirl | } |
| 56 | 6de673d4 | Blue Swirl | |
| 57 | d0f1562d | Blue Swirl | target_ulong helper_load_601_rtcu(CPUPPCState *env) |
| 58 | 6de673d4 | Blue Swirl | {
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| 59 | 6de673d4 | Blue Swirl | return cpu_ppc601_load_rtcu(env);
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| 60 | 6de673d4 | Blue Swirl | } |
| 61 | 6de673d4 | Blue Swirl | |
| 62 | 6de673d4 | Blue Swirl | #if !defined(CONFIG_USER_ONLY)
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| 63 | d0f1562d | Blue Swirl | void helper_store_tbl(CPUPPCState *env, target_ulong val)
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| 64 | 6de673d4 | Blue Swirl | {
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| 65 | 6de673d4 | Blue Swirl | cpu_ppc_store_tbl(env, val); |
| 66 | 6de673d4 | Blue Swirl | } |
| 67 | 6de673d4 | Blue Swirl | |
| 68 | d0f1562d | Blue Swirl | void helper_store_tbu(CPUPPCState *env, target_ulong val)
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| 69 | 6de673d4 | Blue Swirl | {
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| 70 | 6de673d4 | Blue Swirl | cpu_ppc_store_tbu(env, val); |
| 71 | 6de673d4 | Blue Swirl | } |
| 72 | 6de673d4 | Blue Swirl | |
| 73 | d0f1562d | Blue Swirl | void helper_store_atbl(CPUPPCState *env, target_ulong val)
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| 74 | 6de673d4 | Blue Swirl | {
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| 75 | 6de673d4 | Blue Swirl | cpu_ppc_store_atbl(env, val); |
| 76 | 6de673d4 | Blue Swirl | } |
| 77 | 6de673d4 | Blue Swirl | |
| 78 | d0f1562d | Blue Swirl | void helper_store_atbu(CPUPPCState *env, target_ulong val)
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| 79 | 6de673d4 | Blue Swirl | {
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| 80 | 6de673d4 | Blue Swirl | cpu_ppc_store_atbu(env, val); |
| 81 | 6de673d4 | Blue Swirl | } |
| 82 | 6de673d4 | Blue Swirl | |
| 83 | d0f1562d | Blue Swirl | void helper_store_601_rtcl(CPUPPCState *env, target_ulong val)
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| 84 | 6de673d4 | Blue Swirl | {
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| 85 | 6de673d4 | Blue Swirl | cpu_ppc601_store_rtcl(env, val); |
| 86 | 6de673d4 | Blue Swirl | } |
| 87 | 6de673d4 | Blue Swirl | |
| 88 | d0f1562d | Blue Swirl | void helper_store_601_rtcu(CPUPPCState *env, target_ulong val)
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| 89 | 6de673d4 | Blue Swirl | {
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| 90 | 6de673d4 | Blue Swirl | cpu_ppc601_store_rtcu(env, val); |
| 91 | 6de673d4 | Blue Swirl | } |
| 92 | 6de673d4 | Blue Swirl | |
| 93 | d0f1562d | Blue Swirl | target_ulong helper_load_decr(CPUPPCState *env) |
| 94 | 6de673d4 | Blue Swirl | {
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| 95 | 6de673d4 | Blue Swirl | return cpu_ppc_load_decr(env);
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| 96 | 6de673d4 | Blue Swirl | } |
| 97 | 6de673d4 | Blue Swirl | |
| 98 | d0f1562d | Blue Swirl | void helper_store_decr(CPUPPCState *env, target_ulong val)
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| 99 | 6de673d4 | Blue Swirl | {
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| 100 | 6de673d4 | Blue Swirl | cpu_ppc_store_decr(env, val); |
| 101 | 6de673d4 | Blue Swirl | } |
| 102 | 6de673d4 | Blue Swirl | |
| 103 | d0f1562d | Blue Swirl | target_ulong helper_load_40x_pit(CPUPPCState *env) |
| 104 | 6de673d4 | Blue Swirl | {
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| 105 | 6de673d4 | Blue Swirl | return load_40x_pit(env);
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| 106 | 6de673d4 | Blue Swirl | } |
| 107 | 6de673d4 | Blue Swirl | |
| 108 | d0f1562d | Blue Swirl | void helper_store_40x_pit(CPUPPCState *env, target_ulong val)
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| 109 | 6de673d4 | Blue Swirl | {
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| 110 | 6de673d4 | Blue Swirl | store_40x_pit(env, val); |
| 111 | 6de673d4 | Blue Swirl | } |
| 112 | 6de673d4 | Blue Swirl | |
| 113 | d0f1562d | Blue Swirl | void helper_store_booke_tcr(CPUPPCState *env, target_ulong val)
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| 114 | 6de673d4 | Blue Swirl | {
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| 115 | 6de673d4 | Blue Swirl | store_booke_tcr(env, val); |
| 116 | 6de673d4 | Blue Swirl | } |
| 117 | 6de673d4 | Blue Swirl | |
| 118 | d0f1562d | Blue Swirl | void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
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| 119 | 6de673d4 | Blue Swirl | {
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| 120 | 6de673d4 | Blue Swirl | store_booke_tsr(env, val); |
| 121 | 6de673d4 | Blue Swirl | } |
| 122 | 6de673d4 | Blue Swirl | #endif
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| 123 | 6de673d4 | Blue Swirl | |
| 124 | 6de673d4 | Blue Swirl | /*****************************************************************************/
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| 125 | 6de673d4 | Blue Swirl | /* Embedded PowerPC specific helpers */
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| 126 | 6de673d4 | Blue Swirl | |
| 127 | 6de673d4 | Blue Swirl | /* XXX: to be improved to check access rights when in user-mode */
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| 128 | d0f1562d | Blue Swirl | target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn) |
| 129 | 6de673d4 | Blue Swirl | {
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| 130 | 6de673d4 | Blue Swirl | uint32_t val = 0;
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| 131 | 6de673d4 | Blue Swirl | |
| 132 | 6de673d4 | Blue Swirl | if (unlikely(env->dcr_env == NULL)) { |
| 133 | 6de673d4 | Blue Swirl | qemu_log("No DCR environment\n");
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| 134 | 6de673d4 | Blue Swirl | helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
| 135 | 6de673d4 | Blue Swirl | POWERPC_EXCP_INVAL | |
| 136 | 6de673d4 | Blue Swirl | POWERPC_EXCP_INVAL_INVAL); |
| 137 | 6de673d4 | Blue Swirl | } else if (unlikely(ppc_dcr_read(env->dcr_env, |
| 138 | 6de673d4 | Blue Swirl | (uint32_t)dcrn, &val) != 0)) {
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| 139 | 6de673d4 | Blue Swirl | qemu_log("DCR read error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn);
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| 140 | 6de673d4 | Blue Swirl | helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
| 141 | 6de673d4 | Blue Swirl | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
| 142 | 6de673d4 | Blue Swirl | } |
| 143 | 6de673d4 | Blue Swirl | return val;
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| 144 | 6de673d4 | Blue Swirl | } |
| 145 | 6de673d4 | Blue Swirl | |
| 146 | d0f1562d | Blue Swirl | void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
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| 147 | 6de673d4 | Blue Swirl | {
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| 148 | 6de673d4 | Blue Swirl | if (unlikely(env->dcr_env == NULL)) { |
| 149 | 6de673d4 | Blue Swirl | qemu_log("No DCR environment\n");
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| 150 | 6de673d4 | Blue Swirl | helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
| 151 | 6de673d4 | Blue Swirl | POWERPC_EXCP_INVAL | |
| 152 | 6de673d4 | Blue Swirl | POWERPC_EXCP_INVAL_INVAL); |
| 153 | 6de673d4 | Blue Swirl | } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn, |
| 154 | 6de673d4 | Blue Swirl | (uint32_t)val) != 0)) {
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| 155 | 6de673d4 | Blue Swirl | qemu_log("DCR write error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn);
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| 156 | 6de673d4 | Blue Swirl | helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
| 157 | 6de673d4 | Blue Swirl | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
| 158 | 6de673d4 | Blue Swirl | } |
| 159 | 6de673d4 | Blue Swirl | } |