Revision febc9920
b/target-cris/helper.h | ||
---|---|---|
1 | 1 |
#include "def-helper.h" |
2 | 2 |
|
3 |
DEF_HELPER_1(raise_exception, void, i32)
|
|
4 |
DEF_HELPER_1(tlb_flush_pid, void, i32)
|
|
5 |
DEF_HELPER_1(spc_write, void, i32)
|
|
3 |
DEF_HELPER_2(raise_exception, void, env, i32)
|
|
4 |
DEF_HELPER_2(tlb_flush_pid, void, env, i32)
|
|
5 |
DEF_HELPER_2(spc_write, void, env, i32)
|
|
6 | 6 |
DEF_HELPER_3(dump, void, i32, i32, i32) |
7 |
DEF_HELPER_0(rfe, void);
|
|
8 |
DEF_HELPER_0(rfn, void);
|
|
7 |
DEF_HELPER_1(rfe, void, env);
|
|
8 |
DEF_HELPER_1(rfn, void, env);
|
|
9 | 9 |
|
10 |
DEF_HELPER_2(movl_sreg_reg, void, i32, i32)
|
|
11 |
DEF_HELPER_2(movl_reg_sreg, void, i32, i32)
|
|
10 |
DEF_HELPER_3(movl_sreg_reg, void, env, i32, i32)
|
|
11 |
DEF_HELPER_3(movl_reg_sreg, void, env, i32, i32)
|
|
12 | 12 |
|
13 | 13 |
DEF_HELPER_FLAGS_1(lz, TCG_CALL_PURE, i32, i32); |
14 |
DEF_HELPER_FLAGS_3(btst, TCG_CALL_PURE, i32, i32, i32, i32);
|
|
14 |
DEF_HELPER_FLAGS_4(btst, TCG_CALL_PURE, i32, env, i32, i32, i32);
|
|
15 | 15 |
|
16 |
DEF_HELPER_FLAGS_3(evaluate_flags_muls, TCG_CALL_PURE, i32, i32, i32, i32) |
|
17 |
DEF_HELPER_FLAGS_3(evaluate_flags_mulu, TCG_CALL_PURE, i32, i32, i32, i32) |
|
18 |
DEF_HELPER_FLAGS_4(evaluate_flags_mcp, TCG_CALL_PURE, i32, i32, i32, i32, i32) |
|
19 |
DEF_HELPER_FLAGS_4(evaluate_flags_alu_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) |
|
20 |
DEF_HELPER_FLAGS_4(evaluate_flags_sub_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) |
|
21 |
DEF_HELPER_FLAGS_2(evaluate_flags_move_4, TCG_CALL_PURE, i32, i32, i32) |
|
22 |
DEF_HELPER_FLAGS_2(evaluate_flags_move_2, TCG_CALL_PURE, i32, i32, i32) |
|
23 |
DEF_HELPER_0(evaluate_flags, void) |
|
24 |
DEF_HELPER_0(top_evaluate_flags, void) |
|
16 |
DEF_HELPER_FLAGS_4(evaluate_flags_muls, TCG_CALL_PURE, i32, env, i32, i32, i32) |
|
17 |
DEF_HELPER_FLAGS_4(evaluate_flags_mulu, TCG_CALL_PURE, i32, env, i32, i32, i32) |
|
18 |
DEF_HELPER_FLAGS_5(evaluate_flags_mcp, TCG_CALL_PURE, i32, env, |
|
19 |
i32, i32, i32, i32) |
|
20 |
DEF_HELPER_FLAGS_5(evaluate_flags_alu_4, TCG_CALL_PURE, i32, env, |
|
21 |
i32, i32, i32, i32) |
|
22 |
DEF_HELPER_FLAGS_5(evaluate_flags_sub_4, TCG_CALL_PURE, i32, env, |
|
23 |
i32, i32, i32, i32) |
|
24 |
DEF_HELPER_FLAGS_3(evaluate_flags_move_4, TCG_CALL_PURE, i32, env, i32, i32) |
|
25 |
DEF_HELPER_FLAGS_3(evaluate_flags_move_2, TCG_CALL_PURE, i32, env, i32, i32) |
|
26 |
DEF_HELPER_1(evaluate_flags, void, env) |
|
27 |
DEF_HELPER_1(top_evaluate_flags, void, env) |
|
25 | 28 |
|
26 | 29 |
#include "def-helper.h" |
b/target-cris/op_helper.c | ||
---|---|---|
79 | 79 |
cpu_restore_state(tb, env, retaddr); |
80 | 80 |
|
81 | 81 |
/* Evaluate flags after retranslation. */ |
82 |
helper_top_evaluate_flags(); |
|
82 |
helper_top_evaluate_flags(env);
|
|
83 | 83 |
} |
84 | 84 |
} |
85 | 85 |
cpu_loop_exit(env); |
... | ... | |
89 | 89 |
|
90 | 90 |
#endif |
91 | 91 |
|
92 |
void helper_raise_exception(uint32_t index) |
|
92 |
void helper_raise_exception(CPUCRISState *env, uint32_t index)
|
|
93 | 93 |
{ |
94 | 94 |
env->exception_index = index; |
95 | 95 |
cpu_loop_exit(env); |
96 | 96 |
} |
97 | 97 |
|
98 |
void helper_tlb_flush_pid(uint32_t pid) |
|
98 |
void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
|
|
99 | 99 |
{ |
100 | 100 |
#if !defined(CONFIG_USER_ONLY) |
101 | 101 |
pid &= 0xff; |
... | ... | |
104 | 104 |
#endif |
105 | 105 |
} |
106 | 106 |
|
107 |
void helper_spc_write(uint32_t new_spc) |
|
107 |
void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
|
|
108 | 108 |
{ |
109 | 109 |
#if !defined(CONFIG_USER_ONLY) |
110 | 110 |
tlb_flush_page(env, env->pregs[PR_SPC]); |
... | ... | |
121 | 121 |
#define EXTRACT_FIELD(src, start, end) \ |
122 | 122 |
(((src) >> start) & ((1 << (end - start + 1)) - 1)) |
123 | 123 |
|
124 |
void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
|
|
124 |
void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
|
|
125 | 125 |
{ |
126 | 126 |
uint32_t srs; |
127 | 127 |
srs = env->pregs[PR_SRS]; |
... | ... | |
171 | 171 |
#endif |
172 | 172 |
} |
173 | 173 |
|
174 |
void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
|
|
174 |
void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
|
|
175 | 175 |
{ |
176 | 176 |
uint32_t srs; |
177 | 177 |
env->pregs[PR_SRS] &= 3; |
... | ... | |
216 | 216 |
env->pregs[PR_CCS] = ccs; |
217 | 217 |
} |
218 | 218 |
|
219 |
void helper_rfe(void)
|
|
219 |
void helper_rfe(CPUCRISState *env)
|
|
220 | 220 |
{ |
221 | 221 |
int rflag = env->pregs[PR_CCS] & R_FLAG; |
222 | 222 |
|
... | ... | |
232 | 232 |
env->pregs[PR_CCS] |= P_FLAG; |
233 | 233 |
} |
234 | 234 |
|
235 |
void helper_rfn(void)
|
|
235 |
void helper_rfn(CPUCRISState *env)
|
|
236 | 236 |
{ |
237 | 237 |
int rflag = env->pregs[PR_CCS] & R_FLAG; |
238 | 238 |
|
... | ... | |
256 | 256 |
return clz32(t0); |
257 | 257 |
} |
258 | 258 |
|
259 |
uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) |
|
259 |
uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
|
|
260 | 260 |
{ |
261 | 261 |
/* FIXME: clean this up. */ |
262 | 262 |
|
... | ... | |
284 | 284 |
return ccs; |
285 | 285 |
} |
286 | 286 |
|
287 |
static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) |
|
287 |
static inline uint32_t evaluate_flags_writeback(CPUCRISState *env, |
|
288 |
uint32_t flags, uint32_t ccs) |
|
288 | 289 |
{ |
289 | 290 |
unsigned int x, z, mask; |
290 | 291 |
|
... | ... | |
303 | 304 |
return ccs; |
304 | 305 |
} |
305 | 306 |
|
306 |
uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) |
|
307 |
uint32_t helper_evaluate_flags_muls(CPUCRISState *env, |
|
308 |
uint32_t ccs, uint32_t res, uint32_t mof) |
|
307 | 309 |
{ |
308 | 310 |
uint32_t flags = 0; |
309 | 311 |
int64_t tmp; |
... | ... | |
321 | 323 |
if ((dneg && mof != -1) |
322 | 324 |
|| (!dneg && mof != 0)) |
323 | 325 |
flags |= V_FLAG; |
324 |
return evaluate_flags_writeback(flags, ccs);
|
|
326 |
return evaluate_flags_writeback(env, flags, ccs);
|
|
325 | 327 |
} |
326 | 328 |
|
327 |
uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) |
|
329 |
uint32_t helper_evaluate_flags_mulu(CPUCRISState *env, |
|
330 |
uint32_t ccs, uint32_t res, uint32_t mof) |
|
328 | 331 |
{ |
329 | 332 |
uint32_t flags = 0; |
330 | 333 |
uint64_t tmp; |
... | ... | |
339 | 342 |
if (mof) |
340 | 343 |
flags |= V_FLAG; |
341 | 344 |
|
342 |
return evaluate_flags_writeback(flags, ccs);
|
|
345 |
return evaluate_flags_writeback(env, flags, ccs);
|
|
343 | 346 |
} |
344 | 347 |
|
345 |
uint32_t helper_evaluate_flags_mcp(uint32_t ccs, |
|
348 |
uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
|
|
346 | 349 |
uint32_t src, uint32_t dst, uint32_t res) |
347 | 350 |
{ |
348 | 351 |
uint32_t flags = 0; |
... | ... | |
368 | 371 |
flags |= R_FLAG; |
369 | 372 |
} |
370 | 373 |
|
371 |
return evaluate_flags_writeback(flags, ccs);
|
|
374 |
return evaluate_flags_writeback(env, flags, ccs);
|
|
372 | 375 |
} |
373 | 376 |
|
374 |
uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, |
|
377 |
uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
|
|
375 | 378 |
uint32_t src, uint32_t dst, uint32_t res) |
376 | 379 |
{ |
377 | 380 |
uint32_t flags = 0; |
... | ... | |
397 | 400 |
flags |= C_FLAG; |
398 | 401 |
} |
399 | 402 |
|
400 |
return evaluate_flags_writeback(flags, ccs);
|
|
403 |
return evaluate_flags_writeback(env, flags, ccs);
|
|
401 | 404 |
} |
402 | 405 |
|
403 |
uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, |
|
406 |
uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
|
|
404 | 407 |
uint32_t src, uint32_t dst, uint32_t res) |
405 | 408 |
{ |
406 | 409 |
uint32_t flags = 0; |
... | ... | |
427 | 430 |
} |
428 | 431 |
|
429 | 432 |
flags ^= C_FLAG; |
430 |
return evaluate_flags_writeback(flags, ccs);
|
|
433 |
return evaluate_flags_writeback(env, flags, ccs);
|
|
431 | 434 |
} |
432 | 435 |
|
433 |
uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) |
|
436 |
uint32_t helper_evaluate_flags_move_4(CPUCRISState *env, |
|
437 |
uint32_t ccs, uint32_t res) |
|
434 | 438 |
{ |
435 | 439 |
uint32_t flags = 0; |
436 | 440 |
|
... | ... | |
439 | 443 |
else if (res == 0L) |
440 | 444 |
flags |= Z_FLAG; |
441 | 445 |
|
442 |
return evaluate_flags_writeback(flags, ccs);
|
|
446 |
return evaluate_flags_writeback(env, flags, ccs);
|
|
443 | 447 |
} |
444 |
uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) |
|
448 |
uint32_t helper_evaluate_flags_move_2(CPUCRISState *env, |
|
449 |
uint32_t ccs, uint32_t res) |
|
445 | 450 |
{ |
446 | 451 |
uint32_t flags = 0; |
447 | 452 |
|
... | ... | |
450 | 455 |
else if (res == 0) |
451 | 456 |
flags |= Z_FLAG; |
452 | 457 |
|
453 |
return evaluate_flags_writeback(flags, ccs);
|
|
458 |
return evaluate_flags_writeback(env, flags, ccs);
|
|
454 | 459 |
} |
455 | 460 |
|
456 | 461 |
/* TODO: This is expensive. We could split things up and only evaluate part of |
457 | 462 |
CCR on a need to know basis. For now, we simply re-evaluate everything. */ |
458 |
void helper_evaluate_flags(void)
|
|
463 |
void helper_evaluate_flags(CPUCRISState *env)
|
|
459 | 464 |
{ |
460 | 465 |
uint32_t src, dst, res; |
461 | 466 |
uint32_t flags = 0; |
... | ... | |
571 | 576 |
if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP) |
572 | 577 |
flags ^= C_FLAG; |
573 | 578 |
|
574 |
env->pregs[PR_CCS] = evaluate_flags_writeback(flags, env->pregs[PR_CCS]); |
|
579 |
env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags, |
|
580 |
env->pregs[PR_CCS]); |
|
575 | 581 |
} |
576 | 582 |
|
577 |
void helper_top_evaluate_flags(void)
|
|
583 |
void helper_top_evaluate_flags(CPUCRISState *env)
|
|
578 | 584 |
{ |
579 | 585 |
switch (env->cc_op) |
580 | 586 |
{ |
581 | 587 |
case CC_OP_MCP: |
582 |
env->pregs[PR_CCS] = helper_evaluate_flags_mcp(
|
|
588 |
env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
|
|
583 | 589 |
env->pregs[PR_CCS], env->cc_src, |
584 | 590 |
env->cc_dest, env->cc_result); |
585 | 591 |
break; |
586 | 592 |
case CC_OP_MULS: |
587 |
env->pregs[PR_CCS] = helper_evaluate_flags_muls(
|
|
593 |
env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
|
|
588 | 594 |
env->pregs[PR_CCS], env->cc_result, |
589 | 595 |
env->pregs[PR_MOF]); |
590 | 596 |
break; |
591 | 597 |
case CC_OP_MULU: |
592 |
env->pregs[PR_CCS] = helper_evaluate_flags_mulu(
|
|
598 |
env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
|
|
593 | 599 |
env->pregs[PR_CCS], env->cc_result, |
594 | 600 |
env->pregs[PR_MOF]); |
595 | 601 |
break; |
... | ... | |
604 | 610 |
{ |
605 | 611 |
case 4: |
606 | 612 |
env->pregs[PR_CCS] = |
607 |
helper_evaluate_flags_move_4(
|
|
613 |
helper_evaluate_flags_move_4(env,
|
|
608 | 614 |
env->pregs[PR_CCS], |
609 | 615 |
env->cc_result); |
610 | 616 |
break; |
611 | 617 |
case 2: |
612 | 618 |
env->pregs[PR_CCS] = |
613 |
helper_evaluate_flags_move_2(
|
|
619 |
helper_evaluate_flags_move_2(env,
|
|
614 | 620 |
env->pregs[PR_CCS], |
615 | 621 |
env->cc_result); |
616 | 622 |
break; |
617 | 623 |
default: |
618 |
helper_evaluate_flags();
|
|
624 |
helper_evaluate_flags(env);
|
|
619 | 625 |
break; |
620 | 626 |
} |
621 | 627 |
break; |
... | ... | |
626 | 632 |
case CC_OP_CMP: |
627 | 633 |
if (env->cc_size == 4) |
628 | 634 |
env->pregs[PR_CCS] = |
629 |
helper_evaluate_flags_sub_4(
|
|
635 |
helper_evaluate_flags_sub_4(env,
|
|
630 | 636 |
env->pregs[PR_CCS], |
631 | 637 |
env->cc_src, env->cc_dest, |
632 | 638 |
env->cc_result); |
633 | 639 |
else |
634 |
helper_evaluate_flags();
|
|
640 |
helper_evaluate_flags(env);
|
|
635 | 641 |
break; |
636 | 642 |
default: |
637 | 643 |
{ |
... | ... | |
639 | 645 |
{ |
640 | 646 |
case 4: |
641 | 647 |
env->pregs[PR_CCS] = |
642 |
helper_evaluate_flags_alu_4(
|
|
648 |
helper_evaluate_flags_alu_4(env,
|
|
643 | 649 |
env->pregs[PR_CCS], |
644 | 650 |
env->cc_src, env->cc_dest, |
645 | 651 |
env->cc_result); |
646 | 652 |
break; |
647 | 653 |
default: |
648 |
helper_evaluate_flags();
|
|
654 |
helper_evaluate_flags(env);
|
|
649 | 655 |
break; |
650 | 656 |
} |
651 | 657 |
} |
b/target-cris/translate.c | ||
---|---|---|
211 | 211 |
tcg_gen_andi_tl(cpu_PR[r], tn, 3); |
212 | 212 |
else { |
213 | 213 |
if (r == PR_PID) |
214 |
gen_helper_tlb_flush_pid(tn);
|
|
214 |
gen_helper_tlb_flush_pid(cpu_env, tn);
|
|
215 | 215 |
if (dc->tb_flags & S_FLAG && r == PR_SPC) |
216 |
gen_helper_spc_write(tn);
|
|
216 |
gen_helper_spc_write(cpu_env, tn);
|
|
217 | 217 |
else if (r == PR_CCS) |
218 | 218 |
dc->cpustate_changed = 1; |
219 | 219 |
tcg_gen_mov_tl(cpu_PR[r], tn); |
... | ... | |
278 | 278 |
static inline void t_gen_raise_exception(uint32_t index) |
279 | 279 |
{ |
280 | 280 |
TCGv_i32 tmp = tcg_const_i32(index); |
281 |
gen_helper_raise_exception(tmp);
|
|
281 |
gen_helper_raise_exception(cpu_env, tmp);
|
|
282 | 282 |
tcg_temp_free_i32(tmp); |
283 | 283 |
} |
284 | 284 |
|
... | ... | |
624 | 624 |
switch (dc->cc_op) |
625 | 625 |
{ |
626 | 626 |
case CC_OP_MCP: |
627 |
gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS],
|
|
627 |
gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env,
|
|
628 | 628 |
cpu_PR[PR_CCS], cc_src, |
629 | 629 |
cc_dest, cc_result); |
630 | 630 |
break; |
631 | 631 |
case CC_OP_MULS: |
632 |
gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS],
|
|
632 |
gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], cpu_env,
|
|
633 | 633 |
cpu_PR[PR_CCS], cc_result, |
634 | 634 |
cpu_PR[PR_MOF]); |
635 | 635 |
break; |
636 | 636 |
case CC_OP_MULU: |
637 |
gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS],
|
|
637 |
gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], cpu_env,
|
|
638 | 638 |
cpu_PR[PR_CCS], cc_result, |
639 | 639 |
cpu_PR[PR_MOF]); |
640 | 640 |
break; |
... | ... | |
648 | 648 |
switch (dc->cc_size) |
649 | 649 |
{ |
650 | 650 |
case 4: |
651 |
gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS],
|
|
652 |
cpu_PR[PR_CCS], cc_result);
|
|
651 |
gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS],
|
|
652 |
cpu_env, cpu_PR[PR_CCS], cc_result);
|
|
653 | 653 |
break; |
654 | 654 |
case 2: |
655 |
gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS],
|
|
656 |
cpu_PR[PR_CCS], cc_result);
|
|
655 |
gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS],
|
|
656 |
cpu_env, cpu_PR[PR_CCS], cc_result);
|
|
657 | 657 |
break; |
658 | 658 |
default: |
659 |
gen_helper_evaluate_flags();
|
|
659 |
gen_helper_evaluate_flags(cpu_env);
|
|
660 | 660 |
break; |
661 | 661 |
} |
662 | 662 |
break; |
... | ... | |
666 | 666 |
case CC_OP_SUB: |
667 | 667 |
case CC_OP_CMP: |
668 | 668 |
if (dc->cc_size == 4) |
669 |
gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS],
|
|
669 |
gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], cpu_env,
|
|
670 | 670 |
cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); |
671 | 671 |
else |
672 |
gen_helper_evaluate_flags();
|
|
672 |
gen_helper_evaluate_flags(cpu_env);
|
|
673 | 673 |
|
674 | 674 |
break; |
675 | 675 |
default: |
676 | 676 |
switch (dc->cc_size) |
677 | 677 |
{ |
678 | 678 |
case 4: |
679 |
gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS],
|
|
679 |
gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], cpu_env,
|
|
680 | 680 |
cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); |
681 | 681 |
break; |
682 | 682 |
default: |
683 |
gen_helper_evaluate_flags();
|
|
683 |
gen_helper_evaluate_flags(cpu_env);
|
|
684 | 684 |
break; |
685 | 685 |
} |
686 | 686 |
break; |
... | ... | |
1475 | 1475 |
|
1476 | 1476 |
cris_cc_mask(dc, CC_MASK_NZ); |
1477 | 1477 |
cris_evaluate_flags(dc); |
1478 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2],
|
|
1478 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2],
|
|
1479 | 1479 |
tcg_const_tl(dc->op1), cpu_PR[PR_CCS]); |
1480 | 1480 |
cris_alu(dc, CC_OP_MOVE, |
1481 | 1481 |
cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op2], 4); |
... | ... | |
1925 | 1925 |
dc->op1, dc->op2); |
1926 | 1926 |
cris_cc_mask(dc, CC_MASK_NZ); |
1927 | 1927 |
cris_evaluate_flags(dc); |
1928 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2],
|
|
1928 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2],
|
|
1929 | 1929 |
cpu_R[dc->op1], cpu_PR[PR_CCS]); |
1930 | 1930 |
cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], |
1931 | 1931 |
cpu_R[dc->op2], cpu_R[dc->op2], 4); |
... | ... | |
2135 | 2135 |
{ |
2136 | 2136 |
LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2); |
2137 | 2137 |
cris_cc_mask(dc, 0); |
2138 |
gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1)); |
|
2138 |
gen_helper_movl_sreg_reg(cpu_env, tcg_const_tl(dc->op2), |
|
2139 |
tcg_const_tl(dc->op1)); |
|
2139 | 2140 |
return 2; |
2140 | 2141 |
} |
2141 | 2142 |
static int dec_move_sr(DisasContext *dc) |
2142 | 2143 |
{ |
2143 | 2144 |
LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1); |
2144 | 2145 |
cris_cc_mask(dc, 0); |
2145 |
gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); |
|
2146 |
gen_helper_movl_reg_sreg(cpu_env, tcg_const_tl(dc->op1), |
|
2147 |
tcg_const_tl(dc->op2)); |
|
2146 | 2148 |
return 2; |
2147 | 2149 |
} |
2148 | 2150 |
|
... | ... | |
2906 | 2908 |
/* rfe. */ |
2907 | 2909 |
LOG_DIS("rfe\n"); |
2908 | 2910 |
cris_evaluate_flags(dc); |
2909 |
gen_helper_rfe();
|
|
2911 |
gen_helper_rfe(cpu_env);
|
|
2910 | 2912 |
dc->is_jmp = DISAS_UPDATE; |
2911 | 2913 |
break; |
2912 | 2914 |
case 5: |
2913 | 2915 |
/* rfn. */ |
2914 | 2916 |
LOG_DIS("rfn\n"); |
2915 | 2917 |
cris_evaluate_flags(dc); |
2916 |
gen_helper_rfn();
|
|
2918 |
gen_helper_rfn(cpu_env);
|
|
2917 | 2919 |
dc->is_jmp = DISAS_UPDATE; |
2918 | 2920 |
break; |
2919 | 2921 |
case 6: |
b/target-cris/translate_v10.c | ||
---|---|---|
289 | 289 |
} else { |
290 | 290 |
/* BTST */ |
291 | 291 |
cris_update_cc_op(dc, CC_OP_FLAGS, 4); |
292 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst], |
|
292 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst],
|
|
293 | 293 |
tcg_const_tl(imm), cpu_PR[PR_CCS]); |
294 | 294 |
} |
295 | 295 |
break; |
... | ... | |
723 | 723 |
LOG_DIS("btst $r%d, $r%d sz=%d\n", dc->src, dc->dst, size); |
724 | 724 |
cris_cc_mask(dc, CC_MASK_NZVC); |
725 | 725 |
cris_update_cc_op(dc, CC_OP_FLAGS, 4); |
726 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst], |
|
726 |
gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst],
|
|
727 | 727 |
cpu_R[dc->src], cpu_PR[PR_CCS]); |
728 | 728 |
break; |
729 | 729 |
case CRISV10_REG_DSTEP: |
Also available in: Unified diff