Revision ff2712ba hw/pl031.c

b/hw/pl031.c
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        pl031_update(s);
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        break;
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    case RTC_ICR:
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        /* The PL031 documentation (DDI0224B) states that the interupt is
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        /* The PL031 documentation (DDI0224B) states that the interrupt is
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           cleared when bit 0 of the written value is set.  However the
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           arm926e documentation (DDI0287B) states that the interrupt is
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           cleared when any value is written.  */

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