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1 80cabfad bellard
/*
2 80cabfad bellard
 * QEMU PC System Emulator
3 5fafdf24 ths
 *
4 80cabfad bellard
 * Copyright (c) 2003-2004 Fabrice Bellard
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
12 80cabfad bellard
 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 80cabfad bellard
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 80cabfad bellard
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
24 87ecb68b pbrook
#include "hw.h"
25 87ecb68b pbrook
#include "pc.h"
26 87ecb68b pbrook
#include "fdc.h"
27 87ecb68b pbrook
#include "pci.h"
28 18e08a55 Michael S. Tsirkin
#include "vmware_vga.h"
29 18e08a55 Michael S. Tsirkin
#include "usb-uhci.h"
30 18e08a55 Michael S. Tsirkin
#include "usb-ohci.h"
31 18e08a55 Michael S. Tsirkin
#include "prep_pci.h"
32 18e08a55 Michael S. Tsirkin
#include "apb_pci.h"
33 87ecb68b pbrook
#include "block.h"
34 87ecb68b pbrook
#include "sysemu.h"
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#include "audio/audio.h"
36 87ecb68b pbrook
#include "net.h"
37 87ecb68b pbrook
#include "smbus.h"
38 87ecb68b pbrook
#include "boards.h"
39 376253ec aliguori
#include "monitor.h"
40 3cce6243 blueswir1
#include "fw_cfg.h"
41 16b29ae1 aliguori
#include "hpet_emul.h"
42 9dd986cc Richard W.M. Jones
#include "watchdog.h"
43 b6f6e3d3 aliguori
#include "smbios.h"
44 ec82026c Gerd Hoffmann
#include "ide.h"
45 ca20cf32 Blue Swirl
#include "loader.h"
46 ca20cf32 Blue Swirl
#include "elf.h"
47 52001445 Adam Lackorzynski
#include "multiboot.h"
48 80cabfad bellard
49 b41a2cd1 bellard
/* output Bochs bios info messages */
50 b41a2cd1 bellard
//#define DEBUG_BIOS
51 b41a2cd1 bellard
52 80cabfad bellard
#define BIOS_FILENAME "bios.bin"
53 80cabfad bellard
54 7fb4fdcf balrog
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
55 7fb4fdcf balrog
56 a80274c3 pbrook
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
57 a80274c3 pbrook
#define ACPI_DATA_SIZE       0x10000
58 3cce6243 blueswir1
#define BIOS_CFG_IOPORT 0x510
59 8a92ea2f aliguori
#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
60 b6f6e3d3 aliguori
#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
61 6b35e7bf Jes Sorensen
#define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
62 80cabfad bellard
63 e4bcb14c ths
#define MAX_IDE_BUS 2
64 e4bcb14c ths
65 5c02c033 Blue Swirl
static FDCtrl *floppy_controller;
66 b0a21b53 bellard
static RTCState *rtc_state;
67 ec844b96 bellard
static PITState *pit;
68 0a3bacf3 Juan Quintela
static PCII440FXState *i440fx_state;
69 80cabfad bellard
70 1452411b Avi Kivity
typedef struct isa_irq_state {
71 1452411b Avi Kivity
    qemu_irq *i8259;
72 1632dc6a Avi Kivity
    qemu_irq *ioapic;
73 1452411b Avi Kivity
} IsaIrqState;
74 1452411b Avi Kivity
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static void isa_irq_handler(void *opaque, int n, int level)
76 1452411b Avi Kivity
{
77 1452411b Avi Kivity
    IsaIrqState *isa = (IsaIrqState *)opaque;
78 1452411b Avi Kivity
79 1632dc6a Avi Kivity
    if (n < 16) {
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        qemu_set_irq(isa->i8259[n], level);
81 1632dc6a Avi Kivity
    }
82 2c8d9340 Gerd Hoffmann
    if (isa->ioapic)
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        qemu_set_irq(isa->ioapic[n], level);
84 1632dc6a Avi Kivity
};
85 1452411b Avi Kivity
86 b41a2cd1 bellard
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
87 80cabfad bellard
{
88 80cabfad bellard
}
89 80cabfad bellard
90 f929aad6 bellard
/* MSDOS compatibility mode FPU exception support */
91 d537cf6c pbrook
static qemu_irq ferr_irq;
92 f929aad6 bellard
/* XXX: add IGNNE support */
93 f929aad6 bellard
void cpu_set_ferr(CPUX86State *s)
94 f929aad6 bellard
{
95 d537cf6c pbrook
    qemu_irq_raise(ferr_irq);
96 f929aad6 bellard
}
97 f929aad6 bellard
98 f929aad6 bellard
static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
99 f929aad6 bellard
{
100 d537cf6c pbrook
    qemu_irq_lower(ferr_irq);
101 f929aad6 bellard
}
102 f929aad6 bellard
103 28ab0e2e bellard
/* TSC handling */
104 28ab0e2e bellard
uint64_t cpu_get_tsc(CPUX86State *env)
105 28ab0e2e bellard
{
106 4a1418e0 Anthony Liguori
    return cpu_get_ticks();
107 28ab0e2e bellard
}
108 28ab0e2e bellard
109 a5954d5c bellard
/* SMM support */
110 a5954d5c bellard
void cpu_smm_update(CPUState *env)
111 a5954d5c bellard
{
112 a5954d5c bellard
    if (i440fx_state && env == first_cpu)
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        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
114 a5954d5c bellard
}
115 a5954d5c bellard
116 a5954d5c bellard
117 3de388f6 bellard
/* IRQ handling */
118 3de388f6 bellard
int cpu_get_pic_interrupt(CPUState *env)
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{
120 3de388f6 bellard
    int intno;
121 3de388f6 bellard
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    intno = apic_get_interrupt(env);
123 3de388f6 bellard
    if (intno >= 0) {
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        /* set irq request if a PIC irq is still pending */
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        /* XXX: improve that */
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        pic_update_irq(isa_pic);
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        return intno;
128 3de388f6 bellard
    }
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    /* read the irq from the PIC */
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    if (!apic_accept_pic_intr(env))
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        return -1;
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    intno = pic_read_irq(isa_pic);
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    return intno;
135 3de388f6 bellard
}
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static void pic_irq_request(void *opaque, int irq, int level)
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{
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    CPUState *env = first_cpu;
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    if (env->apic_state) {
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        while (env) {
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            if (apic_accept_pic_intr(env))
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                apic_deliver_pic_intr(env, level);
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            env = env->next_cpu;
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        }
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    } else {
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        if (level)
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            cpu_interrupt(env, CPU_INTERRUPT_HARD);
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        else
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            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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    }
153 3de388f6 bellard
}
154 3de388f6 bellard
155 b0a21b53 bellard
/* PC cmos mappings */
156 b0a21b53 bellard
157 80cabfad bellard
#define REG_EQUIPMENT_BYTE          0x14
158 80cabfad bellard
159 777428f2 bellard
static int cmos_get_fd_drive_type(int fd0)
160 777428f2 bellard
{
161 777428f2 bellard
    int val;
162 777428f2 bellard
163 777428f2 bellard
    switch (fd0) {
164 777428f2 bellard
    case 0:
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        /* 1.44 Mb 3"5 drive */
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        val = 4;
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        break;
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    case 1:
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        /* 2.88 Mb 3"5 drive */
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        val = 5;
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        break;
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    case 2:
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        /* 1.2 Mb 5"5 drive */
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        val = 2;
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        break;
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    default:
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        val = 0;
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        break;
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    }
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    return val;
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}
182 777428f2 bellard
183 5fafdf24 ths
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
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{
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    RTCState *s = rtc_state;
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    int cylinders, heads, sectors;
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    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
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    rtc_set_memory(s, type_ofs, 47);
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    rtc_set_memory(s, info_ofs, cylinders);
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    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 2, heads);
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    rtc_set_memory(s, info_ofs + 3, 0xff);
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    rtc_set_memory(s, info_ofs + 4, 0xff);
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    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
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    rtc_set_memory(s, info_ofs + 6, cylinders);
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    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 8, sectors);
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}
199 ba6c2377 bellard
200 6ac0e82d balrog
/* convert boot_device letter to something recognizable by the bios */
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static int boot_device2nibble(char boot_device)
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{
203 6ac0e82d balrog
    switch(boot_device) {
204 6ac0e82d balrog
    case 'a':
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    case 'b':
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        return 0x01; /* floppy boot */
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    case 'c':
208 6ac0e82d balrog
        return 0x02; /* hard drive boot */
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    case 'd':
210 6ac0e82d balrog
        return 0x03; /* CD-ROM boot */
211 6ac0e82d balrog
    case 'n':
212 6ac0e82d balrog
        return 0x04; /* Network boot */
213 6ac0e82d balrog
    }
214 6ac0e82d balrog
    return 0;
215 6ac0e82d balrog
}
216 6ac0e82d balrog
217 0ecdffbb aurel32
/* copy/pasted from cmos_init, should be made a general function
218 0ecdffbb aurel32
 and used there as well */
219 3b4366de blueswir1
static int pc_boot_set(void *opaque, const char *boot_device)
220 0ecdffbb aurel32
{
221 376253ec aliguori
    Monitor *mon = cur_mon;
222 0ecdffbb aurel32
#define PC_MAX_BOOT_DEVICES 3
223 3b4366de blueswir1
    RTCState *s = (RTCState *)opaque;
224 0ecdffbb aurel32
    int nbds, bds[3] = { 0, };
225 0ecdffbb aurel32
    int i;
226 0ecdffbb aurel32
227 0ecdffbb aurel32
    nbds = strlen(boot_device);
228 0ecdffbb aurel32
    if (nbds > PC_MAX_BOOT_DEVICES) {
229 376253ec aliguori
        monitor_printf(mon, "Too many boot devices for PC\n");
230 0ecdffbb aurel32
        return(1);
231 0ecdffbb aurel32
    }
232 0ecdffbb aurel32
    for (i = 0; i < nbds; i++) {
233 0ecdffbb aurel32
        bds[i] = boot_device2nibble(boot_device[i]);
234 0ecdffbb aurel32
        if (bds[i] == 0) {
235 376253ec aliguori
            monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
236 376253ec aliguori
                           boot_device[i]);
237 0ecdffbb aurel32
            return(1);
238 0ecdffbb aurel32
        }
239 0ecdffbb aurel32
    }
240 0ecdffbb aurel32
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
241 0ecdffbb aurel32
    rtc_set_memory(s, 0x38, (bds[2] << 4));
242 0ecdffbb aurel32
    return(0);
243 0ecdffbb aurel32
}
244 0ecdffbb aurel32
245 ba6c2377 bellard
/* hd_table must contain 4 block drivers */
246 c227f099 Anthony Liguori
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
247 f455e98c Gerd Hoffmann
                      const char *boot_device, DriveInfo **hd_table)
248 80cabfad bellard
{
249 b0a21b53 bellard
    RTCState *s = rtc_state;
250 28c5af54 j_mayer
    int nbds, bds[3] = { 0, };
251 80cabfad bellard
    int val;
252 b41a2cd1 bellard
    int fd0, fd1, nb;
253 ba6c2377 bellard
    int i;
254 b0a21b53 bellard
255 b0a21b53 bellard
    /* various important CMOS locations needed by PC/Bochs bios */
256 80cabfad bellard
257 80cabfad bellard
    /* memory size */
258 333190eb bellard
    val = 640; /* base memory in K */
259 333190eb bellard
    rtc_set_memory(s, 0x15, val);
260 333190eb bellard
    rtc_set_memory(s, 0x16, val >> 8);
261 333190eb bellard
262 80cabfad bellard
    val = (ram_size / 1024) - 1024;
263 80cabfad bellard
    if (val > 65535)
264 80cabfad bellard
        val = 65535;
265 b0a21b53 bellard
    rtc_set_memory(s, 0x17, val);
266 b0a21b53 bellard
    rtc_set_memory(s, 0x18, val >> 8);
267 b0a21b53 bellard
    rtc_set_memory(s, 0x30, val);
268 b0a21b53 bellard
    rtc_set_memory(s, 0x31, val >> 8);
269 80cabfad bellard
270 00f82b8a aurel32
    if (above_4g_mem_size) {
271 00f82b8a aurel32
        rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
272 00f82b8a aurel32
        rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
273 00f82b8a aurel32
        rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
274 00f82b8a aurel32
    }
275 00f82b8a aurel32
276 9da98861 bellard
    if (ram_size > (16 * 1024 * 1024))
277 9da98861 bellard
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
278 9da98861 bellard
    else
279 9da98861 bellard
        val = 0;
280 80cabfad bellard
    if (val > 65535)
281 80cabfad bellard
        val = 65535;
282 b0a21b53 bellard
    rtc_set_memory(s, 0x34, val);
283 b0a21b53 bellard
    rtc_set_memory(s, 0x35, val >> 8);
284 3b46e624 ths
285 298e01b6 aurel32
    /* set the number of CPU */
286 298e01b6 aurel32
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
287 298e01b6 aurel32
288 6ac0e82d balrog
    /* set boot devices, and disable floppy signature check if requested */
289 28c5af54 j_mayer
#define PC_MAX_BOOT_DEVICES 3
290 28c5af54 j_mayer
    nbds = strlen(boot_device);
291 28c5af54 j_mayer
    if (nbds > PC_MAX_BOOT_DEVICES) {
292 28c5af54 j_mayer
        fprintf(stderr, "Too many boot devices for PC\n");
293 28c5af54 j_mayer
        exit(1);
294 28c5af54 j_mayer
    }
295 28c5af54 j_mayer
    for (i = 0; i < nbds; i++) {
296 28c5af54 j_mayer
        bds[i] = boot_device2nibble(boot_device[i]);
297 28c5af54 j_mayer
        if (bds[i] == 0) {
298 28c5af54 j_mayer
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
299 28c5af54 j_mayer
                    boot_device[i]);
300 28c5af54 j_mayer
            exit(1);
301 28c5af54 j_mayer
        }
302 28c5af54 j_mayer
    }
303 28c5af54 j_mayer
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
304 28c5af54 j_mayer
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
305 80cabfad bellard
306 b41a2cd1 bellard
    /* floppy type */
307 b41a2cd1 bellard
308 baca51fa bellard
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
309 baca51fa bellard
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
310 80cabfad bellard
311 777428f2 bellard
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
312 b0a21b53 bellard
    rtc_set_memory(s, 0x10, val);
313 3b46e624 ths
314 b0a21b53 bellard
    val = 0;
315 b41a2cd1 bellard
    nb = 0;
316 80cabfad bellard
    if (fd0 < 3)
317 80cabfad bellard
        nb++;
318 80cabfad bellard
    if (fd1 < 3)
319 80cabfad bellard
        nb++;
320 80cabfad bellard
    switch (nb) {
321 80cabfad bellard
    case 0:
322 80cabfad bellard
        break;
323 80cabfad bellard
    case 1:
324 b0a21b53 bellard
        val |= 0x01; /* 1 drive, ready for boot */
325 80cabfad bellard
        break;
326 80cabfad bellard
    case 2:
327 b0a21b53 bellard
        val |= 0x41; /* 2 drives, ready for boot */
328 80cabfad bellard
        break;
329 80cabfad bellard
    }
330 b0a21b53 bellard
    val |= 0x02; /* FPU is there */
331 b0a21b53 bellard
    val |= 0x04; /* PS/2 mouse installed */
332 b0a21b53 bellard
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
333 b0a21b53 bellard
334 ba6c2377 bellard
    /* hard drives */
335 ba6c2377 bellard
336 ba6c2377 bellard
    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
337 ba6c2377 bellard
    if (hd_table[0])
338 f455e98c Gerd Hoffmann
        cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
339 5fafdf24 ths
    if (hd_table[1])
340 f455e98c Gerd Hoffmann
        cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
341 ba6c2377 bellard
342 ba6c2377 bellard
    val = 0;
343 40b6ecc6 bellard
    for (i = 0; i < 4; i++) {
344 ba6c2377 bellard
        if (hd_table[i]) {
345 46d4767d bellard
            int cylinders, heads, sectors, translation;
346 46d4767d bellard
            /* NOTE: bdrv_get_geometry_hint() returns the physical
347 46d4767d bellard
                geometry.  It is always such that: 1 <= sects <= 63, 1
348 46d4767d bellard
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
349 46d4767d bellard
                geometry can be different if a translation is done. */
350 f455e98c Gerd Hoffmann
            translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
351 46d4767d bellard
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
352 f455e98c Gerd Hoffmann
                bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
353 46d4767d bellard
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
354 46d4767d bellard
                    /* No translation. */
355 46d4767d bellard
                    translation = 0;
356 46d4767d bellard
                } else {
357 46d4767d bellard
                    /* LBA translation. */
358 46d4767d bellard
                    translation = 1;
359 46d4767d bellard
                }
360 40b6ecc6 bellard
            } else {
361 46d4767d bellard
                translation--;
362 ba6c2377 bellard
            }
363 ba6c2377 bellard
            val |= translation << (i * 2);
364 ba6c2377 bellard
        }
365 40b6ecc6 bellard
    }
366 ba6c2377 bellard
    rtc_set_memory(s, 0x39, val);
367 80cabfad bellard
}
368 80cabfad bellard
369 59b8ad81 bellard
void ioport_set_a20(int enable)
370 59b8ad81 bellard
{
371 59b8ad81 bellard
    /* XXX: send to all CPUs ? */
372 59b8ad81 bellard
    cpu_x86_set_a20(first_cpu, enable);
373 59b8ad81 bellard
}
374 59b8ad81 bellard
375 59b8ad81 bellard
int ioport_get_a20(void)
376 59b8ad81 bellard
{
377 59b8ad81 bellard
    return ((first_cpu->a20_mask >> 20) & 1);
378 59b8ad81 bellard
}
379 59b8ad81 bellard
380 e1a23744 bellard
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
381 e1a23744 bellard
{
382 59b8ad81 bellard
    ioport_set_a20((val >> 1) & 1);
383 e1a23744 bellard
    /* XXX: bit 0 is fast reset */
384 e1a23744 bellard
}
385 e1a23744 bellard
386 e1a23744 bellard
static uint32_t ioport92_read(void *opaque, uint32_t addr)
387 e1a23744 bellard
{
388 59b8ad81 bellard
    return ioport_get_a20() << 1;
389 e1a23744 bellard
}
390 e1a23744 bellard
391 80cabfad bellard
/***********************************************************/
392 80cabfad bellard
/* Bochs BIOS debug ports */
393 80cabfad bellard
394 9596ebb7 pbrook
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
395 80cabfad bellard
{
396 a2f659ee bellard
    static const char shutdown_str[8] = "Shutdown";
397 a2f659ee bellard
    static int shutdown_index = 0;
398 3b46e624 ths
399 80cabfad bellard
    switch(addr) {
400 80cabfad bellard
        /* Bochs BIOS messages */
401 80cabfad bellard
    case 0x400:
402 80cabfad bellard
    case 0x401:
403 80cabfad bellard
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
404 80cabfad bellard
        exit(1);
405 80cabfad bellard
    case 0x402:
406 80cabfad bellard
    case 0x403:
407 80cabfad bellard
#ifdef DEBUG_BIOS
408 80cabfad bellard
        fprintf(stderr, "%c", val);
409 80cabfad bellard
#endif
410 80cabfad bellard
        break;
411 a2f659ee bellard
    case 0x8900:
412 a2f659ee bellard
        /* same as Bochs power off */
413 a2f659ee bellard
        if (val == shutdown_str[shutdown_index]) {
414 a2f659ee bellard
            shutdown_index++;
415 a2f659ee bellard
            if (shutdown_index == 8) {
416 a2f659ee bellard
                shutdown_index = 0;
417 a2f659ee bellard
                qemu_system_shutdown_request();
418 a2f659ee bellard
            }
419 a2f659ee bellard
        } else {
420 a2f659ee bellard
            shutdown_index = 0;
421 a2f659ee bellard
        }
422 a2f659ee bellard
        break;
423 80cabfad bellard
424 80cabfad bellard
        /* LGPL'ed VGA BIOS messages */
425 80cabfad bellard
    case 0x501:
426 80cabfad bellard
    case 0x502:
427 80cabfad bellard
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
428 80cabfad bellard
        exit(1);
429 80cabfad bellard
    case 0x500:
430 80cabfad bellard
    case 0x503:
431 80cabfad bellard
#ifdef DEBUG_BIOS
432 80cabfad bellard
        fprintf(stderr, "%c", val);
433 80cabfad bellard
#endif
434 80cabfad bellard
        break;
435 80cabfad bellard
    }
436 80cabfad bellard
}
437 80cabfad bellard
438 bf483392 Alexander Graf
static void *bochs_bios_init(void)
439 80cabfad bellard
{
440 3cce6243 blueswir1
    void *fw_cfg;
441 b6f6e3d3 aliguori
    uint8_t *smbios_table;
442 b6f6e3d3 aliguori
    size_t smbios_len;
443 11c2fd3e aliguori
    uint64_t *numa_fw_cfg;
444 11c2fd3e aliguori
    int i, j;
445 3cce6243 blueswir1
446 b41a2cd1 bellard
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
447 b41a2cd1 bellard
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
448 b41a2cd1 bellard
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
449 b41a2cd1 bellard
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
450 a2f659ee bellard
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
451 b41a2cd1 bellard
452 b41a2cd1 bellard
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
453 b41a2cd1 bellard
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
454 b41a2cd1 bellard
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
455 b41a2cd1 bellard
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
456 3cce6243 blueswir1
457 3cce6243 blueswir1
    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
458 bf483392 Alexander Graf
459 3cce6243 blueswir1
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
460 905fdcb5 blueswir1
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
461 80deece2 blueswir1
    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
462 80deece2 blueswir1
                     acpi_tables_len);
463 6b35e7bf Jes Sorensen
    fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
464 b6f6e3d3 aliguori
465 b6f6e3d3 aliguori
    smbios_table = smbios_get_table(&smbios_len);
466 b6f6e3d3 aliguori
    if (smbios_table)
467 b6f6e3d3 aliguori
        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
468 b6f6e3d3 aliguori
                         smbios_table, smbios_len);
469 11c2fd3e aliguori
470 11c2fd3e aliguori
    /* allocate memory for the NUMA channel: one (64bit) word for the number
471 11c2fd3e aliguori
     * of nodes, one word for each VCPU->node and one word for each node to
472 11c2fd3e aliguori
     * hold the amount of memory.
473 11c2fd3e aliguori
     */
474 11c2fd3e aliguori
    numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
475 11c2fd3e aliguori
    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
476 11c2fd3e aliguori
    for (i = 0; i < smp_cpus; i++) {
477 11c2fd3e aliguori
        for (j = 0; j < nb_numa_nodes; j++) {
478 11c2fd3e aliguori
            if (node_cpumask[j] & (1 << i)) {
479 11c2fd3e aliguori
                numa_fw_cfg[i + 1] = cpu_to_le64(j);
480 11c2fd3e aliguori
                break;
481 11c2fd3e aliguori
            }
482 11c2fd3e aliguori
        }
483 11c2fd3e aliguori
    }
484 11c2fd3e aliguori
    for (i = 0; i < nb_numa_nodes; i++) {
485 11c2fd3e aliguori
        numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
486 11c2fd3e aliguori
    }
487 11c2fd3e aliguori
    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
488 11c2fd3e aliguori
                     (1 + smp_cpus + nb_numa_nodes) * 8);
489 bf483392 Alexander Graf
490 bf483392 Alexander Graf
    return fw_cfg;
491 80cabfad bellard
}
492 80cabfad bellard
493 642a4f96 ths
static long get_file_size(FILE *f)
494 642a4f96 ths
{
495 642a4f96 ths
    long where, size;
496 642a4f96 ths
497 642a4f96 ths
    /* XXX: on Unix systems, using fstat() probably makes more sense */
498 642a4f96 ths
499 642a4f96 ths
    where = ftell(f);
500 642a4f96 ths
    fseek(f, 0, SEEK_END);
501 642a4f96 ths
    size = ftell(f);
502 642a4f96 ths
    fseek(f, where, SEEK_SET);
503 642a4f96 ths
504 642a4f96 ths
    return size;
505 642a4f96 ths
}
506 642a4f96 ths
507 f16408df Alexander Graf
static void load_linux(void *fw_cfg,
508 4fc9af53 aliguori
                       const char *kernel_filename,
509 642a4f96 ths
                       const char *initrd_filename,
510 e6ade764 Glauber Costa
                       const char *kernel_cmdline,
511 45a50b16 Gerd Hoffmann
                       target_phys_addr_t max_ram_size)
512 642a4f96 ths
{
513 642a4f96 ths
    uint16_t protocol;
514 5cea8590 Paul Brook
    int setup_size, kernel_size, initrd_size = 0, cmdline_size;
515 642a4f96 ths
    uint32_t initrd_max;
516 57a46d05 Alexander Graf
    uint8_t header[8192], *setup, *kernel, *initrd_data;
517 c227f099 Anthony Liguori
    target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
518 45a50b16 Gerd Hoffmann
    FILE *f;
519 bf4e5d92 Pascal Terjan
    char *vmode;
520 642a4f96 ths
521 642a4f96 ths
    /* Align to 16 bytes as a paranoia measure */
522 642a4f96 ths
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
523 642a4f96 ths
524 642a4f96 ths
    /* load the kernel header */
525 642a4f96 ths
    f = fopen(kernel_filename, "rb");
526 642a4f96 ths
    if (!f || !(kernel_size = get_file_size(f)) ||
527 f16408df Alexander Graf
        fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
528 f16408df Alexander Graf
        MIN(ARRAY_SIZE(header), kernel_size)) {
529 850810d0 Justin M. Forbes
        fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
530 850810d0 Justin M. Forbes
                kernel_filename, strerror(errno));
531 642a4f96 ths
        exit(1);
532 642a4f96 ths
    }
533 642a4f96 ths
534 642a4f96 ths
    /* kernel protocol version */
535 bc4edd79 bellard
#if 0
536 642a4f96 ths
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
537 bc4edd79 bellard
#endif
538 642a4f96 ths
    if (ldl_p(header+0x202) == 0x53726448)
539 642a4f96 ths
        protocol = lduw_p(header+0x206);
540 f16408df Alexander Graf
    else {
541 f16408df Alexander Graf
        /* This looks like a multiboot kernel. If it is, let's stop
542 f16408df Alexander Graf
           treating it like a Linux kernel. */
543 52001445 Adam Lackorzynski
        if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
544 52001445 Adam Lackorzynski
                           kernel_cmdline, kernel_size, header))
545 82663ee2 Blue Swirl
            return;
546 642a4f96 ths
        protocol = 0;
547 f16408df Alexander Graf
    }
548 642a4f96 ths
549 642a4f96 ths
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
550 642a4f96 ths
        /* Low kernel */
551 a37af289 blueswir1
        real_addr    = 0x90000;
552 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
553 a37af289 blueswir1
        prot_addr    = 0x10000;
554 642a4f96 ths
    } else if (protocol < 0x202) {
555 642a4f96 ths
        /* High but ancient kernel */
556 a37af289 blueswir1
        real_addr    = 0x90000;
557 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
558 a37af289 blueswir1
        prot_addr    = 0x100000;
559 642a4f96 ths
    } else {
560 642a4f96 ths
        /* High and recent kernel */
561 a37af289 blueswir1
        real_addr    = 0x10000;
562 a37af289 blueswir1
        cmdline_addr = 0x20000;
563 a37af289 blueswir1
        prot_addr    = 0x100000;
564 642a4f96 ths
    }
565 642a4f96 ths
566 bc4edd79 bellard
#if 0
567 642a4f96 ths
    fprintf(stderr,
568 526ccb7a balrog
            "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
569 526ccb7a balrog
            "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
570 526ccb7a balrog
            "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
571 a37af289 blueswir1
            real_addr,
572 a37af289 blueswir1
            cmdline_addr,
573 a37af289 blueswir1
            prot_addr);
574 bc4edd79 bellard
#endif
575 642a4f96 ths
576 642a4f96 ths
    /* highest address for loading the initrd */
577 642a4f96 ths
    if (protocol >= 0x203)
578 642a4f96 ths
        initrd_max = ldl_p(header+0x22c);
579 642a4f96 ths
    else
580 642a4f96 ths
        initrd_max = 0x37ffffff;
581 642a4f96 ths
582 e6ade764 Glauber Costa
    if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
583 e6ade764 Glauber Costa
            initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
584 642a4f96 ths
585 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
586 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
587 57a46d05 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
588 57a46d05 Alexander Graf
                     (uint8_t*)strdup(kernel_cmdline),
589 57a46d05 Alexander Graf
                     strlen(kernel_cmdline)+1);
590 642a4f96 ths
591 642a4f96 ths
    if (protocol >= 0x202) {
592 a37af289 blueswir1
        stl_p(header+0x228, cmdline_addr);
593 642a4f96 ths
    } else {
594 642a4f96 ths
        stw_p(header+0x20, 0xA33F);
595 642a4f96 ths
        stw_p(header+0x22, cmdline_addr-real_addr);
596 642a4f96 ths
    }
597 642a4f96 ths
598 bf4e5d92 Pascal Terjan
    /* handle vga= parameter */
599 bf4e5d92 Pascal Terjan
    vmode = strstr(kernel_cmdline, "vga=");
600 bf4e5d92 Pascal Terjan
    if (vmode) {
601 bf4e5d92 Pascal Terjan
        unsigned int video_mode;
602 bf4e5d92 Pascal Terjan
        /* skip "vga=" */
603 bf4e5d92 Pascal Terjan
        vmode += 4;
604 bf4e5d92 Pascal Terjan
        if (!strncmp(vmode, "normal", 6)) {
605 bf4e5d92 Pascal Terjan
            video_mode = 0xffff;
606 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ext", 3)) {
607 bf4e5d92 Pascal Terjan
            video_mode = 0xfffe;
608 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ask", 3)) {
609 bf4e5d92 Pascal Terjan
            video_mode = 0xfffd;
610 bf4e5d92 Pascal Terjan
        } else {
611 bf4e5d92 Pascal Terjan
            video_mode = strtol(vmode, NULL, 0);
612 bf4e5d92 Pascal Terjan
        }
613 bf4e5d92 Pascal Terjan
        stw_p(header+0x1fa, video_mode);
614 bf4e5d92 Pascal Terjan
    }
615 bf4e5d92 Pascal Terjan
616 642a4f96 ths
    /* loader type */
617 642a4f96 ths
    /* High nybble = B reserved for Qemu; low nybble is revision number.
618 642a4f96 ths
       If this code is substantially changed, you may want to consider
619 642a4f96 ths
       incrementing the revision. */
620 642a4f96 ths
    if (protocol >= 0x200)
621 642a4f96 ths
        header[0x210] = 0xB0;
622 642a4f96 ths
623 642a4f96 ths
    /* heap */
624 642a4f96 ths
    if (protocol >= 0x201) {
625 642a4f96 ths
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
626 642a4f96 ths
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
627 642a4f96 ths
    }
628 642a4f96 ths
629 642a4f96 ths
    /* load initrd */
630 642a4f96 ths
    if (initrd_filename) {
631 642a4f96 ths
        if (protocol < 0x200) {
632 642a4f96 ths
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
633 642a4f96 ths
            exit(1);
634 642a4f96 ths
        }
635 642a4f96 ths
636 45a50b16 Gerd Hoffmann
        initrd_size = get_image_size(initrd_filename);
637 45a50b16 Gerd Hoffmann
        initrd_addr = (initrd_max-initrd_size) & ~4095;
638 57a46d05 Alexander Graf
639 57a46d05 Alexander Graf
        initrd_data = qemu_malloc(initrd_size);
640 57a46d05 Alexander Graf
        load_image(initrd_filename, initrd_data);
641 57a46d05 Alexander Graf
642 57a46d05 Alexander Graf
        fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
643 57a46d05 Alexander Graf
        fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
644 57a46d05 Alexander Graf
        fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
645 642a4f96 ths
646 a37af289 blueswir1
        stl_p(header+0x218, initrd_addr);
647 642a4f96 ths
        stl_p(header+0x21c, initrd_size);
648 642a4f96 ths
    }
649 642a4f96 ths
650 45a50b16 Gerd Hoffmann
    /* load kernel and setup */
651 642a4f96 ths
    setup_size = header[0x1f1];
652 642a4f96 ths
    if (setup_size == 0)
653 642a4f96 ths
        setup_size = 4;
654 642a4f96 ths
    setup_size = (setup_size+1)*512;
655 45a50b16 Gerd Hoffmann
    kernel_size -= setup_size;
656 642a4f96 ths
657 45a50b16 Gerd Hoffmann
    setup  = qemu_malloc(setup_size);
658 45a50b16 Gerd Hoffmann
    kernel = qemu_malloc(kernel_size);
659 45a50b16 Gerd Hoffmann
    fseek(f, 0, SEEK_SET);
660 5a41ecc5 Kirill A. Shutemov
    if (fread(setup, 1, setup_size, f) != setup_size) {
661 5a41ecc5 Kirill A. Shutemov
        fprintf(stderr, "fread() failed\n");
662 5a41ecc5 Kirill A. Shutemov
        exit(1);
663 5a41ecc5 Kirill A. Shutemov
    }
664 5a41ecc5 Kirill A. Shutemov
    if (fread(kernel, 1, kernel_size, f) != kernel_size) {
665 5a41ecc5 Kirill A. Shutemov
        fprintf(stderr, "fread() failed\n");
666 5a41ecc5 Kirill A. Shutemov
        exit(1);
667 5a41ecc5 Kirill A. Shutemov
    }
668 642a4f96 ths
    fclose(f);
669 45a50b16 Gerd Hoffmann
    memcpy(setup, header, MIN(sizeof(header), setup_size));
670 57a46d05 Alexander Graf
671 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
672 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
673 57a46d05 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
674 57a46d05 Alexander Graf
675 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
676 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
677 57a46d05 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
678 57a46d05 Alexander Graf
679 57a46d05 Alexander Graf
    option_rom[nb_option_roms] = "linuxboot.bin";
680 57a46d05 Alexander Graf
    nb_option_roms++;
681 642a4f96 ths
}
682 642a4f96 ths
683 b41a2cd1 bellard
static const int ide_iobase[2] = { 0x1f0, 0x170 };
684 b41a2cd1 bellard
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
685 b41a2cd1 bellard
static const int ide_irq[2] = { 14, 15 };
686 b41a2cd1 bellard
687 b41a2cd1 bellard
#define NE2000_NB_MAX 6
688 b41a2cd1 bellard
689 675d6f82 Blue Swirl
static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
690 675d6f82 Blue Swirl
                                              0x280, 0x380 };
691 675d6f82 Blue Swirl
static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
692 b41a2cd1 bellard
693 675d6f82 Blue Swirl
static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
694 675d6f82 Blue Swirl
static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
695 6508fe59 bellard
696 6a36d84e bellard
#ifdef HAS_AUDIO
697 d537cf6c pbrook
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
698 6a36d84e bellard
{
699 6a36d84e bellard
    struct soundhw *c;
700 6a36d84e bellard
701 3a8bae3e malc
    for (c = soundhw; c->name; ++c) {
702 3a8bae3e malc
        if (c->enabled) {
703 3a8bae3e malc
            if (c->isa) {
704 3a8bae3e malc
                c->init.init_isa(pic);
705 3a8bae3e malc
            } else {
706 3a8bae3e malc
                if (pci_bus) {
707 3a8bae3e malc
                    c->init.init_pci(pci_bus);
708 6a36d84e bellard
                }
709 6a36d84e bellard
            }
710 6a36d84e bellard
        }
711 6a36d84e bellard
    }
712 6a36d84e bellard
}
713 6a36d84e bellard
#endif
714 6a36d84e bellard
715 3a38d437 Jes Sorensen
static void pc_init_ne2k_isa(NICInfo *nd)
716 a41b2ff2 pbrook
{
717 a41b2ff2 pbrook
    static int nb_ne2k = 0;
718 a41b2ff2 pbrook
719 a41b2ff2 pbrook
    if (nb_ne2k == NE2000_NB_MAX)
720 a41b2ff2 pbrook
        return;
721 3a38d437 Jes Sorensen
    isa_ne2000_init(ne2000_io[nb_ne2k],
722 9453c5bc Gerd Hoffmann
                    ne2000_irq[nb_ne2k], nd);
723 a41b2ff2 pbrook
    nb_ne2k++;
724 a41b2ff2 pbrook
}
725 a41b2ff2 pbrook
726 678e12cc Gleb Natapov
int cpu_is_bsp(CPUState *env)
727 678e12cc Gleb Natapov
{
728 82663ee2 Blue Swirl
    return env->cpuid_apic_id == 0;
729 678e12cc Gleb Natapov
}
730 678e12cc Gleb Natapov
731 3a31f36a Jan Kiszka
static CPUState *pc_new_cpu(const char *cpu_model)
732 3a31f36a Jan Kiszka
{
733 3a31f36a Jan Kiszka
    CPUState *env;
734 3a31f36a Jan Kiszka
735 3a31f36a Jan Kiszka
    env = cpu_init(cpu_model);
736 3a31f36a Jan Kiszka
    if (!env) {
737 3a31f36a Jan Kiszka
        fprintf(stderr, "Unable to find x86 CPU definition\n");
738 3a31f36a Jan Kiszka
        exit(1);
739 3a31f36a Jan Kiszka
    }
740 3a31f36a Jan Kiszka
    if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
741 3a31f36a Jan Kiszka
        env->cpuid_apic_id = env->cpu_index;
742 3a31f36a Jan Kiszka
        /* APIC reset callback resets cpu */
743 3a31f36a Jan Kiszka
        apic_init(env);
744 3a31f36a Jan Kiszka
    } else {
745 3a31f36a Jan Kiszka
        qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
746 3a31f36a Jan Kiszka
    }
747 3a31f36a Jan Kiszka
    return env;
748 3a31f36a Jan Kiszka
}
749 3a31f36a Jan Kiszka
750 80cabfad bellard
/* PC hardware initialisation */
751 c227f099 Anthony Liguori
static void pc_init1(ram_addr_t ram_size,
752 3023f332 aliguori
                     const char *boot_device,
753 e8b2a1c6 Mark McLoughlin
                     const char *kernel_filename,
754 e8b2a1c6 Mark McLoughlin
                     const char *kernel_cmdline,
755 3dbbdc25 bellard
                     const char *initrd_filename,
756 e8b2a1c6 Mark McLoughlin
                     const char *cpu_model,
757 caea79a9 Mark McLoughlin
                     int pci_enabled)
758 80cabfad bellard
{
759 5cea8590 Paul Brook
    char *filename;
760 642a4f96 ths
    int ret, linux_boot, i;
761 c227f099 Anthony Liguori
    ram_addr_t ram_addr, bios_offset, option_rom_offset;
762 c227f099 Anthony Liguori
    ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
763 45a50b16 Gerd Hoffmann
    int bios_size, isa_bios_size;
764 46e50e9d bellard
    PCIBus *pci_bus;
765 b3999638 Gerd Hoffmann
    ISADevice *isa_dev;
766 5c3ff3a7 pbrook
    int piix3_devfn = -1;
767 59b8ad81 bellard
    CPUState *env;
768 d537cf6c pbrook
    qemu_irq *cpu_irq;
769 1452411b Avi Kivity
    qemu_irq *isa_irq;
770 d537cf6c pbrook
    qemu_irq *i8259;
771 1452411b Avi Kivity
    IsaIrqState *isa_irq_state;
772 f455e98c Gerd Hoffmann
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
773 fd8014e1 Gerd Hoffmann
    DriveInfo *fd[MAX_FD];
774 bf483392 Alexander Graf
    void *fw_cfg;
775 d592d303 bellard
776 00f82b8a aurel32
    if (ram_size >= 0xe0000000 ) {
777 00f82b8a aurel32
        above_4g_mem_size = ram_size - 0xe0000000;
778 00f82b8a aurel32
        below_4g_mem_size = 0xe0000000;
779 00f82b8a aurel32
    } else {
780 00f82b8a aurel32
        below_4g_mem_size = ram_size;
781 00f82b8a aurel32
    }
782 00f82b8a aurel32
783 80cabfad bellard
    linux_boot = (kernel_filename != NULL);
784 80cabfad bellard
785 59b8ad81 bellard
    /* init CPUs */
786 a049de61 bellard
    if (cpu_model == NULL) {
787 a049de61 bellard
#ifdef TARGET_X86_64
788 a049de61 bellard
        cpu_model = "qemu64";
789 a049de61 bellard
#else
790 a049de61 bellard
        cpu_model = "qemu32";
791 a049de61 bellard
#endif
792 a049de61 bellard
    }
793 3a31f36a Jan Kiszka
794 3a31f36a Jan Kiszka
    for (i = 0; i < smp_cpus; i++) {
795 3a31f36a Jan Kiszka
        env = pc_new_cpu(cpu_model);
796 59b8ad81 bellard
    }
797 59b8ad81 bellard
798 26fb5e48 aurel32
    vmport_init();
799 26fb5e48 aurel32
800 80cabfad bellard
    /* allocate RAM */
801 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0xa0000);
802 82b36dc3 aliguori
    cpu_register_physical_memory(0, 0xa0000, ram_addr);
803 82b36dc3 aliguori
804 82b36dc3 aliguori
    /* Allocate, even though we won't register, so we don't break the
805 82b36dc3 aliguori
     * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
806 82b36dc3 aliguori
     * and some bios areas, which will be registered later
807 82b36dc3 aliguori
     */
808 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
809 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
810 82b36dc3 aliguori
    cpu_register_physical_memory(0x100000,
811 82b36dc3 aliguori
                 below_4g_mem_size - 0x100000,
812 82b36dc3 aliguori
                 ram_addr);
813 00f82b8a aurel32
814 00f82b8a aurel32
    /* above 4giga memory allocation */
815 00f82b8a aurel32
    if (above_4g_mem_size > 0) {
816 8a637d44 Paul Brook
#if TARGET_PHYS_ADDR_BITS == 32
817 8a637d44 Paul Brook
        hw_error("To much RAM for 32-bit physical address");
818 8a637d44 Paul Brook
#else
819 82b36dc3 aliguori
        ram_addr = qemu_ram_alloc(above_4g_mem_size);
820 82b36dc3 aliguori
        cpu_register_physical_memory(0x100000000ULL,
821 526ccb7a balrog
                                     above_4g_mem_size,
822 82b36dc3 aliguori
                                     ram_addr);
823 8a637d44 Paul Brook
#endif
824 00f82b8a aurel32
    }
825 80cabfad bellard
826 82b36dc3 aliguori
827 970ac5a3 bellard
    /* BIOS load */
828 1192dad8 j_mayer
    if (bios_name == NULL)
829 1192dad8 j_mayer
        bios_name = BIOS_FILENAME;
830 5cea8590 Paul Brook
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
831 5cea8590 Paul Brook
    if (filename) {
832 5cea8590 Paul Brook
        bios_size = get_image_size(filename);
833 5cea8590 Paul Brook
    } else {
834 5cea8590 Paul Brook
        bios_size = -1;
835 5cea8590 Paul Brook
    }
836 5fafdf24 ths
    if (bios_size <= 0 ||
837 970ac5a3 bellard
        (bios_size % 65536) != 0) {
838 7587cf44 bellard
        goto bios_error;
839 7587cf44 bellard
    }
840 970ac5a3 bellard
    bios_offset = qemu_ram_alloc(bios_size);
841 51edd4e6 Gerd Hoffmann
    ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
842 51edd4e6 Gerd Hoffmann
    if (ret != 0) {
843 7587cf44 bellard
    bios_error:
844 5cea8590 Paul Brook
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
845 80cabfad bellard
        exit(1);
846 80cabfad bellard
    }
847 5cea8590 Paul Brook
    if (filename) {
848 5cea8590 Paul Brook
        qemu_free(filename);
849 5cea8590 Paul Brook
    }
850 7587cf44 bellard
    /* map the last 128KB of the BIOS in ISA space */
851 7587cf44 bellard
    isa_bios_size = bios_size;
852 7587cf44 bellard
    if (isa_bios_size > (128 * 1024))
853 7587cf44 bellard
        isa_bios_size = 128 * 1024;
854 5fafdf24 ths
    cpu_register_physical_memory(0x100000 - isa_bios_size,
855 5fafdf24 ths
                                 isa_bios_size,
856 7587cf44 bellard
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
857 9ae02555 ths
858 4fc9af53 aliguori
859 f753ff16 pbrook
860 de2aff17 Gerd Hoffmann
    rom_enable_driver_roms = 1;
861 45a50b16 Gerd Hoffmann
    option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
862 45a50b16 Gerd Hoffmann
    cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
863 f753ff16 pbrook
864 1d108d97 Alexander Graf
    /* map all the bios at the top of memory */
865 1d108d97 Alexander Graf
    cpu_register_physical_memory((uint32_t)(-bios_size),
866 1d108d97 Alexander Graf
                                 bios_size, bios_offset | IO_MEM_ROM);
867 1d108d97 Alexander Graf
868 bf483392 Alexander Graf
    fw_cfg = bochs_bios_init();
869 8832cb80 Gerd Hoffmann
    rom_set_fw(fw_cfg);
870 1d108d97 Alexander Graf
871 f753ff16 pbrook
    if (linux_boot) {
872 45a50b16 Gerd Hoffmann
        load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
873 f753ff16 pbrook
    }
874 f753ff16 pbrook
875 f753ff16 pbrook
    for (i = 0; i < nb_option_roms; i++) {
876 45a50b16 Gerd Hoffmann
        rom_add_option(option_rom[i]);
877 406c8df3 Glauber Costa
    }
878 406c8df3 Glauber Costa
879 a5b38b51 aurel32
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
880 d537cf6c pbrook
    i8259 = i8259_init(cpu_irq[0]);
881 1452411b Avi Kivity
    isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
882 1452411b Avi Kivity
    isa_irq_state->i8259 = i8259;
883 1632dc6a Avi Kivity
    isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
884 d537cf6c pbrook
885 69b91039 bellard
    if (pci_enabled) {
886 85a750ca Juan Quintela
        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
887 46e50e9d bellard
    } else {
888 46e50e9d bellard
        pci_bus = NULL;
889 2091ba23 Gerd Hoffmann
        isa_bus_new(NULL);
890 69b91039 bellard
    }
891 2091ba23 Gerd Hoffmann
    isa_bus_irqs(isa_irq);
892 69b91039 bellard
893 3a38d437 Jes Sorensen
    ferr_irq = isa_reserve_irq(13);
894 3a38d437 Jes Sorensen
895 80cabfad bellard
    /* init basic PC hardware */
896 b41a2cd1 bellard
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
897 80cabfad bellard
898 f929aad6 bellard
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
899 f929aad6 bellard
900 1f04275e bellard
    if (cirrus_vga_enabled) {
901 1f04275e bellard
        if (pci_enabled) {
902 fbe1b595 Paul Brook
            pci_cirrus_vga_init(pci_bus);
903 1f04275e bellard
        } else {
904 fbe1b595 Paul Brook
            isa_cirrus_vga_init();
905 1f04275e bellard
        }
906 d34cab9f ths
    } else if (vmsvga_enabled) {
907 d34cab9f ths
        if (pci_enabled)
908 fbe1b595 Paul Brook
            pci_vmsvga_init(pci_bus);
909 d34cab9f ths
        else
910 d34cab9f ths
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
911 c2b3b41a aliguori
    } else if (std_vga_enabled) {
912 89b6b508 bellard
        if (pci_enabled) {
913 fbe1b595 Paul Brook
            pci_vga_init(pci_bus, 0, 0);
914 89b6b508 bellard
        } else {
915 fbe1b595 Paul Brook
            isa_vga_init();
916 89b6b508 bellard
        }
917 1f04275e bellard
    }
918 80cabfad bellard
919 32e0c826 Gerd Hoffmann
    rtc_state = rtc_init(2000);
920 80cabfad bellard
921 3b4366de blueswir1
    qemu_register_boot_set(pc_boot_set, rtc_state);
922 3b4366de blueswir1
923 e1a23744 bellard
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
924 e1a23744 bellard
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
925 e1a23744 bellard
926 d592d303 bellard
    if (pci_enabled) {
927 1632dc6a Avi Kivity
        isa_irq_state->ioapic = ioapic_init();
928 d592d303 bellard
    }
929 3a38d437 Jes Sorensen
    pit = pit_init(0x40, isa_reserve_irq(0));
930 fd06c375 bellard
    pcspk_init(pit);
931 16b29ae1 aliguori
    if (!no_hpet) {
932 1452411b Avi Kivity
        hpet_init(isa_irq);
933 16b29ae1 aliguori
    }
934 b41a2cd1 bellard
935 8d11df9e bellard
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
936 8d11df9e bellard
        if (serial_hds[i]) {
937 ac0be998 Gerd Hoffmann
            serial_isa_init(i, serial_hds[i]);
938 8d11df9e bellard
        }
939 8d11df9e bellard
    }
940 b41a2cd1 bellard
941 6508fe59 bellard
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
942 6508fe59 bellard
        if (parallel_hds[i]) {
943 021f0674 Gerd Hoffmann
            parallel_init(i, parallel_hds[i]);
944 6508fe59 bellard
        }
945 6508fe59 bellard
    }
946 6508fe59 bellard
947 a41b2ff2 pbrook
    for(i = 0; i < nb_nics; i++) {
948 cb457d76 aliguori
        NICInfo *nd = &nd_table[i];
949 cb457d76 aliguori
950 cb457d76 aliguori
        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
951 3a38d437 Jes Sorensen
            pc_init_ne2k_isa(nd);
952 cb457d76 aliguori
        else
953 07caea31 Markus Armbruster
            pci_nic_init_nofail(nd, "e1000", NULL);
954 a41b2ff2 pbrook
    }
955 b41a2cd1 bellard
956 e4bcb14c ths
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
957 e4bcb14c ths
        fprintf(stderr, "qemu: too many IDE bus\n");
958 e4bcb14c ths
        exit(1);
959 e4bcb14c ths
    }
960 e4bcb14c ths
961 e4bcb14c ths
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
962 f455e98c Gerd Hoffmann
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
963 e4bcb14c ths
    }
964 e4bcb14c ths
965 a41b2ff2 pbrook
    if (pci_enabled) {
966 ae027ad3 Stefan Weil
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
967 a41b2ff2 pbrook
    } else {
968 e4bcb14c ths
        for(i = 0; i < MAX_IDE_BUS; i++) {
969 dea21e97 Gerd Hoffmann
            isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
970 e4bcb14c ths
                         hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
971 69b91039 bellard
        }
972 b41a2cd1 bellard
    }
973 69b91039 bellard
974 2e15e23b Gerd Hoffmann
    isa_dev = isa_create_simple("i8042");
975 7c29d0c0 bellard
    DMA_init(0);
976 6a36d84e bellard
#ifdef HAS_AUDIO
977 1452411b Avi Kivity
    audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
978 fb065187 bellard
#endif
979 80cabfad bellard
980 e4bcb14c ths
    for(i = 0; i < MAX_FD; i++) {
981 fd8014e1 Gerd Hoffmann
        fd[i] = drive_get(IF_FLOPPY, 0, i);
982 e4bcb14c ths
    }
983 86c86157 Gerd Hoffmann
    floppy_controller = fdctrl_init_isa(fd);
984 b41a2cd1 bellard
985 00f82b8a aurel32
    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
986 69b91039 bellard
987 bb36d470 bellard
    if (pci_enabled && usb_enabled) {
988 afcc3cdf ths
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
989 bb36d470 bellard
    }
990 bb36d470 bellard
991 6515b203 bellard
    if (pci_enabled && acpi_enabled) {
992 3fffc223 ths
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
993 0ff596d0 pbrook
        i2c_bus *smbus;
994 0ff596d0 pbrook
995 0ff596d0 pbrook
        /* TODO: Populate SPD eeprom data.  */
996 3a38d437 Jes Sorensen
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
997 3a38d437 Jes Sorensen
                              isa_reserve_irq(9));
998 3fffc223 ths
        for (i = 0; i < 8; i++) {
999 1ea96673 Paul Brook
            DeviceState *eeprom;
1000 02e2da45 Paul Brook
            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1001 5b7f5327 Juan Quintela
            qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1002 ee6847d1 Gerd Hoffmann
            qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1003 e23a1b33 Markus Armbruster
            qdev_init_nofail(eeprom);
1004 3fffc223 ths
        }
1005 3f84865a Gerd Hoffmann
        piix4_acpi_system_hot_add_init(pci_bus);
1006 6515b203 bellard
    }
1007 3b46e624 ths
1008 a5954d5c bellard
    if (i440fx_state) {
1009 a5954d5c bellard
        i440fx_init_memory_mappings(i440fx_state);
1010 a5954d5c bellard
    }
1011 e4bcb14c ths
1012 7d8406be pbrook
    if (pci_enabled) {
1013 e4bcb14c ths
        int max_bus;
1014 9be5dafe Paul Brook
        int bus;
1015 96d30e48 ths
1016 e4bcb14c ths
        max_bus = drive_get_max_bus(IF_SCSI);
1017 e4bcb14c ths
        for (bus = 0; bus <= max_bus; bus++) {
1018 9be5dafe Paul Brook
            pci_create_simple(pci_bus, -1, "lsi53c895a");
1019 e4bcb14c ths
        }
1020 7d8406be pbrook
    }
1021 80cabfad bellard
}
1022 b5ff2d6e bellard
1023 c227f099 Anthony Liguori
static void pc_init_pci(ram_addr_t ram_size,
1024 3023f332 aliguori
                        const char *boot_device,
1025 5fafdf24 ths
                        const char *kernel_filename,
1026 3dbbdc25 bellard
                        const char *kernel_cmdline,
1027 94fc95cd j_mayer
                        const char *initrd_filename,
1028 94fc95cd j_mayer
                        const char *cpu_model)
1029 3dbbdc25 bellard
{
1030 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1031 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1032 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 1);
1033 3dbbdc25 bellard
}
1034 3dbbdc25 bellard
1035 c227f099 Anthony Liguori
static void pc_init_isa(ram_addr_t ram_size,
1036 3023f332 aliguori
                        const char *boot_device,
1037 5fafdf24 ths
                        const char *kernel_filename,
1038 3dbbdc25 bellard
                        const char *kernel_cmdline,
1039 94fc95cd j_mayer
                        const char *initrd_filename,
1040 94fc95cd j_mayer
                        const char *cpu_model)
1041 3dbbdc25 bellard
{
1042 679a37af Gerd Hoffmann
    if (cpu_model == NULL)
1043 679a37af Gerd Hoffmann
        cpu_model = "486";
1044 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1045 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1046 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 0);
1047 3dbbdc25 bellard
}
1048 3dbbdc25 bellard
1049 0bacd130 aliguori
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1050 0bacd130 aliguori
   BIOS will read it and start S3 resume at POST Entry */
1051 0bacd130 aliguori
void cmos_set_s3_resume(void)
1052 0bacd130 aliguori
{
1053 0bacd130 aliguori
    if (rtc_state)
1054 0bacd130 aliguori
        rtc_set_memory(rtc_state, 0xF, 0xFE);
1055 0bacd130 aliguori
}
1056 0bacd130 aliguori
1057 f80f9ec9 Anthony Liguori
static QEMUMachine pc_machine = {
1058 2cae6f5e Gerd Hoffmann
    .name = "pc-0.12",
1059 95747581 Mark McLoughlin
    .alias = "pc",
1060 a245f2e7 aurel32
    .desc = "Standard PC",
1061 a245f2e7 aurel32
    .init = pc_init_pci,
1062 b2097003 aliguori
    .max_cpus = 255,
1063 0c257437 Anthony Liguori
    .is_default = 1,
1064 3dbbdc25 bellard
};
1065 3dbbdc25 bellard
1066 2cae6f5e Gerd Hoffmann
static QEMUMachine pc_machine_v0_11 = {
1067 2cae6f5e Gerd Hoffmann
    .name = "pc-0.11",
1068 2cae6f5e Gerd Hoffmann
    .desc = "Standard PC, qemu 0.11",
1069 2cae6f5e Gerd Hoffmann
    .init = pc_init_pci,
1070 2cae6f5e Gerd Hoffmann
    .max_cpus = 255,
1071 2cae6f5e Gerd Hoffmann
    .compat_props = (GlobalProperty[]) {
1072 2cae6f5e Gerd Hoffmann
        {
1073 2cae6f5e Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1074 2cae6f5e Gerd Hoffmann
            .property = "vectors",
1075 2cae6f5e Gerd Hoffmann
            .value    = stringify(0),
1076 20a86364 Gerd Hoffmann
        },{
1077 374ef704 Gerd Hoffmann
            .driver   = "ide-drive",
1078 374ef704 Gerd Hoffmann
            .property = "ver",
1079 374ef704 Gerd Hoffmann
            .value    = "0.11",
1080 374ef704 Gerd Hoffmann
        },{
1081 374ef704 Gerd Hoffmann
            .driver   = "scsi-disk",
1082 374ef704 Gerd Hoffmann
            .property = "ver",
1083 374ef704 Gerd Hoffmann
            .value    = "0.11",
1084 374ef704 Gerd Hoffmann
        },{
1085 20a86364 Gerd Hoffmann
            .driver   = "PCI",
1086 20a86364 Gerd Hoffmann
            .property = "rombar",
1087 20a86364 Gerd Hoffmann
            .value    = stringify(0),
1088 2cae6f5e Gerd Hoffmann
        },
1089 2cae6f5e Gerd Hoffmann
        { /* end of list */ }
1090 2cae6f5e Gerd Hoffmann
    }
1091 2cae6f5e Gerd Hoffmann
};
1092 2cae6f5e Gerd Hoffmann
1093 96cc1810 Gerd Hoffmann
static QEMUMachine pc_machine_v0_10 = {
1094 96cc1810 Gerd Hoffmann
    .name = "pc-0.10",
1095 96cc1810 Gerd Hoffmann
    .desc = "Standard PC, qemu 0.10",
1096 96cc1810 Gerd Hoffmann
    .init = pc_init_pci,
1097 96cc1810 Gerd Hoffmann
    .max_cpus = 255,
1098 458fb679 Gerd Hoffmann
    .compat_props = (GlobalProperty[]) {
1099 ab73ff29 Gerd Hoffmann
        {
1100 ab73ff29 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1101 ab73ff29 Gerd Hoffmann
            .property = "class",
1102 ab73ff29 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_STORAGE_OTHER),
1103 d6beee99 Gerd Hoffmann
        },{
1104 98b19252 Amit Shah
            .driver   = "virtio-serial-pci",
1105 d6beee99 Gerd Hoffmann
            .property = "class",
1106 d6beee99 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
1107 a1e0fea5 Gerd Hoffmann
        },{
1108 a1e0fea5 Gerd Hoffmann
            .driver   = "virtio-net-pci",
1109 a1e0fea5 Gerd Hoffmann
            .property = "vectors",
1110 a1e0fea5 Gerd Hoffmann
            .value    = stringify(0),
1111 177539e0 Gerd Hoffmann
        },{
1112 177539e0 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1113 177539e0 Gerd Hoffmann
            .property = "vectors",
1114 177539e0 Gerd Hoffmann
            .value    = stringify(0),
1115 20a86364 Gerd Hoffmann
        },{
1116 374ef704 Gerd Hoffmann
            .driver   = "ide-drive",
1117 374ef704 Gerd Hoffmann
            .property = "ver",
1118 374ef704 Gerd Hoffmann
            .value    = "0.10",
1119 374ef704 Gerd Hoffmann
        },{
1120 374ef704 Gerd Hoffmann
            .driver   = "scsi-disk",
1121 374ef704 Gerd Hoffmann
            .property = "ver",
1122 374ef704 Gerd Hoffmann
            .value    = "0.10",
1123 374ef704 Gerd Hoffmann
        },{
1124 20a86364 Gerd Hoffmann
            .driver   = "PCI",
1125 20a86364 Gerd Hoffmann
            .property = "rombar",
1126 20a86364 Gerd Hoffmann
            .value    = stringify(0),
1127 ab73ff29 Gerd Hoffmann
        },
1128 96cc1810 Gerd Hoffmann
        { /* end of list */ }
1129 96cc1810 Gerd Hoffmann
    },
1130 96cc1810 Gerd Hoffmann
};
1131 96cc1810 Gerd Hoffmann
1132 f80f9ec9 Anthony Liguori
static QEMUMachine isapc_machine = {
1133 a245f2e7 aurel32
    .name = "isapc",
1134 a245f2e7 aurel32
    .desc = "ISA-only PC",
1135 a245f2e7 aurel32
    .init = pc_init_isa,
1136 b2097003 aliguori
    .max_cpus = 1,
1137 b5ff2d6e bellard
};
1138 f80f9ec9 Anthony Liguori
1139 f80f9ec9 Anthony Liguori
static void pc_machine_init(void)
1140 f80f9ec9 Anthony Liguori
{
1141 f80f9ec9 Anthony Liguori
    qemu_register_machine(&pc_machine);
1142 2cae6f5e Gerd Hoffmann
    qemu_register_machine(&pc_machine_v0_11);
1143 96cc1810 Gerd Hoffmann
    qemu_register_machine(&pc_machine_v0_10);
1144 f80f9ec9 Anthony Liguori
    qemu_register_machine(&isapc_machine);
1145 f80f9ec9 Anthony Liguori
}
1146 f80f9ec9 Anthony Liguori
1147 f80f9ec9 Anthony Liguori
machine_init(pc_machine_init);