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/*
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 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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 *
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 * Copyright (c) 2004-2007 Fabrice Bellard
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 * Copyright (c) 2007 Jocelyn Mayer
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 * Copyright (c) 2010 David Gibson, IBM Corporation.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 *
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 */
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#include "sysemu.h"
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#include "hw.h"
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#include "elf.h"
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#include "net.h"
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#include "blockdev.h"
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#include "cpus.h"
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#include "kvm.h"
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#include "kvm_ppc.h"
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#include "hw/boards.h"
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#include "hw/ppc.h"
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#include "hw/loader.h"
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#include "hw/spapr.h"
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#include "hw/spapr_vio.h"
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#include "hw/spapr_pci.h"
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#include "hw/xics.h"
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#include "kvm.h"
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#include "kvm_ppc.h"
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#include "pci.h"
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#include "exec-memory.h"
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#include <libfdt.h>
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#define KERNEL_LOAD_ADDR        0x00000000
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#define INITRD_LOAD_ADDR        0x02800000
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#define FDT_MAX_SIZE            0x10000
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#define RTAS_MAX_SIZE           0x10000
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#define FW_MAX_SIZE             0x400000
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#define FW_FILE_NAME            "slof.bin"
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#define MIN_RMA_SLOF                128UL
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#define TIMEBASE_FREQ           512000000ULL
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#define MAX_CPUS                256
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#define XICS_IRQS                1024
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#define SPAPR_PCI_BUID          0x800000020000001ULL
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#define SPAPR_PCI_MEM_WIN_ADDR  (0x10000000000ULL + 0xA0000000)
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#define SPAPR_PCI_MEM_WIN_SIZE  0x20000000
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#define SPAPR_PCI_IO_WIN_ADDR   (0x10000000000ULL + 0x80000000)
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#define PHANDLE_XICP            0x00001111
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sPAPREnvironment *spapr;
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qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num)
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{
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    uint32_t irq;
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    qemu_irq qirq;
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    if (hint) {
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        irq = hint;
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        /* FIXME: we should probably check for collisions somehow */
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    } else {
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        irq = spapr->next_irq++;
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    }
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    qirq = xics_find_qirq(spapr->icp, irq);
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    if (!qirq) {
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        return NULL;
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    }
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    if (irq_num) {
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        *irq_num = irq;
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    }
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    return qirq;
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}
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static void *spapr_create_fdt_skel(const char *cpu_model,
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                                   target_phys_addr_t rma_size,
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                                   target_phys_addr_t initrd_base,
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                                   target_phys_addr_t initrd_size,
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                                   const char *boot_device,
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                                   const char *kernel_cmdline,
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                                   long hash_shift)
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{
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    void *fdt;
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    CPUState *env;
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    uint64_t mem_reg_property_rma[] = { 0, cpu_to_be64(rma_size) };
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    uint64_t mem_reg_property_nonrma[] = { cpu_to_be64(rma_size),
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                                           cpu_to_be64(ram_size - rma_size) };
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    uint32_t start_prop = cpu_to_be32(initrd_base);
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    uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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    char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
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        "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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    uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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    int i;
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    char *modelname;
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    int smt = kvmppc_smt_threads();
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#define _FDT(exp) \
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    do { \
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        int ret = (exp);                                           \
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        if (ret < 0) {                                             \
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            fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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                    #exp, fdt_strerror(ret));                      \
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            exit(1);                                               \
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        }                                                          \
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    } while (0)
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    fdt = g_malloc0(FDT_MAX_SIZE);
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    _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
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    _FDT((fdt_finish_reservemap(fdt)));
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    /* Root node */
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    _FDT((fdt_begin_node(fdt, "")));
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    _FDT((fdt_property_string(fdt, "device_type", "chrp")));
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    _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
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    _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
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    _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
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    /* /chosen */
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    _FDT((fdt_begin_node(fdt, "chosen")));
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    _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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    _FDT((fdt_property(fdt, "linux,initrd-start",
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                       &start_prop, sizeof(start_prop))));
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    _FDT((fdt_property(fdt, "linux,initrd-end",
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                       &end_prop, sizeof(end_prop))));
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    _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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    /*
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     * Because we don't always invoke any firmware, we can't rely on
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     * that to do BAR allocation.  Long term, we should probably do
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     * that ourselves, but for now, this setting (plus advertising the
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     * current BARs as 0) causes sufficiently recent kernels to to the
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     * BAR assignment themselves */
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    _FDT((fdt_property_cell(fdt, "linux,pci-probe-only", 0)));
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    _FDT((fdt_end_node(fdt)));
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    /* memory node(s) */
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    _FDT((fdt_begin_node(fdt, "memory@0")));
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    _FDT((fdt_property_string(fdt, "device_type", "memory")));
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    _FDT((fdt_property(fdt, "reg", mem_reg_property_rma,
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                       sizeof(mem_reg_property_rma))));
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    _FDT((fdt_end_node(fdt)));
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    if (ram_size > rma_size) {
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        char mem_name[32];
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        sprintf(mem_name, "memory@%" PRIx64, (uint64_t)rma_size);
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        _FDT((fdt_begin_node(fdt, mem_name)));
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        _FDT((fdt_property_string(fdt, "device_type", "memory")));
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        _FDT((fdt_property(fdt, "reg", mem_reg_property_nonrma,
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                           sizeof(mem_reg_property_nonrma))));
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        _FDT((fdt_end_node(fdt)));
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    }
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    /* cpus */
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    _FDT((fdt_begin_node(fdt, "cpus")));
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    _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
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    _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
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    modelname = g_strdup(cpu_model);
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    for (i = 0; i < strlen(modelname); i++) {
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        modelname[i] = toupper(modelname[i]);
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    }
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    for (env = first_cpu; env != NULL; env = env->next_cpu) {
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        int index = env->cpu_index;
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        uint32_t servers_prop[smp_threads];
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        uint32_t gservers_prop[smp_threads * 2];
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        char *nodename;
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        uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
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                           0xffffffff, 0xffffffff};
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        uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
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        uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
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        if ((index % smt) != 0) {
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            continue;
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        }
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        if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
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            fprintf(stderr, "Allocation failure\n");
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            exit(1);
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        }
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        _FDT((fdt_begin_node(fdt, nodename)));
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        free(nodename);
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        _FDT((fdt_property_cell(fdt, "reg", index)));
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        _FDT((fdt_property_string(fdt, "device_type", "cpu")));
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        _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
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        _FDT((fdt_property_cell(fdt, "dcache-block-size",
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                                env->dcache_line_size)));
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        _FDT((fdt_property_cell(fdt, "icache-block-size",
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                                env->icache_line_size)));
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        _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
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        _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
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        _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
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        _FDT((fdt_property(fdt, "ibm,pft-size",
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                           pft_size_prop, sizeof(pft_size_prop))));
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        _FDT((fdt_property_string(fdt, "status", "okay")));
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        _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
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        /* Build interrupt servers and gservers properties */
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        for (i = 0; i < smp_threads; i++) {
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            servers_prop[i] = cpu_to_be32(index + i);
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            /* Hack, direct the group queues back to cpu 0 */
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            gservers_prop[i*2] = cpu_to_be32(index + i);
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            gservers_prop[i*2 + 1] = 0;
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        }
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        _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
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                           servers_prop, sizeof(servers_prop))));
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        _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
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                           gservers_prop, sizeof(gservers_prop))));
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        if (env->mmu_model & POWERPC_MMU_1TSEG) {
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            _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
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                               segs, sizeof(segs))));
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        }
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        /* Advertise VMX/VSX (vector extensions) if available
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         *   0 / no property == no vector extensions
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         *   1               == VMX / Altivec available
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         *   2               == VSX available */
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        if (env->insns_flags & PPC_ALTIVEC) {
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            uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
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            _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
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        }
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        /* Advertise DFP (Decimal Floating Point) if available
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         *   0 / no property == no DFP
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         *   1               == DFP available */
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        if (env->insns_flags2 & PPC2_DFP) {
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            _FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
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        }
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        _FDT((fdt_end_node(fdt)));
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    }
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    g_free(modelname);
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    _FDT((fdt_end_node(fdt)));
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    /* RTAS */
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    _FDT((fdt_begin_node(fdt, "rtas")));
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    _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
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                       sizeof(hypertas_prop))));
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    _FDT((fdt_end_node(fdt)));
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    /* interrupt controller */
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    _FDT((fdt_begin_node(fdt, "interrupt-controller")));
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    _FDT((fdt_property_string(fdt, "device_type",
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                              "PowerPC-External-Interrupt-Presentation")));
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    _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
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    _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
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    _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
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                       interrupt_server_ranges_prop,
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                       sizeof(interrupt_server_ranges_prop))));
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    _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
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    _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
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    _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
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    _FDT((fdt_end_node(fdt)));
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    /* vdevice */
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    _FDT((fdt_begin_node(fdt, "vdevice")));
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    _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
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    _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
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    _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
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    _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
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    _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
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    _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
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    _FDT((fdt_end_node(fdt)));
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    _FDT((fdt_end_node(fdt))); /* close root node */
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    _FDT((fdt_finish(fdt)));
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    return fdt;
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}
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static void spapr_finalize_fdt(sPAPREnvironment *spapr,
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                               target_phys_addr_t fdt_addr,
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                               target_phys_addr_t rtas_addr,
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                               target_phys_addr_t rtas_size)
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{
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    int ret;
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    void *fdt;
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    sPAPRPHBState *phb;
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    fdt = g_malloc(FDT_MAX_SIZE);
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    /* open out the base tree into a temp buffer for the final tweaks */
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    _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
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    ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
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    if (ret < 0) {
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        fprintf(stderr, "couldn't setup vio devices in fdt\n");
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        exit(1);
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    }
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    QLIST_FOREACH(phb, &spapr->phbs, list) {
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        ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt);
341 3384f95c David Gibson
    }
342 3384f95c David Gibson
343 3384f95c David Gibson
    if (ret < 0) {
344 3384f95c David Gibson
        fprintf(stderr, "couldn't setup PCI devices in fdt\n");
345 3384f95c David Gibson
        exit(1);
346 3384f95c David Gibson
    }
347 3384f95c David Gibson
348 39ac8455 David Gibson
    /* RTAS */
349 39ac8455 David Gibson
    ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
350 39ac8455 David Gibson
    if (ret < 0) {
351 39ac8455 David Gibson
        fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
352 39ac8455 David Gibson
    }
353 39ac8455 David Gibson
354 4040ab72 David Gibson
    _FDT((fdt_pack(fdt)));
355 4040ab72 David Gibson
356 a3467baa David Gibson
    cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
357 9fdf0c29 David Gibson
358 7267c094 Anthony Liguori
    g_free(fdt);
359 9fdf0c29 David Gibson
}
360 9fdf0c29 David Gibson
361 9fdf0c29 David Gibson
static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
362 9fdf0c29 David Gibson
{
363 9fdf0c29 David Gibson
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
364 9fdf0c29 David Gibson
}
365 9fdf0c29 David Gibson
366 9fdf0c29 David Gibson
static void emulate_spapr_hypercall(CPUState *env)
367 9fdf0c29 David Gibson
{
368 9fdf0c29 David Gibson
    env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
369 9fdf0c29 David Gibson
}
370 9fdf0c29 David Gibson
371 a3467baa David Gibson
static void spapr_reset(void *opaque)
372 a3467baa David Gibson
{
373 a3467baa David Gibson
    sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
374 a3467baa David Gibson
375 a3467baa David Gibson
    fprintf(stderr, "sPAPR reset\n");
376 a3467baa David Gibson
377 a3467baa David Gibson
    /* flush out the hash table */
378 a3467baa David Gibson
    memset(spapr->htab, 0, spapr->htab_size);
379 a3467baa David Gibson
380 a3467baa David Gibson
    /* Load the fdt */
381 a3467baa David Gibson
    spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
382 a3467baa David Gibson
                       spapr->rtas_size);
383 a3467baa David Gibson
384 a3467baa David Gibson
    /* Set up the entry state */
385 a3467baa David Gibson
    first_cpu->gpr[3] = spapr->fdt_addr;
386 a3467baa David Gibson
    first_cpu->gpr[5] = 0;
387 a3467baa David Gibson
    first_cpu->halted = 0;
388 a3467baa David Gibson
    first_cpu->nip = spapr->entry_point;
389 a3467baa David Gibson
390 a3467baa David Gibson
}
391 a3467baa David Gibson
392 9fdf0c29 David Gibson
/* pSeries LPAR / sPAPR hardware init */
393 9fdf0c29 David Gibson
static void ppc_spapr_init(ram_addr_t ram_size,
394 9fdf0c29 David Gibson
                           const char *boot_device,
395 9fdf0c29 David Gibson
                           const char *kernel_filename,
396 9fdf0c29 David Gibson
                           const char *kernel_cmdline,
397 9fdf0c29 David Gibson
                           const char *initrd_filename,
398 9fdf0c29 David Gibson
                           const char *cpu_model)
399 9fdf0c29 David Gibson
{
400 c7a5c0c9 David Gibson
    CPUState *env;
401 9fdf0c29 David Gibson
    int i;
402 890c2b77 Avi Kivity
    MemoryRegion *sysmem = get_system_memory();
403 890c2b77 Avi Kivity
    MemoryRegion *ram = g_new(MemoryRegion, 1);
404 354ac20a David Gibson
    target_phys_addr_t rma_alloc_size, rma_size;
405 a3467baa David Gibson
    uint32_t initrd_base;
406 a3467baa David Gibson
    long kernel_size, initrd_size, fw_size;
407 f43e3525 David Gibson
    long pteg_shift = 17;
408 39ac8455 David Gibson
    char *filename;
409 9fdf0c29 David Gibson
410 d43b45e2 David Gibson
    spapr = g_malloc0(sizeof(*spapr));
411 d43b45e2 David Gibson
    QLIST_INIT(&spapr->phbs);
412 d43b45e2 David Gibson
413 9fdf0c29 David Gibson
    cpu_ppc_hypercall = emulate_spapr_hypercall;
414 9fdf0c29 David Gibson
415 354ac20a David Gibson
    /* Allocate RMA if necessary */
416 354ac20a David Gibson
    rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
417 354ac20a David Gibson
418 354ac20a David Gibson
    if (rma_alloc_size == -1) {
419 354ac20a David Gibson
        hw_error("qemu: Unable to create RMA\n");
420 354ac20a David Gibson
        exit(1);
421 354ac20a David Gibson
    }
422 354ac20a David Gibson
    if (rma_alloc_size && (rma_alloc_size < ram_size)) {
423 354ac20a David Gibson
        rma_size = rma_alloc_size;
424 354ac20a David Gibson
    } else {
425 354ac20a David Gibson
        rma_size = ram_size;
426 354ac20a David Gibson
    }
427 354ac20a David Gibson
428 354ac20a David Gibson
    /* We place the device tree just below either the top of the RMA,
429 354ac20a David Gibson
     * or just below 2GB, whichever is lowere, so that it can be
430 354ac20a David Gibson
     * processed with 32-bit real mode code if necessary */
431 354ac20a David Gibson
    spapr->fdt_addr = MIN(rma_size, 0x80000000) - FDT_MAX_SIZE;
432 a3467baa David Gibson
    spapr->rtas_addr = spapr->fdt_addr - RTAS_MAX_SIZE;
433 9fdf0c29 David Gibson
434 9fdf0c29 David Gibson
    /* init CPUs */
435 9fdf0c29 David Gibson
    if (cpu_model == NULL) {
436 6b7a2cf6 David Gibson
        cpu_model = kvm_enabled() ? "host" : "POWER7";
437 9fdf0c29 David Gibson
    }
438 9fdf0c29 David Gibson
    for (i = 0; i < smp_cpus; i++) {
439 c7a5c0c9 David Gibson
        env = cpu_init(cpu_model);
440 9fdf0c29 David Gibson
441 9fdf0c29 David Gibson
        if (!env) {
442 9fdf0c29 David Gibson
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
443 9fdf0c29 David Gibson
            exit(1);
444 9fdf0c29 David Gibson
        }
445 9fdf0c29 David Gibson
        /* Set time-base frequency to 512 MHz */
446 9fdf0c29 David Gibson
        cpu_ppc_tb_init(env, TIMEBASE_FREQ);
447 9fdf0c29 David Gibson
        qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
448 9fdf0c29 David Gibson
449 9fdf0c29 David Gibson
        env->hreset_vector = 0x60;
450 9fdf0c29 David Gibson
        env->hreset_excp_prefix = 0;
451 c7a5c0c9 David Gibson
        env->gpr[3] = env->cpu_index;
452 9fdf0c29 David Gibson
    }
453 9fdf0c29 David Gibson
454 9fdf0c29 David Gibson
    /* allocate RAM */
455 f73a2575 David Gibson
    spapr->ram_limit = ram_size;
456 354ac20a David Gibson
    if (spapr->ram_limit > rma_alloc_size) {
457 354ac20a David Gibson
        ram_addr_t nonrma_base = rma_alloc_size;
458 354ac20a David Gibson
        ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
459 354ac20a David Gibson
460 354ac20a David Gibson
        memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size);
461 354ac20a David Gibson
        memory_region_add_subregion(sysmem, nonrma_base, ram);
462 354ac20a David Gibson
    }
463 9fdf0c29 David Gibson
464 f43e3525 David Gibson
    /* allocate hash page table.  For now we always make this 16mb,
465 f43e3525 David Gibson
     * later we should probably make it scale to the size of guest
466 f43e3525 David Gibson
     * RAM */
467 a3467baa David Gibson
    spapr->htab_size = 1ULL << (pteg_shift + 7);
468 f61b4bed Alexander Graf
    spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size);
469 f43e3525 David Gibson
470 c7a5c0c9 David Gibson
    for (env = first_cpu; env != NULL; env = env->next_cpu) {
471 a3467baa David Gibson
        env->external_htab = spapr->htab;
472 c7a5c0c9 David Gibson
        env->htab_base = -1;
473 a3467baa David Gibson
        env->htab_mask = spapr->htab_size - 1;
474 f61b4bed Alexander Graf
475 f61b4bed Alexander Graf
        /* Tell KVM that we're in PAPR mode */
476 f61b4bed Alexander Graf
        env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
477 f61b4bed Alexander Graf
                             ((pteg_shift + 7) - 18);
478 f61b4bed Alexander Graf
        env->spr[SPR_HIOR] = 0;
479 f61b4bed Alexander Graf
480 f61b4bed Alexander Graf
        if (kvm_enabled()) {
481 f61b4bed Alexander Graf
            kvmppc_set_papr(env);
482 f61b4bed Alexander Graf
        }
483 f43e3525 David Gibson
    }
484 f43e3525 David Gibson
485 39ac8455 David Gibson
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
486 a3467baa David Gibson
    spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
487 a3467baa David Gibson
                                           ram_size - spapr->rtas_addr);
488 a3467baa David Gibson
    if (spapr->rtas_size < 0) {
489 39ac8455 David Gibson
        hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
490 39ac8455 David Gibson
        exit(1);
491 39ac8455 David Gibson
    }
492 7267c094 Anthony Liguori
    g_free(filename);
493 39ac8455 David Gibson
494 b5cec4c5 David Gibson
    /* Set up Interrupt Controller */
495 c7a5c0c9 David Gibson
    spapr->icp = xics_system_init(XICS_IRQS);
496 e6c866d4 David Gibson
    spapr->next_irq = 16;
497 b5cec4c5 David Gibson
498 b5cec4c5 David Gibson
    /* Set up VIO bus */
499 4040ab72 David Gibson
    spapr->vio_bus = spapr_vio_bus_init();
500 4040ab72 David Gibson
501 277f9acf Paolo Bonzini
    for (i = 0; i < MAX_SERIAL_PORTS; i++) {
502 4040ab72 David Gibson
        if (serial_hds[i]) {
503 b4a78527 David Gibson
            spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i,
504 277f9acf Paolo Bonzini
                             serial_hds[i]);
505 4040ab72 David Gibson
        }
506 4040ab72 David Gibson
    }
507 9fdf0c29 David Gibson
508 3384f95c David Gibson
    /* Set up PCI */
509 3384f95c David Gibson
    spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
510 3384f95c David Gibson
                     SPAPR_PCI_MEM_WIN_ADDR,
511 3384f95c David Gibson
                     SPAPR_PCI_MEM_WIN_SIZE,
512 3384f95c David Gibson
                     SPAPR_PCI_IO_WIN_ADDR);
513 3384f95c David Gibson
514 277f9acf Paolo Bonzini
    for (i = 0; i < nb_nics; i++) {
515 8d90ad90 David Gibson
        NICInfo *nd = &nd_table[i];
516 8d90ad90 David Gibson
517 8d90ad90 David Gibson
        if (!nd->model) {
518 7267c094 Anthony Liguori
            nd->model = g_strdup("ibmveth");
519 8d90ad90 David Gibson
        }
520 8d90ad90 David Gibson
521 8d90ad90 David Gibson
        if (strcmp(nd->model, "ibmveth") == 0) {
522 277f9acf Paolo Bonzini
            spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
523 8d90ad90 David Gibson
        } else {
524 3384f95c David Gibson
            pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
525 8d90ad90 David Gibson
        }
526 8d90ad90 David Gibson
    }
527 8d90ad90 David Gibson
528 6e270446 Ben Herrenschmidt
    for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
529 277f9acf Paolo Bonzini
        spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
530 6e270446 Ben Herrenschmidt
    }
531 6e270446 Ben Herrenschmidt
532 9fdf0c29 David Gibson
    if (kernel_filename) {
533 9fdf0c29 David Gibson
        uint64_t lowaddr = 0;
534 9fdf0c29 David Gibson
535 9fdf0c29 David Gibson
        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
536 9fdf0c29 David Gibson
                               NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
537 9fdf0c29 David Gibson
        if (kernel_size < 0) {
538 a3467baa David Gibson
            kernel_size = load_image_targphys(kernel_filename,
539 a3467baa David Gibson
                                              KERNEL_LOAD_ADDR,
540 a3467baa David Gibson
                                              ram_size - KERNEL_LOAD_ADDR);
541 9fdf0c29 David Gibson
        }
542 9fdf0c29 David Gibson
        if (kernel_size < 0) {
543 9fdf0c29 David Gibson
            fprintf(stderr, "qemu: could not load kernel '%s'\n",
544 9fdf0c29 David Gibson
                    kernel_filename);
545 9fdf0c29 David Gibson
            exit(1);
546 9fdf0c29 David Gibson
        }
547 9fdf0c29 David Gibson
548 9fdf0c29 David Gibson
        /* load initrd */
549 9fdf0c29 David Gibson
        if (initrd_filename) {
550 9fdf0c29 David Gibson
            initrd_base = INITRD_LOAD_ADDR;
551 9fdf0c29 David Gibson
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
552 9fdf0c29 David Gibson
                                              ram_size - initrd_base);
553 9fdf0c29 David Gibson
            if (initrd_size < 0) {
554 9fdf0c29 David Gibson
                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
555 9fdf0c29 David Gibson
                        initrd_filename);
556 9fdf0c29 David Gibson
                exit(1);
557 9fdf0c29 David Gibson
            }
558 9fdf0c29 David Gibson
        } else {
559 9fdf0c29 David Gibson
            initrd_base = 0;
560 9fdf0c29 David Gibson
            initrd_size = 0;
561 9fdf0c29 David Gibson
        }
562 a3467baa David Gibson
563 a3467baa David Gibson
        spapr->entry_point = KERNEL_LOAD_ADDR;
564 9fdf0c29 David Gibson
    } else {
565 92c93a81 David Gibson
        if (rma_size < (MIN_RMA_SLOF << 20)) {
566 a9f8ad8f David Gibson
            fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
567 92c93a81 David Gibson
                    "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
568 a9f8ad8f David Gibson
            exit(1);
569 a9f8ad8f David Gibson
        }
570 68722054 Nishanth Aravamudan
        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
571 a9f8ad8f David Gibson
        fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
572 a9f8ad8f David Gibson
        if (fw_size < 0) {
573 a9f8ad8f David Gibson
            hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
574 a9f8ad8f David Gibson
            exit(1);
575 a9f8ad8f David Gibson
        }
576 7267c094 Anthony Liguori
        g_free(filename);
577 a3467baa David Gibson
        spapr->entry_point = 0x100;
578 a9f8ad8f David Gibson
        initrd_base = 0;
579 a9f8ad8f David Gibson
        initrd_size = 0;
580 a9f8ad8f David Gibson
581 a9f8ad8f David Gibson
        /* SLOF will startup the secondary CPUs using RTAS,
582 a9f8ad8f David Gibson
           rather than expecting a kexec() style entry */
583 c7a5c0c9 David Gibson
        for (env = first_cpu; env != NULL; env = env->next_cpu) {
584 c7a5c0c9 David Gibson
            env->halted = 1;
585 a9f8ad8f David Gibson
        }
586 9fdf0c29 David Gibson
    }
587 9fdf0c29 David Gibson
588 9fdf0c29 David Gibson
    /* Prepare the device tree */
589 354ac20a David Gibson
    spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size,
590 a3467baa David Gibson
                                            initrd_base, initrd_size,
591 a3467baa David Gibson
                                            boot_device, kernel_cmdline,
592 a3467baa David Gibson
                                            pteg_shift + 7);
593 a3467baa David Gibson
    assert(spapr->fdt_skel != NULL);
594 9fdf0c29 David Gibson
595 a3467baa David Gibson
    qemu_register_reset(spapr_reset, spapr);
596 9fdf0c29 David Gibson
}
597 9fdf0c29 David Gibson
598 9fdf0c29 David Gibson
static QEMUMachine spapr_machine = {
599 9fdf0c29 David Gibson
    .name = "pseries",
600 9fdf0c29 David Gibson
    .desc = "pSeries Logical Partition (PAPR compliant)",
601 9fdf0c29 David Gibson
    .init = ppc_spapr_init,
602 9fdf0c29 David Gibson
    .max_cpus = MAX_CPUS,
603 9fdf0c29 David Gibson
    .no_vga = 1,
604 9fdf0c29 David Gibson
    .no_parallel = 1,
605 6e270446 Ben Herrenschmidt
    .use_scsi = 1,
606 9fdf0c29 David Gibson
};
607 9fdf0c29 David Gibson
608 9fdf0c29 David Gibson
static void spapr_machine_init(void)
609 9fdf0c29 David Gibson
{
610 9fdf0c29 David Gibson
    qemu_register_machine(&spapr_machine);
611 9fdf0c29 David Gibson
}
612 9fdf0c29 David Gibson
613 9fdf0c29 David Gibson
machine_init(spapr_machine_init);