root / hw / spapr.c @ 00c3a05b
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 8d90ad90 | David Gibson | #include "net.h" |
31 | 6e270446 | Ben Herrenschmidt | #include "blockdev.h" |
32 | e97c3636 | David Gibson | #include "cpus.h" |
33 | e97c3636 | David Gibson | #include "kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
43 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
44 | 9fdf0c29 | David Gibson | |
45 | f61b4bed | Alexander Graf | #include "kvm.h" |
46 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
47 | 3384f95c | David Gibson | #include "pci.h" |
48 | f61b4bed | Alexander Graf | |
49 | 890c2b77 | Avi Kivity | #include "exec-memory.h" |
50 | 890c2b77 | Avi Kivity | |
51 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
52 | 9fdf0c29 | David Gibson | |
53 | 9fdf0c29 | David Gibson | #define KERNEL_LOAD_ADDR 0x00000000 |
54 | 9fdf0c29 | David Gibson | #define INITRD_LOAD_ADDR 0x02800000 |
55 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
56 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
57 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
58 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
59 | a9f8ad8f | David Gibson | |
60 | 92c93a81 | David Gibson | #define MIN_RMA_SLOF 128UL |
61 | 9fdf0c29 | David Gibson | |
62 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
63 | 9fdf0c29 | David Gibson | |
64 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
65 | b5cec4c5 | David Gibson | #define XICS_IRQS 1024 |
66 | 9fdf0c29 | David Gibson | |
67 | 3384f95c | David Gibson | #define SPAPR_PCI_BUID 0x800000020000001ULL |
68 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_ADDR (0x10000000000ULL + 0xA0000000) |
69 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_SIZE 0x20000000 |
70 | 3384f95c | David Gibson | #define SPAPR_PCI_IO_WIN_ADDR (0x10000000000ULL + 0x80000000) |
71 | 3384f95c | David Gibson | |
72 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
73 | 0c103f8e | David Gibson | |
74 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
75 | 9fdf0c29 | David Gibson | |
76 | e6c866d4 | David Gibson | qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num) |
77 | e6c866d4 | David Gibson | { |
78 | e6c866d4 | David Gibson | uint32_t irq; |
79 | e6c866d4 | David Gibson | qemu_irq qirq; |
80 | e6c866d4 | David Gibson | |
81 | e6c866d4 | David Gibson | if (hint) {
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82 | e6c866d4 | David Gibson | irq = hint; |
83 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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84 | e6c866d4 | David Gibson | } else {
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85 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
86 | e6c866d4 | David Gibson | } |
87 | e6c866d4 | David Gibson | |
88 | e6c866d4 | David Gibson | qirq = xics_find_qirq(spapr->icp, irq); |
89 | e6c866d4 | David Gibson | if (!qirq) {
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90 | e6c866d4 | David Gibson | return NULL; |
91 | e6c866d4 | David Gibson | } |
92 | e6c866d4 | David Gibson | |
93 | e6c866d4 | David Gibson | if (irq_num) {
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94 | e6c866d4 | David Gibson | *irq_num = irq; |
95 | e6c866d4 | David Gibson | } |
96 | e6c866d4 | David Gibson | |
97 | e6c866d4 | David Gibson | return qirq;
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98 | e6c866d4 | David Gibson | } |
99 | e6c866d4 | David Gibson | |
100 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
101 | 354ac20a | David Gibson | target_phys_addr_t rma_size, |
102 | a3467baa | David Gibson | target_phys_addr_t initrd_base, |
103 | a3467baa | David Gibson | target_phys_addr_t initrd_size, |
104 | a3467baa | David Gibson | const char *boot_device, |
105 | a3467baa | David Gibson | const char *kernel_cmdline, |
106 | a3467baa | David Gibson | long hash_shift)
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107 | 9fdf0c29 | David Gibson | { |
108 | 9fdf0c29 | David Gibson | void *fdt;
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109 | c7a5c0c9 | David Gibson | CPUState *env; |
110 | 354ac20a | David Gibson | uint64_t mem_reg_property_rma[] = { 0, cpu_to_be64(rma_size) };
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111 | 354ac20a | David Gibson | uint64_t mem_reg_property_nonrma[] = { cpu_to_be64(rma_size), |
112 | 354ac20a | David Gibson | cpu_to_be64(ram_size - rma_size) }; |
113 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
114 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
115 | f43e3525 | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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116 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
117 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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118 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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119 | 9fdf0c29 | David Gibson | int i;
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120 | 9fdf0c29 | David Gibson | char *modelname;
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121 | e97c3636 | David Gibson | int smt = kvmppc_smt_threads();
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122 | 9fdf0c29 | David Gibson | |
123 | 9fdf0c29 | David Gibson | #define _FDT(exp) \
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124 | 9fdf0c29 | David Gibson | do { \
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125 | 9fdf0c29 | David Gibson | int ret = (exp); \
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126 | 9fdf0c29 | David Gibson | if (ret < 0) { \ |
127 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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128 | 9fdf0c29 | David Gibson | #exp, fdt_strerror(ret)); \
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129 | 9fdf0c29 | David Gibson | exit(1); \
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130 | 9fdf0c29 | David Gibson | } \ |
131 | 9fdf0c29 | David Gibson | } while (0) |
132 | 9fdf0c29 | David Gibson | |
133 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
134 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
135 | 9fdf0c29 | David Gibson | |
136 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
137 | 9fdf0c29 | David Gibson | |
138 | 9fdf0c29 | David Gibson | /* Root node */
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139 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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140 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
141 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
142 | 9fdf0c29 | David Gibson | |
143 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
144 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
145 | 9fdf0c29 | David Gibson | |
146 | 9fdf0c29 | David Gibson | /* /chosen */
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147 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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148 | 9fdf0c29 | David Gibson | |
149 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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150 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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151 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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152 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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153 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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154 | a9f8ad8f | David Gibson | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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155 | 9fdf0c29 | David Gibson | |
156 | 3384f95c | David Gibson | /*
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157 | 3384f95c | David Gibson | * Because we don't always invoke any firmware, we can't rely on
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158 | 3384f95c | David Gibson | * that to do BAR allocation. Long term, we should probably do
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159 | 3384f95c | David Gibson | * that ourselves, but for now, this setting (plus advertising the
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160 | 3384f95c | David Gibson | * current BARs as 0) causes sufficiently recent kernels to to the
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161 | 3384f95c | David Gibson | * BAR assignment themselves */
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162 | 3384f95c | David Gibson | _FDT((fdt_property_cell(fdt, "linux,pci-probe-only", 0))); |
163 | 3384f95c | David Gibson | |
164 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
165 | 9fdf0c29 | David Gibson | |
166 | 354ac20a | David Gibson | /* memory node(s) */
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167 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "memory@0")));
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168 | 9fdf0c29 | David Gibson | |
169 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
170 | 354ac20a | David Gibson | _FDT((fdt_property(fdt, "reg", mem_reg_property_rma,
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171 | 354ac20a | David Gibson | sizeof(mem_reg_property_rma))));
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172 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
173 | 9fdf0c29 | David Gibson | |
174 | 354ac20a | David Gibson | if (ram_size > rma_size) {
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175 | 354ac20a | David Gibson | char mem_name[32]; |
176 | 354ac20a | David Gibson | |
177 | 354ac20a | David Gibson | sprintf(mem_name, "memory@%" PRIx64, (uint64_t)rma_size);
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178 | 354ac20a | David Gibson | _FDT((fdt_begin_node(fdt, mem_name))); |
179 | 354ac20a | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
180 | 354ac20a | David Gibson | _FDT((fdt_property(fdt, "reg", mem_reg_property_nonrma,
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181 | 354ac20a | David Gibson | sizeof(mem_reg_property_nonrma))));
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182 | 354ac20a | David Gibson | _FDT((fdt_end_node(fdt))); |
183 | 354ac20a | David Gibson | } |
184 | 354ac20a | David Gibson | |
185 | 9fdf0c29 | David Gibson | /* cpus */
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186 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
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187 | 9fdf0c29 | David Gibson | |
188 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
189 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
190 | 9fdf0c29 | David Gibson | |
191 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
192 | 9fdf0c29 | David Gibson | |
193 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
194 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
195 | 9fdf0c29 | David Gibson | } |
196 | 9fdf0c29 | David Gibson | |
197 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
198 | c7a5c0c9 | David Gibson | int index = env->cpu_index;
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199 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
200 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
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201 | 9fdf0c29 | David Gibson | char *nodename;
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202 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
203 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
204 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
205 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
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206 | 9fdf0c29 | David Gibson | |
207 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
208 | e97c3636 | David Gibson | continue;
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209 | e97c3636 | David Gibson | } |
210 | e97c3636 | David Gibson | |
211 | c7a5c0c9 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, index) < 0) { |
212 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
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213 | 9fdf0c29 | David Gibson | exit(1);
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214 | 9fdf0c29 | David Gibson | } |
215 | 9fdf0c29 | David Gibson | |
216 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
217 | 9fdf0c29 | David Gibson | |
218 | 9fdf0c29 | David Gibson | free(nodename); |
219 | 9fdf0c29 | David Gibson | |
220 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
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221 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
222 | 9fdf0c29 | David Gibson | |
223 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
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224 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
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225 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
226 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
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227 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
228 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
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229 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
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230 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
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231 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,pft-size",
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232 | f43e3525 | David Gibson | pft_size_prop, sizeof(pft_size_prop))));
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233 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
234 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
235 | e97c3636 | David Gibson | |
236 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
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237 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
238 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
239 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
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240 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
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241 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
242 | e97c3636 | David Gibson | } |
243 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
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244 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
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245 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
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246 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
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247 | 9fdf0c29 | David Gibson | |
248 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
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249 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
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250 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
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251 | 9fdf0c29 | David Gibson | } |
252 | 9fdf0c29 | David Gibson | |
253 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
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254 | 6659394f | David Gibson | * 0 / no property == no vector extensions
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255 | 6659394f | David Gibson | * 1 == VMX / Altivec available
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256 | 6659394f | David Gibson | * 2 == VSX available */
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257 | a7342588 | David Gibson | if (env->insns_flags & PPC_ALTIVEC) {
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258 | a7342588 | David Gibson | uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; |
259 | a7342588 | David Gibson | |
260 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
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261 | 6659394f | David Gibson | } |
262 | 6659394f | David Gibson | |
263 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
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264 | 6659394f | David Gibson | * 0 / no property == no DFP
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265 | 6659394f | David Gibson | * 1 == DFP available */
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266 | a7342588 | David Gibson | if (env->insns_flags2 & PPC2_DFP) {
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267 | a7342588 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); |
268 | 6659394f | David Gibson | } |
269 | 6659394f | David Gibson | |
270 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
271 | 9fdf0c29 | David Gibson | } |
272 | 9fdf0c29 | David Gibson | |
273 | 7267c094 | Anthony Liguori | g_free(modelname); |
274 | 9fdf0c29 | David Gibson | |
275 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
276 | 9fdf0c29 | David Gibson | |
277 | f43e3525 | David Gibson | /* RTAS */
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278 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
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279 | f43e3525 | David Gibson | |
280 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
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281 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
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282 | f43e3525 | David Gibson | |
283 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
284 | f43e3525 | David Gibson | |
285 | b5cec4c5 | David Gibson | /* interrupt controller */
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286 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
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287 | b5cec4c5 | David Gibson | |
288 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
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289 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
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290 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
291 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
292 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
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293 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
294 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
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295 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
296 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
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297 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
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298 | b5cec4c5 | David Gibson | |
299 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
300 | b5cec4c5 | David Gibson | |
301 | 4040ab72 | David Gibson | /* vdevice */
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302 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
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303 | 4040ab72 | David Gibson | |
304 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
305 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
306 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
307 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
308 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
309 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
310 | 4040ab72 | David Gibson | |
311 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
312 | 4040ab72 | David Gibson | |
313 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
|
314 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
315 | 9fdf0c29 | David Gibson | |
316 | a3467baa | David Gibson | return fdt;
|
317 | a3467baa | David Gibson | } |
318 | a3467baa | David Gibson | |
319 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
320 | a3467baa | David Gibson | target_phys_addr_t fdt_addr, |
321 | a3467baa | David Gibson | target_phys_addr_t rtas_addr, |
322 | a3467baa | David Gibson | target_phys_addr_t rtas_size) |
323 | a3467baa | David Gibson | { |
324 | a3467baa | David Gibson | int ret;
|
325 | a3467baa | David Gibson | void *fdt;
|
326 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
327 | a3467baa | David Gibson | |
328 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
329 | a3467baa | David Gibson | |
330 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
331 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
332 | 4040ab72 | David Gibson | |
333 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
334 | 4040ab72 | David Gibson | if (ret < 0) { |
335 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
336 | 4040ab72 | David Gibson | exit(1);
|
337 | 4040ab72 | David Gibson | } |
338 | 4040ab72 | David Gibson | |
339 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
340 | 3384f95c | David Gibson | ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt); |
341 | 3384f95c | David Gibson | } |
342 | 3384f95c | David Gibson | |
343 | 3384f95c | David Gibson | if (ret < 0) { |
344 | 3384f95c | David Gibson | fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
345 | 3384f95c | David Gibson | exit(1);
|
346 | 3384f95c | David Gibson | } |
347 | 3384f95c | David Gibson | |
348 | 39ac8455 | David Gibson | /* RTAS */
|
349 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
350 | 39ac8455 | David Gibson | if (ret < 0) { |
351 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
352 | 39ac8455 | David Gibson | } |
353 | 39ac8455 | David Gibson | |
354 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
355 | 4040ab72 | David Gibson | |
356 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
357 | 9fdf0c29 | David Gibson | |
358 | 7267c094 | Anthony Liguori | g_free(fdt); |
359 | 9fdf0c29 | David Gibson | } |
360 | 9fdf0c29 | David Gibson | |
361 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
362 | 9fdf0c29 | David Gibson | { |
363 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
364 | 9fdf0c29 | David Gibson | } |
365 | 9fdf0c29 | David Gibson | |
366 | 9fdf0c29 | David Gibson | static void emulate_spapr_hypercall(CPUState *env) |
367 | 9fdf0c29 | David Gibson | { |
368 | 9fdf0c29 | David Gibson | env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
369 | 9fdf0c29 | David Gibson | } |
370 | 9fdf0c29 | David Gibson | |
371 | a3467baa | David Gibson | static void spapr_reset(void *opaque) |
372 | a3467baa | David Gibson | { |
373 | a3467baa | David Gibson | sPAPREnvironment *spapr = (sPAPREnvironment *)opaque; |
374 | a3467baa | David Gibson | |
375 | a3467baa | David Gibson | fprintf(stderr, "sPAPR reset\n");
|
376 | a3467baa | David Gibson | |
377 | a3467baa | David Gibson | /* flush out the hash table */
|
378 | a3467baa | David Gibson | memset(spapr->htab, 0, spapr->htab_size);
|
379 | a3467baa | David Gibson | |
380 | a3467baa | David Gibson | /* Load the fdt */
|
381 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
382 | a3467baa | David Gibson | spapr->rtas_size); |
383 | a3467baa | David Gibson | |
384 | a3467baa | David Gibson | /* Set up the entry state */
|
385 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
386 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
387 | a3467baa | David Gibson | first_cpu->halted = 0;
|
388 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
389 | a3467baa | David Gibson | |
390 | a3467baa | David Gibson | } |
391 | a3467baa | David Gibson | |
392 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
393 | 9fdf0c29 | David Gibson | static void ppc_spapr_init(ram_addr_t ram_size, |
394 | 9fdf0c29 | David Gibson | const char *boot_device, |
395 | 9fdf0c29 | David Gibson | const char *kernel_filename, |
396 | 9fdf0c29 | David Gibson | const char *kernel_cmdline, |
397 | 9fdf0c29 | David Gibson | const char *initrd_filename, |
398 | 9fdf0c29 | David Gibson | const char *cpu_model) |
399 | 9fdf0c29 | David Gibson | { |
400 | c7a5c0c9 | David Gibson | CPUState *env; |
401 | 9fdf0c29 | David Gibson | int i;
|
402 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
403 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
404 | 354ac20a | David Gibson | target_phys_addr_t rma_alloc_size, rma_size; |
405 | a3467baa | David Gibson | uint32_t initrd_base; |
406 | a3467baa | David Gibson | long kernel_size, initrd_size, fw_size;
|
407 | f43e3525 | David Gibson | long pteg_shift = 17; |
408 | 39ac8455 | David Gibson | char *filename;
|
409 | 9fdf0c29 | David Gibson | |
410 | d43b45e2 | David Gibson | spapr = g_malloc0(sizeof(*spapr));
|
411 | d43b45e2 | David Gibson | QLIST_INIT(&spapr->phbs); |
412 | d43b45e2 | David Gibson | |
413 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
414 | 9fdf0c29 | David Gibson | |
415 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
416 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
417 | 354ac20a | David Gibson | |
418 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
419 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
420 | 354ac20a | David Gibson | exit(1);
|
421 | 354ac20a | David Gibson | } |
422 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
423 | 354ac20a | David Gibson | rma_size = rma_alloc_size; |
424 | 354ac20a | David Gibson | } else {
|
425 | 354ac20a | David Gibson | rma_size = ram_size; |
426 | 354ac20a | David Gibson | } |
427 | 354ac20a | David Gibson | |
428 | 354ac20a | David Gibson | /* We place the device tree just below either the top of the RMA,
|
429 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
430 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
431 | 354ac20a | David Gibson | spapr->fdt_addr = MIN(rma_size, 0x80000000) - FDT_MAX_SIZE;
|
432 | a3467baa | David Gibson | spapr->rtas_addr = spapr->fdt_addr - RTAS_MAX_SIZE; |
433 | 9fdf0c29 | David Gibson | |
434 | 9fdf0c29 | David Gibson | /* init CPUs */
|
435 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
436 | 6b7a2cf6 | David Gibson | cpu_model = kvm_enabled() ? "host" : "POWER7"; |
437 | 9fdf0c29 | David Gibson | } |
438 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
439 | c7a5c0c9 | David Gibson | env = cpu_init(cpu_model); |
440 | 9fdf0c29 | David Gibson | |
441 | 9fdf0c29 | David Gibson | if (!env) {
|
442 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
443 | 9fdf0c29 | David Gibson | exit(1);
|
444 | 9fdf0c29 | David Gibson | } |
445 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
446 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
447 | 9fdf0c29 | David Gibson | qemu_register_reset((QEMUResetHandler *)&cpu_reset, env); |
448 | 9fdf0c29 | David Gibson | |
449 | 9fdf0c29 | David Gibson | env->hreset_vector = 0x60;
|
450 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
451 | c7a5c0c9 | David Gibson | env->gpr[3] = env->cpu_index;
|
452 | 9fdf0c29 | David Gibson | } |
453 | 9fdf0c29 | David Gibson | |
454 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
455 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
456 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
457 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
458 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
459 | 354ac20a | David Gibson | |
460 | 354ac20a | David Gibson | memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size); |
461 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
462 | 354ac20a | David Gibson | } |
463 | 9fdf0c29 | David Gibson | |
464 | f43e3525 | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
465 | f43e3525 | David Gibson | * later we should probably make it scale to the size of guest
|
466 | f43e3525 | David Gibson | * RAM */
|
467 | a3467baa | David Gibson | spapr->htab_size = 1ULL << (pteg_shift + 7); |
468 | f61b4bed | Alexander Graf | spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size); |
469 | f43e3525 | David Gibson | |
470 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
471 | a3467baa | David Gibson | env->external_htab = spapr->htab; |
472 | c7a5c0c9 | David Gibson | env->htab_base = -1;
|
473 | a3467baa | David Gibson | env->htab_mask = spapr->htab_size - 1;
|
474 | f61b4bed | Alexander Graf | |
475 | f61b4bed | Alexander Graf | /* Tell KVM that we're in PAPR mode */
|
476 | f61b4bed | Alexander Graf | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
477 | f61b4bed | Alexander Graf | ((pteg_shift + 7) - 18); |
478 | f61b4bed | Alexander Graf | env->spr[SPR_HIOR] = 0;
|
479 | f61b4bed | Alexander Graf | |
480 | f61b4bed | Alexander Graf | if (kvm_enabled()) {
|
481 | f61b4bed | Alexander Graf | kvmppc_set_papr(env); |
482 | f61b4bed | Alexander Graf | } |
483 | f43e3525 | David Gibson | } |
484 | f43e3525 | David Gibson | |
485 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
486 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
487 | a3467baa | David Gibson | ram_size - spapr->rtas_addr); |
488 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
489 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
490 | 39ac8455 | David Gibson | exit(1);
|
491 | 39ac8455 | David Gibson | } |
492 | 7267c094 | Anthony Liguori | g_free(filename); |
493 | 39ac8455 | David Gibson | |
494 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
495 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
496 | e6c866d4 | David Gibson | spapr->next_irq = 16;
|
497 | b5cec4c5 | David Gibson | |
498 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
499 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
500 | 4040ab72 | David Gibson | |
501 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
502 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
503 | b4a78527 | David Gibson | spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i, |
504 | 277f9acf | Paolo Bonzini | serial_hds[i]); |
505 | 4040ab72 | David Gibson | } |
506 | 4040ab72 | David Gibson | } |
507 | 9fdf0c29 | David Gibson | |
508 | 3384f95c | David Gibson | /* Set up PCI */
|
509 | 3384f95c | David Gibson | spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
|
510 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_ADDR, |
511 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_SIZE, |
512 | 3384f95c | David Gibson | SPAPR_PCI_IO_WIN_ADDR); |
513 | 3384f95c | David Gibson | |
514 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
515 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
516 | 8d90ad90 | David Gibson | |
517 | 8d90ad90 | David Gibson | if (!nd->model) {
|
518 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
519 | 8d90ad90 | David Gibson | } |
520 | 8d90ad90 | David Gibson | |
521 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
522 | 277f9acf | Paolo Bonzini | spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
|
523 | 8d90ad90 | David Gibson | } else {
|
524 | 3384f95c | David Gibson | pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
525 | 8d90ad90 | David Gibson | } |
526 | 8d90ad90 | David Gibson | } |
527 | 8d90ad90 | David Gibson | |
528 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
529 | 277f9acf | Paolo Bonzini | spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
|
530 | 6e270446 | Ben Herrenschmidt | } |
531 | 6e270446 | Ben Herrenschmidt | |
532 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
533 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
534 | 9fdf0c29 | David Gibson | |
535 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
536 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
537 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
538 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
539 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
540 | a3467baa | David Gibson | ram_size - KERNEL_LOAD_ADDR); |
541 | 9fdf0c29 | David Gibson | } |
542 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
543 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
544 | 9fdf0c29 | David Gibson | kernel_filename); |
545 | 9fdf0c29 | David Gibson | exit(1);
|
546 | 9fdf0c29 | David Gibson | } |
547 | 9fdf0c29 | David Gibson | |
548 | 9fdf0c29 | David Gibson | /* load initrd */
|
549 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
550 | 9fdf0c29 | David Gibson | initrd_base = INITRD_LOAD_ADDR; |
551 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
552 | 9fdf0c29 | David Gibson | ram_size - initrd_base); |
553 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
554 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
555 | 9fdf0c29 | David Gibson | initrd_filename); |
556 | 9fdf0c29 | David Gibson | exit(1);
|
557 | 9fdf0c29 | David Gibson | } |
558 | 9fdf0c29 | David Gibson | } else {
|
559 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
560 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
561 | 9fdf0c29 | David Gibson | } |
562 | a3467baa | David Gibson | |
563 | a3467baa | David Gibson | spapr->entry_point = KERNEL_LOAD_ADDR; |
564 | 9fdf0c29 | David Gibson | } else {
|
565 | 92c93a81 | David Gibson | if (rma_size < (MIN_RMA_SLOF << 20)) { |
566 | a9f8ad8f | David Gibson | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
567 | 92c93a81 | David Gibson | "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
568 | a9f8ad8f | David Gibson | exit(1);
|
569 | a9f8ad8f | David Gibson | } |
570 | 68722054 | Nishanth Aravamudan | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
571 | a9f8ad8f | David Gibson | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
572 | a9f8ad8f | David Gibson | if (fw_size < 0) { |
573 | a9f8ad8f | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
574 | a9f8ad8f | David Gibson | exit(1);
|
575 | a9f8ad8f | David Gibson | } |
576 | 7267c094 | Anthony Liguori | g_free(filename); |
577 | a3467baa | David Gibson | spapr->entry_point = 0x100;
|
578 | a9f8ad8f | David Gibson | initrd_base = 0;
|
579 | a9f8ad8f | David Gibson | initrd_size = 0;
|
580 | a9f8ad8f | David Gibson | |
581 | a9f8ad8f | David Gibson | /* SLOF will startup the secondary CPUs using RTAS,
|
582 | a9f8ad8f | David Gibson | rather than expecting a kexec() style entry */
|
583 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
584 | c7a5c0c9 | David Gibson | env->halted = 1;
|
585 | a9f8ad8f | David Gibson | } |
586 | 9fdf0c29 | David Gibson | } |
587 | 9fdf0c29 | David Gibson | |
588 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
589 | 354ac20a | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size, |
590 | a3467baa | David Gibson | initrd_base, initrd_size, |
591 | a3467baa | David Gibson | boot_device, kernel_cmdline, |
592 | a3467baa | David Gibson | pteg_shift + 7);
|
593 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
594 | 9fdf0c29 | David Gibson | |
595 | a3467baa | David Gibson | qemu_register_reset(spapr_reset, spapr); |
596 | 9fdf0c29 | David Gibson | } |
597 | 9fdf0c29 | David Gibson | |
598 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
599 | 9fdf0c29 | David Gibson | .name = "pseries",
|
600 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
|
601 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
602 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
603 | 9fdf0c29 | David Gibson | .no_vga = 1,
|
604 | 9fdf0c29 | David Gibson | .no_parallel = 1,
|
605 | 6e270446 | Ben Herrenschmidt | .use_scsi = 1,
|
606 | 9fdf0c29 | David Gibson | }; |
607 | 9fdf0c29 | David Gibson | |
608 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
609 | 9fdf0c29 | David Gibson | { |
610 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
611 | 9fdf0c29 | David Gibson | } |
612 | 9fdf0c29 | David Gibson | |
613 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |