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1 | 9ee6e8bb | pbrook | /*
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2 | 9ee6e8bb | pbrook | * ARMV7M System emulation.
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3 | 9ee6e8bb | pbrook | *
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4 | 9ee6e8bb | pbrook | * Copyright (c) 2006-2007 CodeSourcery.
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5 | 9ee6e8bb | pbrook | * Written by Paul Brook
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6 | 9ee6e8bb | pbrook | *
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7 | 2167f7bc | Matthew Fernandez | * This code is licensed under the GPL.
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8 | 9ee6e8bb | pbrook | */
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9 | 9ee6e8bb | pbrook | |
10 | fe7e8758 | Paul Brook | #include "sysbus.h" |
11 | 87ecb68b | pbrook | #include "arm-misc.h" |
12 | ca20cf32 | Blue Swirl | #include "loader.h" |
13 | ca20cf32 | Blue Swirl | #include "elf.h" |
14 | 9ee6e8bb | pbrook | |
15 | 9ee6e8bb | pbrook | /* Bitbanded IO. Each word corresponds to a single bit. */
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16 | 9ee6e8bb | pbrook | |
17 | 2167f7bc | Matthew Fernandez | /* Get the byte address of the real memory for a bitband access. */
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18 | 8da3ff18 | pbrook | static inline uint32_t bitband_addr(void * opaque, uint32_t addr) |
19 | 9ee6e8bb | pbrook | { |
20 | 9ee6e8bb | pbrook | uint32_t res; |
21 | 9ee6e8bb | pbrook | |
22 | 8da3ff18 | pbrook | res = *(uint32_t *)opaque; |
23 | 9ee6e8bb | pbrook | res |= (addr & 0x1ffffff) >> 5; |
24 | 9ee6e8bb | pbrook | return res;
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25 | 9ee6e8bb | pbrook | |
26 | 9ee6e8bb | pbrook | } |
27 | 9ee6e8bb | pbrook | |
28 | c227f099 | Anthony Liguori | static uint32_t bitband_readb(void *opaque, target_phys_addr_t offset) |
29 | 9ee6e8bb | pbrook | { |
30 | 9ee6e8bb | pbrook | uint8_t v; |
31 | 8da3ff18 | pbrook | cpu_physical_memory_read(bitband_addr(opaque, offset), &v, 1);
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32 | 9ee6e8bb | pbrook | return (v & (1 << ((offset >> 2) & 7))) != 0; |
33 | 9ee6e8bb | pbrook | } |
34 | 9ee6e8bb | pbrook | |
35 | c227f099 | Anthony Liguori | static void bitband_writeb(void *opaque, target_phys_addr_t offset, |
36 | 9ee6e8bb | pbrook | uint32_t value) |
37 | 9ee6e8bb | pbrook | { |
38 | 9ee6e8bb | pbrook | uint32_t addr; |
39 | 9ee6e8bb | pbrook | uint8_t mask; |
40 | 9ee6e8bb | pbrook | uint8_t v; |
41 | 8da3ff18 | pbrook | addr = bitband_addr(opaque, offset); |
42 | 9ee6e8bb | pbrook | mask = (1 << ((offset >> 2) & 7)); |
43 | 9ee6e8bb | pbrook | cpu_physical_memory_read(addr, &v, 1);
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44 | 9ee6e8bb | pbrook | if (value & 1) |
45 | 9ee6e8bb | pbrook | v |= mask; |
46 | 9ee6e8bb | pbrook | else
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47 | 9ee6e8bb | pbrook | v &= ~mask; |
48 | 9ee6e8bb | pbrook | cpu_physical_memory_write(addr, &v, 1);
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49 | 9ee6e8bb | pbrook | } |
50 | 9ee6e8bb | pbrook | |
51 | c227f099 | Anthony Liguori | static uint32_t bitband_readw(void *opaque, target_phys_addr_t offset) |
52 | 9ee6e8bb | pbrook | { |
53 | 9ee6e8bb | pbrook | uint32_t addr; |
54 | 9ee6e8bb | pbrook | uint16_t mask; |
55 | 9ee6e8bb | pbrook | uint16_t v; |
56 | 8da3ff18 | pbrook | addr = bitband_addr(opaque, offset) & ~1;
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57 | 9ee6e8bb | pbrook | mask = (1 << ((offset >> 2) & 15)); |
58 | 9ee6e8bb | pbrook | mask = tswap16(mask); |
59 | 9ee6e8bb | pbrook | cpu_physical_memory_read(addr, (uint8_t *)&v, 2);
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60 | 9ee6e8bb | pbrook | return (v & mask) != 0; |
61 | 9ee6e8bb | pbrook | } |
62 | 9ee6e8bb | pbrook | |
63 | c227f099 | Anthony Liguori | static void bitband_writew(void *opaque, target_phys_addr_t offset, |
64 | 9ee6e8bb | pbrook | uint32_t value) |
65 | 9ee6e8bb | pbrook | { |
66 | 9ee6e8bb | pbrook | uint32_t addr; |
67 | 9ee6e8bb | pbrook | uint16_t mask; |
68 | 9ee6e8bb | pbrook | uint16_t v; |
69 | 8da3ff18 | pbrook | addr = bitband_addr(opaque, offset) & ~1;
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70 | 9ee6e8bb | pbrook | mask = (1 << ((offset >> 2) & 15)); |
71 | 9ee6e8bb | pbrook | mask = tswap16(mask); |
72 | 9ee6e8bb | pbrook | cpu_physical_memory_read(addr, (uint8_t *)&v, 2);
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73 | 9ee6e8bb | pbrook | if (value & 1) |
74 | 9ee6e8bb | pbrook | v |= mask; |
75 | 9ee6e8bb | pbrook | else
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76 | 9ee6e8bb | pbrook | v &= ~mask; |
77 | 9ee6e8bb | pbrook | cpu_physical_memory_write(addr, (uint8_t *)&v, 2);
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78 | 9ee6e8bb | pbrook | } |
79 | 9ee6e8bb | pbrook | |
80 | c227f099 | Anthony Liguori | static uint32_t bitband_readl(void *opaque, target_phys_addr_t offset) |
81 | 9ee6e8bb | pbrook | { |
82 | 9ee6e8bb | pbrook | uint32_t addr; |
83 | 9ee6e8bb | pbrook | uint32_t mask; |
84 | 9ee6e8bb | pbrook | uint32_t v; |
85 | 8da3ff18 | pbrook | addr = bitband_addr(opaque, offset) & ~3;
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86 | 9ee6e8bb | pbrook | mask = (1 << ((offset >> 2) & 31)); |
87 | 9ee6e8bb | pbrook | mask = tswap32(mask); |
88 | 9ee6e8bb | pbrook | cpu_physical_memory_read(addr, (uint8_t *)&v, 4);
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89 | 9ee6e8bb | pbrook | return (v & mask) != 0; |
90 | 9ee6e8bb | pbrook | } |
91 | 9ee6e8bb | pbrook | |
92 | c227f099 | Anthony Liguori | static void bitband_writel(void *opaque, target_phys_addr_t offset, |
93 | 9ee6e8bb | pbrook | uint32_t value) |
94 | 9ee6e8bb | pbrook | { |
95 | 9ee6e8bb | pbrook | uint32_t addr; |
96 | 9ee6e8bb | pbrook | uint32_t mask; |
97 | 9ee6e8bb | pbrook | uint32_t v; |
98 | 8da3ff18 | pbrook | addr = bitband_addr(opaque, offset) & ~3;
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99 | 9ee6e8bb | pbrook | mask = (1 << ((offset >> 2) & 31)); |
100 | 9ee6e8bb | pbrook | mask = tswap32(mask); |
101 | 9ee6e8bb | pbrook | cpu_physical_memory_read(addr, (uint8_t *)&v, 4);
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102 | 9ee6e8bb | pbrook | if (value & 1) |
103 | 9ee6e8bb | pbrook | v |= mask; |
104 | 9ee6e8bb | pbrook | else
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105 | 9ee6e8bb | pbrook | v &= ~mask; |
106 | 9ee6e8bb | pbrook | cpu_physical_memory_write(addr, (uint8_t *)&v, 4);
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107 | 9ee6e8bb | pbrook | } |
108 | 9ee6e8bb | pbrook | |
109 | f69bf9d4 | Avi Kivity | static const MemoryRegionOps bitband_ops = { |
110 | f69bf9d4 | Avi Kivity | .old_mmio = { |
111 | f69bf9d4 | Avi Kivity | .read = { bitband_readb, bitband_readw, bitband_readl, }, |
112 | f69bf9d4 | Avi Kivity | .write = { bitband_writeb, bitband_writew, bitband_writel, }, |
113 | f69bf9d4 | Avi Kivity | }, |
114 | f69bf9d4 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
115 | 9ee6e8bb | pbrook | }; |
116 | 9ee6e8bb | pbrook | |
117 | 40905a6a | Paul Brook | typedef struct { |
118 | 40905a6a | Paul Brook | SysBusDevice busdev; |
119 | f69bf9d4 | Avi Kivity | MemoryRegion iomem; |
120 | 40905a6a | Paul Brook | uint32_t base; |
121 | 40905a6a | Paul Brook | } BitBandState; |
122 | 40905a6a | Paul Brook | |
123 | 81a322d4 | Gerd Hoffmann | static int bitband_init(SysBusDevice *dev) |
124 | 9ee6e8bb | pbrook | { |
125 | 40905a6a | Paul Brook | BitBandState *s = FROM_SYSBUS(BitBandState, dev); |
126 | 9ee6e8bb | pbrook | |
127 | f69bf9d4 | Avi Kivity | memory_region_init_io(&s->iomem, &bitband_ops, &s->base, "bitband",
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128 | f69bf9d4 | Avi Kivity | 0x02000000);
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129 | f69bf9d4 | Avi Kivity | sysbus_init_mmio_region(dev, &s->iomem); |
130 | 81a322d4 | Gerd Hoffmann | return 0; |
131 | 40905a6a | Paul Brook | } |
132 | 40905a6a | Paul Brook | |
133 | 40905a6a | Paul Brook | static void armv7m_bitband_init(void) |
134 | 40905a6a | Paul Brook | { |
135 | 40905a6a | Paul Brook | DeviceState *dev; |
136 | 40905a6a | Paul Brook | |
137 | 40905a6a | Paul Brook | dev = qdev_create(NULL, "ARM,bitband-memory"); |
138 | ee6847d1 | Gerd Hoffmann | qdev_prop_set_uint32(dev, "base", 0x20000000); |
139 | e23a1b33 | Markus Armbruster | qdev_init_nofail(dev); |
140 | 40905a6a | Paul Brook | sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000); |
141 | 40905a6a | Paul Brook | |
142 | 40905a6a | Paul Brook | dev = qdev_create(NULL, "ARM,bitband-memory"); |
143 | ee6847d1 | Gerd Hoffmann | qdev_prop_set_uint32(dev, "base", 0x40000000); |
144 | e23a1b33 | Markus Armbruster | qdev_init_nofail(dev); |
145 | 40905a6a | Paul Brook | sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000); |
146 | 9ee6e8bb | pbrook | } |
147 | 9ee6e8bb | pbrook | |
148 | 9ee6e8bb | pbrook | /* Board init. */
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149 | 983fe826 | Paul Brook | |
150 | 983fe826 | Paul Brook | static void armv7m_reset(void *opaque) |
151 | 983fe826 | Paul Brook | { |
152 | 983fe826 | Paul Brook | cpu_reset((CPUState *)opaque); |
153 | 983fe826 | Paul Brook | } |
154 | 983fe826 | Paul Brook | |
155 | 9ee6e8bb | pbrook | /* Init CPU and memory for a v7-M based board.
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156 | 9ee6e8bb | pbrook | flash_size and sram_size are in kb.
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157 | 9ee6e8bb | pbrook | Returns the NVIC array. */
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158 | 9ee6e8bb | pbrook | |
159 | 7d6f78cf | Avi Kivity | qemu_irq *armv7m_init(MemoryRegion *address_space_mem, |
160 | 7d6f78cf | Avi Kivity | int flash_size, int sram_size, |
161 | 9ee6e8bb | pbrook | const char *kernel_filename, const char *cpu_model) |
162 | 9ee6e8bb | pbrook | { |
163 | 9ee6e8bb | pbrook | CPUState *env; |
164 | fe7e8758 | Paul Brook | DeviceState *nvic; |
165 | fe7e8758 | Paul Brook | /* FIXME: make this local state. */
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166 | fe7e8758 | Paul Brook | static qemu_irq pic[64]; |
167 | fe7e8758 | Paul Brook | qemu_irq *cpu_pic; |
168 | 9ee6e8bb | pbrook | int image_size;
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169 | 9ee6e8bb | pbrook | uint64_t entry; |
170 | 9ee6e8bb | pbrook | uint64_t lowaddr; |
171 | fe7e8758 | Paul Brook | int i;
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172 | ca20cf32 | Blue Swirl | int big_endian;
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173 | 7d6f78cf | Avi Kivity | MemoryRegion *sram = g_new(MemoryRegion, 1);
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174 | 7d6f78cf | Avi Kivity | MemoryRegion *flash = g_new(MemoryRegion, 1);
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175 | 7d6f78cf | Avi Kivity | MemoryRegion *hack = g_new(MemoryRegion, 1);
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176 | 9ee6e8bb | pbrook | |
177 | 9ee6e8bb | pbrook | flash_size *= 1024;
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178 | 9ee6e8bb | pbrook | sram_size *= 1024;
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179 | 9ee6e8bb | pbrook | |
180 | 9ee6e8bb | pbrook | if (!cpu_model)
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181 | 9ee6e8bb | pbrook | cpu_model = "cortex-m3";
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182 | 9ee6e8bb | pbrook | env = cpu_init(cpu_model); |
183 | 9ee6e8bb | pbrook | if (!env) {
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184 | 9ee6e8bb | pbrook | fprintf(stderr, "Unable to find CPU definition\n");
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185 | 9ee6e8bb | pbrook | exit(1);
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186 | 9ee6e8bb | pbrook | } |
187 | 9ee6e8bb | pbrook | |
188 | 9ee6e8bb | pbrook | #if 0
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189 | 9ee6e8bb | pbrook | /* > 32Mb SRAM gets complicated because it overlaps the bitband area.
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190 | 9ee6e8bb | pbrook | We don't have proper commandline options, so allocate half of memory
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191 | 9ee6e8bb | pbrook | as SRAM, up to a maximum of 32Mb, and the rest as code. */
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192 | 9ee6e8bb | pbrook | if (ram_size > (512 + 32) * 1024 * 1024)
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193 | 9ee6e8bb | pbrook | ram_size = (512 + 32) * 1024 * 1024;
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194 | 9ee6e8bb | pbrook | sram_size = (ram_size / 2) & TARGET_PAGE_MASK;
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195 | 9ee6e8bb | pbrook | if (sram_size > 32 * 1024 * 1024)
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196 | 9ee6e8bb | pbrook | sram_size = 32 * 1024 * 1024;
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197 | 9ee6e8bb | pbrook | code_size = ram_size - sram_size;
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198 | 9ee6e8bb | pbrook | #endif
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199 | 9ee6e8bb | pbrook | |
200 | 9ee6e8bb | pbrook | /* Flash programming is done via the SCU, so pretend it is ROM. */
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201 | 7d6f78cf | Avi Kivity | memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size); |
202 | 7d6f78cf | Avi Kivity | memory_region_set_readonly(flash, true);
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203 | 7d6f78cf | Avi Kivity | memory_region_add_subregion(address_space_mem, 0, flash);
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204 | 7d6f78cf | Avi Kivity | memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size); |
205 | 7d6f78cf | Avi Kivity | memory_region_add_subregion(address_space_mem, 0x20000000, sram);
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206 | 9ee6e8bb | pbrook | armv7m_bitband_init(); |
207 | 9ee6e8bb | pbrook | |
208 | fe7e8758 | Paul Brook | nvic = qdev_create(NULL, "armv7m_nvic"); |
209 | 983fe826 | Paul Brook | env->nvic = nvic; |
210 | e23a1b33 | Markus Armbruster | qdev_init_nofail(nvic); |
211 | fe7e8758 | Paul Brook | cpu_pic = arm_pic_init_cpu(env); |
212 | fe7e8758 | Paul Brook | sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
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213 | fe7e8758 | Paul Brook | for (i = 0; i < 64; i++) { |
214 | 067a3ddc | Paul Brook | pic[i] = qdev_get_gpio_in(nvic, i); |
215 | fe7e8758 | Paul Brook | } |
216 | 9ee6e8bb | pbrook | |
217 | ca20cf32 | Blue Swirl | #ifdef TARGET_WORDS_BIGENDIAN
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218 | ca20cf32 | Blue Swirl | big_endian = 1;
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219 | ca20cf32 | Blue Swirl | #else
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220 | ca20cf32 | Blue Swirl | big_endian = 0;
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221 | ca20cf32 | Blue Swirl | #endif
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222 | ca20cf32 | Blue Swirl | |
223 | 409dbce5 | Aurelien Jarno | image_size = load_elf(kernel_filename, NULL, NULL, &entry, &lowaddr, |
224 | 409dbce5 | Aurelien Jarno | NULL, big_endian, ELF_MACHINE, 1); |
225 | 9ee6e8bb | pbrook | if (image_size < 0) { |
226 | dcac9679 | pbrook | image_size = load_image_targphys(kernel_filename, 0, flash_size);
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227 | 9ee6e8bb | pbrook | lowaddr = 0;
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228 | 9ee6e8bb | pbrook | } |
229 | 9ee6e8bb | pbrook | if (image_size < 0) { |
230 | 9ee6e8bb | pbrook | fprintf(stderr, "qemu: could not load kernel '%s'\n",
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231 | 9ee6e8bb | pbrook | kernel_filename); |
232 | 9ee6e8bb | pbrook | exit(1);
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233 | 9ee6e8bb | pbrook | } |
234 | 9ee6e8bb | pbrook | |
235 | 9ee6e8bb | pbrook | /* Hack to map an additional page of ram at the top of the address
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236 | 9ee6e8bb | pbrook | space. This stops qemu complaining about executing code outside RAM
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237 | 9ee6e8bb | pbrook | when returning from an exception. */
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238 | 7d6f78cf | Avi Kivity | memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000); |
239 | 7d6f78cf | Avi Kivity | memory_region_add_subregion(address_space_mem, 0xfffff000, hack);
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240 | 9ee6e8bb | pbrook | |
241 | 983fe826 | Paul Brook | qemu_register_reset(armv7m_reset, env); |
242 | 9ee6e8bb | pbrook | return pic;
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243 | 9ee6e8bb | pbrook | } |
244 | 40905a6a | Paul Brook | |
245 | ee6847d1 | Gerd Hoffmann | static SysBusDeviceInfo bitband_info = {
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246 | ee6847d1 | Gerd Hoffmann | .init = bitband_init, |
247 | ee6847d1 | Gerd Hoffmann | .qdev.name = "ARM,bitband-memory",
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248 | ee6847d1 | Gerd Hoffmann | .qdev.size = sizeof(BitBandState),
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249 | ee6847d1 | Gerd Hoffmann | .qdev.props = (Property[]) { |
250 | 1832efa2 | Gerd Hoffmann | DEFINE_PROP_UINT32("base", BitBandState, base, 0), |
251 | 1832efa2 | Gerd Hoffmann | DEFINE_PROP_END_OF_LIST(), |
252 | ee6847d1 | Gerd Hoffmann | } |
253 | ee6847d1 | Gerd Hoffmann | }; |
254 | ee6847d1 | Gerd Hoffmann | |
255 | 40905a6a | Paul Brook | static void armv7m_register_devices(void) |
256 | 40905a6a | Paul Brook | { |
257 | ee6847d1 | Gerd Hoffmann | sysbus_register_withprop(&bitband_info); |
258 | 40905a6a | Paul Brook | } |
259 | 40905a6a | Paul Brook | |
260 | 40905a6a | Paul Brook | device_init(armv7m_register_devices) |