target-xtensa: add Avnet LX60/LX110/LX200 boards
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60,96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550UART. FPGA may be loaded with almost any Tensilica processor. It is also...
hw: add OpenCores 10/100 Mbps Ethernet controller
This is OpenCores Ethernet MAC + subset of National SemiconductorsDP83838C PHY.OpenCores Ethernet MAC project: http://opencores.org/project,ethmac
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: rename dc232b board to sim
This is to get aligned with the linux name for this machine.
target-xtensa: implement external interrupt mapping
Xtensa cores may have different mapping of external interrupt pins tointernal IRQ numers. Implement API to acquire core IRQ by its externalinterrupt number.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>...
target-xtensa: remove hand-written xtensa cores implementations
target-xtensa: fix guest hang on masked CCOMPARE interrupt
QEMU timer is used to post CCOMPARE interrupt when the core is halted.If that CCOMPARE interrupt is masked off then the timer must be rearmedin the callback, otherwise it will be rearmed next time the core goes to...
Move graphic-related coalesced MMIO flushes to affected device models
This is conceptually cleaner and will allow us to drop the nographictimer. Moreover, it will be mandatory to fully exploit future per-devicecoalesced MMIO rings.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
Merge remote-tracking branch 'kwolf/for-anthony' into staging
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Merge remote-tracking branch 'kraxel/usb.28' into staging
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